-// Pico Library - Header File\r
+// Pico Library - Internal Header File\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
// (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
\r
+#ifndef PICO_INTERNAL_INCLUDED\r
+#define PICO_INTERNAL_INCLUDED\r
\r
#include <stdio.h>\r
#include <stdlib.h>\r
//\r
#define USE_POLL_DETECT\r
\r
+#ifndef PICO_INTERNAL\r
+#define PICO_INTERNAL\r
+#endif\r
+#ifndef PICO_INTERNAL_ASM\r
+#define PICO_INTERNAL_ASM\r
+#endif\r
\r
-// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r
+// to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project\r
\r
#ifdef __cplusplus\r
extern "C" {\r
// ----------------------- 68000 CPU -----------------------\r
#ifdef EMU_C68K\r
#include "../cpu/Cyclone/Cyclone.h"\r
-extern struct Cyclone PicoCpu, PicoCpuS68k;\r
-#define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run\r
+extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;\r
+#define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run\r
#define SekCyclesLeft \\r
(((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
#define SekCyclesLeftS68k \\r
- ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.cycles)\r
-#define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c\r
+ ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)\r
+#define SekSetCyclesLeftNoMCD(c) PicoCpuCM68k.cycles=c\r
#define SekSetCyclesLeft(c) { \\r
if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
}\r
-#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
-#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
-#define SekSetStop(x) { PicoCpu.stopped=x; if (x) PicoCpu.cycles=0; }\r
-#define SekSetStopS68k(x) { PicoCpuS68k.stopped=x; if (x) PicoCpuS68k.cycles=0; }\r
+#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)\r
+#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)\r
+#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
+#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
+#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
+\r
+#define SekInterrupt(i) PicoCpuCM68k.irq=i\r
+\r
+#ifdef EMU_M68K\r
+#define EMU_CORE_DEBUG\r
+#endif\r
#endif\r
\r
-#ifdef EMU_A68K\r
-void __cdecl M68000_RUN();\r
-// The format of the data in a68k.asm (at the _M68000_regs location)\r
-struct A68KContext\r
-{\r
- unsigned int d[8],a[8];\r
- unsigned int isp,srh,ccr,xc,pc,irq,sr;\r
- int (*IrqCallback) (int nIrq);\r
- unsigned int ppc;\r
- void *pResetCallback;\r
- unsigned int sfc,dfc,usp,vbr;\r
- unsigned int AsmBank,CpuVersion;\r
-};\r
-struct A68KContext M68000_regs;\r
-extern int m68k_ICount;\r
-#define SekCyclesLeft m68k_ICount\r
-#define SekSetCyclesLeft(c) m68k_ICount=c\r
-#define SekPc M68000_regs.pc\r
+#ifdef EMU_F68K\r
+#include "../cpu/fame/fame.h"\r
+extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;\r
+#define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter\r
+#define SekCyclesLeft \\r
+ (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
+#define SekCyclesLeftS68k \\r
+ ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)\r
+#define SekSetCyclesLeftNoMCD(c) PicoCpuFM68k.io_cycle_counter=c\r
+#define SekSetCyclesLeft(c) { \\r
+ if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
+}\r
+#define SekPc fm68k_get_pc(&PicoCpuFM68k)\r
+#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)\r
+#define SekSetStop(x) { \\r
+ PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \\r
+ if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
+}\r
+#define SekSetStopS68k(x) { \\r
+ PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \\r
+ if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \\r
+}\r
+#define SekShouldInterrupt fm68k_would_interrupt()\r
+\r
+#define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq\r
+\r
+#ifdef EMU_M68K\r
+#define EMU_CORE_DEBUG\r
+#endif\r
#endif\r
\r
#ifdef EMU_M68K\r
#include "../cpu/musashi/m68kcpu.h"\r
-extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
-extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r
+extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;\r
#ifndef SekCyclesLeft\r
-#define SekCyclesLeftNoMCD PicoM68kCPU.cyc_remaining_cycles\r
+#define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles\r
#define SekCyclesLeft \\r
(((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
#define SekCyclesLeftS68k \\r
- ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoS68kCPU.cyc_remaining_cycles)\r
+ ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)\r
#define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)\r
#define SekSetCyclesLeft(c) { \\r
if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \\r
}\r
-#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r
-#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r
+#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)\r
+#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)\r
#define SekSetStop(x) { \\r
- if(x) { SET_CYCLES(0); PicoM68kCPU.stopped=STOP_LEVEL_STOP; } \\r
- else PicoM68kCPU.stopped=0; \\r
+ if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \\r
+ else PicoCpuMM68k.stopped=0; \\r
}\r
#define SekSetStopS68k(x) { \\r
- if(x) { SET_CYCLES(0); PicoS68kCPU.stopped=STOP_LEVEL_STOP; } \\r
- else PicoS68kCPU.stopped=0; \\r
+ if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \\r
+ else PicoCpuMS68k.stopped=0; \\r
+}\r
+#define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)\r
+\r
+#define SekInterrupt(irq) {\r
+ void *oldcontext = m68ki_cpu_p; \\r
+ m68k_set_context(&PicoCpuMM68k); \\r
+ m68k_set_irq(irq); \\r
+ m68k_set_context(oldcontext); \\r
}\r
+\r
#endif\r
#endif\r
\r
extern int SekCycleAim; // cycle aim\r
extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
\r
-#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}\r
+#define SekCyclesReset() { \\r
+ SekCycleCntT+=SekCycleAim; \\r
+ SekCycleCnt-=SekCycleAim; \\r
+ SekCycleAim=0; \\r
+}\r
#define SekCyclesBurn(c) SekCycleCnt+=c\r
#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)\r
#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
extern int SekCycleCntS68k;\r
extern int SekCycleAimS68k;\r
\r
-#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r
+#define SekCyclesResetS68k() { \\r
+ SekCycleCntS68k-=SekCycleAimS68k; \\r
+ SekCycleAimS68k=0; \\r
+}\r
#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r
\r
-// debug cyclone\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
#undef SekSetCyclesLeftNoMCD\r
#undef SekSetCyclesLeft\r
#undef SekCyclesBurn\r
#undef SekEndRun\r
#define SekSetCyclesLeftNoMCD(c)\r
#define SekSetCyclesLeft(c)\r
-#define SekCyclesBurn(c)\r
+#define SekCyclesBurn(c) c\r
#define SekEndRun(c)\r
#endif\r
\r
-extern int PicoMCD;\r
+// ----------------------- Z80 CPU -----------------------\r
+\r
+#if defined(_USE_MZ80)\r
+#include "../../cpu/mz80/mz80.h"\r
+\r
+#define z80_run(cycles) mz80_run(cycles)\r
+#define z80_run_nr(cycles) mz80_run(cycles)\r
+#define z80_int() mz80int(0)\r
+#define z80_resetCycles() mz80GetElapsedTicks(1)\r
+\r
+#elif defined(_USE_DRZ80)\r
+#include "../../cpu/DrZ80/drz80.h"\r
+\r
+extern struct DrZ80 drZ80;\r
+\r
+#define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))\r
+#define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)\r
+#define z80_int() { \\r
+ drZ80.z80irqvector = 0xFF; /* default IRQ vector RST opcode */ \\r
+ drZ80.Z80_IRQ = 1; \\r
+}\r
+#define z80_resetCycles()\r
+\r
+#elif defined(_USE_CZ80)\r
+#include "../../cpu/cz80/cz80.h"\r
+\r
+#define z80_run(cycles) Cz80_Exec(&CZ80, cycles)\r
+#define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)\r
+#define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)\r
+#define z80_resetCycles()\r
+\r
+#else\r
+\r
+#define z80_run(cycles) (cycles)\r
+#define z80_run_nr(cycles)\r
+#define z80_int()\r
+#define z80_resetCycles()\r
+\r
+#endif\r
\r
// ---------------------------------------------------------\r
\r
+extern int PicoMCD;\r
+\r
// main oscillator clock which controls timing\r
#define OSC_NTSC 53693100\r
-#define OSC_PAL 53203424 // not accurate\r
+// seems to be accurate, see scans from http://www.hot.ee/tmeeco/\r
+#define OSC_PAL 53203424\r
\r
struct PicoVideo\r
{\r
unsigned char reg[0x20];\r
- unsigned int command; // 32-bit Command\r
- unsigned char pending; // 1 if waiting for second half of 32-bit command\r
- unsigned char type; // Command type (v/c/vsram read/write)\r
- unsigned short addr; // Read/Write address\r
- int status; // Status bits\r
+ unsigned int command; // 32-bit Command\r
+ unsigned char pending; // 1 if waiting for second half of 32-bit command\r
+ unsigned char type; // Command type (v/c/vsram read/write)\r
+ unsigned short addr; // Read/Write address\r
+ int status; // Status bits\r
unsigned char pending_ints; // pending interrupts: ??VH????\r
- unsigned char pad[0x13];\r
+ signed char lwrite_cnt; // VDP write count during active display line\r
+ unsigned char pad[0x12];\r
};\r
\r
struct PicoMisc\r
{\r
unsigned char rotate;\r
unsigned char z80Run;\r
- unsigned char padTHPhase[2]; // phase of gamepad TH switches\r
- short scanline; // 0 to 261||311; -1 in fast mode\r
- char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
- unsigned char hardware; // Hardware value for country\r
- unsigned char pal; // 1=PAL 0=NTSC\r
- unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
- unsigned short z80_bank68k;\r
+ unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches\r
+ short scanline; // 04 0 to 261||311; -1 in fast mode\r
+ char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
+ unsigned char hardware; // 07 Hardware value for country\r
+ unsigned char pal; // 08 1=PAL 0=NTSC\r
+ unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
+ unsigned short z80_bank68k; // 0a\r
unsigned short z80_lastaddr; // this is for Z80 faking\r
unsigned char z80_fakeval;\r
unsigned char pad0;\r
- unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay\r
- unsigned short sram_addr; // EEPROM address register\r
- unsigned char sram_cycle; // EEPROM SRAM cycle number\r
- unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r
+ unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay\r
+ unsigned short eeprom_addr; // EEPROM address register\r
+ unsigned char eeprom_cycle; // EEPROM SRAM cycle number\r
+ unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs\r
unsigned char prot_bytes[2]; // simple protection faking\r
- unsigned short dma_bytes; //\r
+ unsigned short dma_xfers;\r
unsigned char pad[2];\r
unsigned int frame_count; // mainly for movies\r
};\r
unsigned char *data; // actual data\r
unsigned int start; // start address in 68k address space\r
unsigned int end;\r
- unsigned char resize; // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset\r
- unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r
+ unsigned char unused1; // 0c: unused\r
+ unsigned char unused2;\r
unsigned char changed;\r
- unsigned char pad;\r
+ unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words\r
+ unsigned char eeprom_abits; // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out\r
+ unsigned char eeprom_bit_cl; // bit number for cl\r
+ unsigned char eeprom_bit_in; // bit number for in\r
+ unsigned char eeprom_bit_out; // bit number for out\r
};\r
\r
// MCD\r
#define Pico_mcd ((mcd_state *)Pico.rom)\r
\r
// Area.c\r
-int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
-int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r
+PICO_INTERNAL int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
+PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r
\r
// cd/Area.c\r
-int PicoCdSaveState(void *file);\r
-int PicoCdLoadState(void *file);\r
-int PicoCdLoadStateGfx(void *file);\r
+PICO_INTERNAL int PicoCdSaveState(void *file);\r
+PICO_INTERNAL int PicoCdLoadState(void *file);\r
+\r
+// Cart.c\r
+PICO_INTERNAL void PicoCartDetect(void);\r
+\r
+// Debug.c\r
+int CM_compareRun(int cyc, int is_sub);\r
\r
// Draw.c\r
-int PicoLine(int scan);\r
-void PicoFrameStart();\r
+PICO_INTERNAL int PicoLine(int scan);\r
+PICO_INTERNAL void PicoFrameStart(void);\r
\r
// Draw2.c\r
-void PicoFrameFull();\r
+PICO_INTERNAL void PicoFrameFull();\r
\r
// Memory.c\r
-int PicoInitPc(unsigned int pc);\r
-unsigned int CPU_CALL PicoRead32(unsigned int a);\r
-void PicoMemSetup();\r
-void PicoMemReset();\r
-//void PicoDasm(int start,int len);\r
-unsigned char z80_read(unsigned short a);\r
-unsigned short z80_read16(unsigned short a);\r
-void z80_write(unsigned char data, unsigned short a);\r
-void z80_write16(unsigned short data, unsigned short a);\r
+PICO_INTERNAL int PicoInitPc(unsigned int pc);\r
+PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a);\r
+PICO_INTERNAL void PicoMemSetup(void);\r
+PICO_INTERNAL_ASM void PicoMemReset(void);\r
+PICO_INTERNAL int PadRead(int i);\r
+PICO_INTERNAL unsigned char z80_read(unsigned short a);\r
+#ifndef _USE_CZ80\r
+PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a);\r
+PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a);\r
+PICO_INTERNAL unsigned short z80_read16(unsigned short a);\r
+#else\r
+PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data);\r
+#endif\r
\r
// cd/Memory.c\r
-void PicoMemSetupCD(void);\r
-void PicoMemResetCD(int r3);\r
-void PicoMemResetCDdecode(int r3);\r
-unsigned char PicoReadCD8 (unsigned int a);\r
-unsigned short PicoReadCD16(unsigned int a);\r
-unsigned int PicoReadCD32(unsigned int a);\r
-void PicoWriteCD8 (unsigned int a, unsigned char d);\r
-void PicoWriteCD16(unsigned int a, unsigned short d);\r
-void PicoWriteCD32(unsigned int a, unsigned int d);\r
+PICO_INTERNAL void PicoMemSetupCD(void);\r
+PICO_INTERNAL_ASM void PicoMemResetCD(int r3);\r
+PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);\r
\r
// Pico.c\r
extern struct Pico Pico;\r
extern struct PicoSRAM SRam;\r
extern int emustatus;\r
extern int z80startCycle, z80stopCycle; // in 68k cycles\r
-int CheckDMA(void);\r
+PICO_INTERNAL int CheckDMA(void);\r
\r
// cd/Pico.c\r
-int PicoInitMCD(void);\r
-void PicoExitMCD(void);\r
-int PicoResetMCD(int hard);\r
+PICO_INTERNAL int PicoInitMCD(void);\r
+PICO_INTERNAL void PicoExitMCD(void);\r
+PICO_INTERNAL int PicoResetMCD(int hard);\r
+PICO_INTERNAL int PicoFrameMCD(void);\r
\r
// Sek.c\r
-int SekInit(void);\r
-int SekReset(void);\r
-int SekInterrupt(int irq);\r
-void SekState(unsigned char *data);\r
-void SekSetRealTAS(int use_real);\r
+PICO_INTERNAL int SekInit(void);\r
+PICO_INTERNAL int SekReset(void);\r
+PICO_INTERNAL void SekState(int *data);\r
+PICO_INTERNAL void SekSetRealTAS(int use_real);\r
\r
// cd/Sek.c\r
-int SekInitS68k(void);\r
-int SekResetS68k(void);\r
-int SekInterruptS68k(int irq);\r
+PICO_INTERNAL int SekInitS68k(void);\r
+PICO_INTERNAL int SekResetS68k(void);\r
+PICO_INTERNAL int SekInterruptS68k(int irq);\r
\r
// sound/sound.c\r
extern int PsndLen_exc_cnt;\r
extern int PsndLen_exc_add;\r
\r
// VideoPort.c\r
-void PicoVideoWrite(unsigned int a,unsigned short d);\r
-unsigned int PicoVideoRead(unsigned int a);\r
+PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);\r
+PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);\r
\r
// Misc.c\r
-void SRAMWriteEEPROM(unsigned int d);\r
-unsigned int SRAMReadEEPROM();\r
-void SRAMUpdPending(unsigned int a, unsigned int d);\r
-void memcpy16(unsigned short *dest, unsigned short *src, int count);\r
-void memcpy16bswap(unsigned short *dest, void *src, int count);\r
-void memcpy32(int *dest, int *src, int count); // 32bit word count\r
-void memset32(int *dest, int c, int count);\r
+PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);\r
+PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d);\r
+PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void);\r
+PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count);\r
+PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);\r
+PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count\r
+PICO_INTERNAL_ASM void memset32(int *dest, int c, int count);\r
\r
// cd/Misc.c\r
-void wram_2M_to_1M(unsigned char *m);\r
-void wram_1M_to_2M(unsigned char *m);\r
+PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);\r
+PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);\r
+\r
+// cd/buffering.c\r
+PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba);\r
+\r
+// sound/sound.c\r
+PICO_INTERNAL void PsndReset(void);\r
+PICO_INTERNAL void Psnd_timers_and_dac(int raster);\r
+PICO_INTERNAL int PsndRender(int offset, int length);\r
+PICO_INTERNAL void PsndClear(void);\r
+// z80 functionality wrappers\r
+PICO_INTERNAL void z80_init(void);\r
+PICO_INTERNAL void z80_pack(unsigned char *data);\r
+PICO_INTERNAL void z80_unpack(unsigned char *data);\r
+PICO_INTERNAL void z80_reset(void);\r
+PICO_INTERNAL void z80_exit(void);\r
\r
\r
#ifdef __cplusplus\r
} // End of extern "C"\r
#endif\r
+\r
+// emulation event logging\r
+#ifndef EL_LOGMASK\r
+#define EL_LOGMASK 0\r
+#endif\r
+\r
+#define EL_HVCNT 0x0001 /* hv counter reads */\r
+#define EL_SR 0x0002 /* SR reads */\r
+#define EL_INTS 0x0004 /* ints and acks */\r
+#define EL_YM2612R 0x0008 /* 68k ym2612 reads */\r
+#define EL_INTSW 0x0010 /* log irq switching on/off */\r
+#define EL_ASVDP 0x0020 /* VDP accesses during active scan */\r
+#define EL_VDPDMA 0x0040 /* VDP DMA transfers and their timing */\r
+#define EL_BUSREQ 0x0080 /* z80 busreq r/w or reset w */\r
+#define EL_Z80BNK 0x0100 /* z80 i/o through bank area */\r
+#define EL_SRAMIO 0x0200 /* sram i/o */\r
+#define EL_EEPROM 0x0400 /* eeprom debug */\r
+#define EL_UIO 0x0800 /* unmapped i/o */\r
+#define EL_IO 0x1000 /* all i/o (TODO) */\r
+\r
+#define EL_STATUS 0x4000 /* status messages */\r
+#define EL_ANOMALY 0x8000 /* some unexpected conditions */\r
+\r
+#if EL_LOGMASK\r
+#define elprintf(w,f,...) \\r
+{ \\r
+ if ((w) & EL_LOGMASK) \\r
+ printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \\r
+}\r
+#else\r
+#define elprintf(w,f,...)\r
+#endif\r
+\r
+#endif // PICO_INTERNAL_INCLUDED\r
+\r
notaz.gp2x.de / picodrive.git / blobdiff