updated EEPROM code, gmv fixed

[picodrive.git] / Pico / PicoInt.h

diff --git a/Pico/PicoInt.h b/Pico/PicoInt.h
index e922943..6105f61 100644 (file)
--- a/Pico/PicoInt.h
+++ b/Pico/PicoInt.h
@@ -101,7 +101,11 @@ extern int SekCycleCnt; // cycles done in this frame
 extern int SekCycleAim; // cycle aim\r
 extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
 \r
-#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}\r
+#define SekCyclesReset() { \\r
+       SekCycleCntT+=SekCycleAim; \\r
+       SekCycleCnt-=SekCycleAim; \\r
+       SekCycleAim=0; \\r
+}\r
 #define SekCyclesBurn(c)  SekCycleCnt+=c\r
 #define SekCyclesDone()  (SekCycleAim-SekCyclesLeft)    // nuber of cycles done in this frame (can be checked anywhere)\r
 #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
@@ -136,18 +140,20 @@ extern int PicoMCD;
 \r
 // main oscillator clock which controls timing\r
 #define OSC_NTSC 53693100\r
-#define OSC_PAL  53203424 // not accurate\r
+// seems to be accurate, see scans from http://www.hot.ee/tmeeco/\r
+#define OSC_PAL  53203424\r
 \r
 struct PicoVideo\r
 {\r
   unsigned char reg[0x20];\r
-  unsigned int command; // 32-bit Command\r
-  unsigned char pending; // 1 if waiting for second half of 32-bit command\r
-  unsigned char type; // Command type (v/c/vsram read/write)\r
-  unsigned short addr; // Read/Write address\r
-  int status; // Status bits\r
+  unsigned int command;       // 32-bit Command\r
+  unsigned char pending;      // 1 if waiting for second half of 32-bit command\r
+  unsigned char type;         // Command type (v/c/vsram read/write)\r
+  unsigned short addr;        // Read/Write address\r
+  int status;                 // Status bits\r
   unsigned char pending_ints; // pending interrupts: ??VH????\r
-  unsigned char pad[0x13];\r
+  signed char lwrite_cnt;     // VDP write count during active display line\r
+  unsigned char pad[0x12];\r
 };\r
 \r
 struct PicoMisc\r
@@ -165,11 +171,11 @@ struct PicoMisc
   unsigned char  z80_fakeval;\r
   unsigned char  pad0;\r
   unsigned char  padDelay[2];  // 10 gamepad phase time outs, so we count a delay\r
-  unsigned short sram_addr;  // EEPROM address register\r
-  unsigned char sram_cycle;  // EEPROM SRAM cycle number\r
-  unsigned char sram_slave;  // EEPROM slave word for X24C02 and better SRAMs\r
+  unsigned short eeprom_addr;  // EEPROM address register\r
+  unsigned char  eeprom_cycle; // EEPROM SRAM cycle number\r
+  unsigned char  eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs\r
   unsigned char prot_bytes[2]; // simple protection faking\r
-  unsigned short dma_bytes;  //\r
+  unsigned short dma_xfers;\r
   unsigned char pad[2];\r
   unsigned int  frame_count; // mainly for movies\r
 };\r
@@ -198,10 +204,14 @@ struct PicoSRAM
   unsigned char *data;         // actual data\r
   unsigned int start;          // start address in 68k address space\r
   unsigned int end;\r
-  unsigned char resize;                // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset\r
-  unsigned char reg_back;      // copy of Pico.m.sram_reg to set after reset\r
+  unsigned char unused1;       // 0c: unused\r
+  unsigned char unused2;\r
   unsigned char changed;\r
-  unsigned char pad;\r
+  unsigned char eeprom_type;    // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words\r
+  unsigned char eeprom_abits;  // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out\r
+  unsigned char eeprom_bit_cl; // bit number for cl\r
+  unsigned char eeprom_bit_in;  // bit number for in\r
+  unsigned char eeprom_bit_out; // bit number for out\r
 };\r
 \r
 // MCD\r
@@ -285,6 +295,9 @@ PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);
 PICO_INTERNAL int PicoCdSaveState(void *file);\r
 PICO_INTERNAL int PicoCdLoadState(void *file);\r
 \r
+// Cart.c\r
+PICO_INTERNAL void PicoCartDetect(void);\r
+\r
 // Draw.c\r
 PICO_INTERNAL int PicoLine(int scan);\r
 PICO_INTERNAL void PicoFrameStart(void);\r
@@ -377,5 +390,37 @@ PICO_INTERNAL void z80_exit(void);
 } // End of extern "C"\r
 #endif\r
 \r
+// emulation event logging\r
+#ifndef EL_LOGMASK\r
+#define EL_LOGMASK 0\r
+#endif\r
+\r
+#define EL_HVCNT   0x0001 /* hv counter reads */\r
+#define EL_SR      0x0002 /* SR reads */\r
+#define EL_INTS    0x0004 /* ints and acks */\r
+#define EL_YM2612R 0x0008 /* 68k ym2612 reads */\r
+#define EL_INTSW   0x0010 /* log irq switching on/off */\r
+#define EL_ASVDP   0x0020 /* VDP accesses during active scan */\r
+#define EL_VDPDMA  0x0040 /* VDP DMA transfers and their timing */\r
+#define EL_BUSREQ  0x0080 /* z80 busreq r/w */\r
+#define EL_Z80BNK  0x0100 /* z80 i/o through bank area */\r
+#define EL_SRAMIO  0x0200 /* sram i/o */\r
+#define EL_EEPROM  0x0400 /* eeprom debug */\r
+#define EL_UIO     0x0800 /* unmapped i/o */\r
+#define EL_IO      0x1000 /* all i/o */\r
+\r
+#define EL_STATUS  0x4000 /* status messages */\r
+#define EL_ANOMALY 0x8000 /* some unexpected conditions */\r
+\r
+#if EL_LOGMASK\r
+#define elprintf(w,f,...) \\r
+{ \\r
+       if ((w) & EL_LOGMASK) \\r
+               printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \\r
+}\r
+#else\r
+#define elprintf(w,f,...)\r
+#endif\r
+\r
 #endif // PICO_INTERNAL_INCLUDED\r
 \r