FAME + some random stuff added

[picodrive.git] / Pico / PicoInt.h

diff --git a/Pico/PicoInt.h b/Pico/PicoInt.h
index 7af451c..a6fceff 100644 (file)
--- a/Pico/PicoInt.h
+++ b/Pico/PicoInt.h
@@ -24,7 +24,7 @@
 #define PICO_INTERNAL_ASM\r
 #endif\r
 \r
-// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r
+// to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project\r
 \r
 #ifdef __cplusplus\r
 extern "C" {\r
@@ -50,24 +50,28 @@ extern struct Cyclone PicoCpu, PicoCpuS68k;
 #define SekSetStopS68k(x) { PicoCpuS68k.state_flags&=~1; if (x) { PicoCpuS68k.state_flags|=1; PicoCpuS68k.cycles=0; } }\r
 #endif\r
 \r
-#ifdef EMU_A68K\r
-void __cdecl M68000_RUN();\r
-// The format of the data in a68k.asm (at the _M68000_regs location)\r
-struct A68KContext\r
-{\r
-  unsigned int d[8],a[8];\r
-  unsigned int isp,srh,ccr,xc,pc,irq,sr;\r
-  int (*IrqCallback) (int nIrq);\r
-  unsigned int ppc;\r
-  void *pResetCallback;\r
-  unsigned int sfc,dfc,usp,vbr;\r
-  unsigned int AsmBank,CpuVersion;\r
-};\r
-struct A68KContext M68000_regs;\r
-extern int m68k_ICount;\r
-#define SekCyclesLeft m68k_ICount\r
-#define SekSetCyclesLeft(c) m68k_ICount=c\r
-#define SekPc M68000_regs.pc\r
+#ifdef EMU_F68K\r
+#include "../cpu/fame/fame.h"\r
+M68K_CONTEXT PicoCpuM68k, PicoCpuS68k;\r
+#define SekCyclesLeftNoMCD PicoCpuM68k.io_cycle_counter\r
+#define SekCyclesLeft \\r
+       (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
+#define SekCyclesLeftS68k \\r
+       ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.io_cycle_counter)\r
+#define SekSetCyclesLeftNoMCD(c) PicoCpuM68k.io_cycle_counter=c\r
+#define SekSetCyclesLeft(c) { \\r
+       if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
+}\r
+#define SekPc     m68k_get_pc(&PicoCpuM68k)\r
+#define SekPcS68k m68k_get_pc(&PicoCpuS68k)\r
+#define SekSetStop(x) { \\r
+       PicoCpuM68k.execinfo &= ~M68K_HALTED; \\r
+       if (x) { PicoCpuM68k.execinfo |= M68K_HALTED; PicoCpuM68k.io_cycle_counter = 0; } \\r
+}\r
+#define SekSetStopS68k(x) { \\r
+       PicoCpuS68k.execinfo &= ~M68K_HALTED; \\r
+       if (x) { PicoCpuS68k.execinfo |= M68K_HALTED; PicoCpuS68k.io_cycle_counter = 0; } \\r
+}\r
 #endif\r
 \r
 #ifdef EMU_M68K\r
@@ -119,7 +123,10 @@ extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
 extern int SekCycleCntS68k;\r
 extern int SekCycleAimS68k;\r
 \r
-#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r
+#define SekCyclesResetS68k() { \\r
+       SekCycleCntS68k-=SekCycleAimS68k; \\r
+       SekCycleAimS68k=0; \\r
+}\r
 #define SekCyclesDoneS68k()  (SekCycleAimS68k-SekCyclesLeftS68k)\r
 \r
 // debug cyclone\r
@@ -134,10 +141,10 @@ extern int SekCycleAimS68k;
 #define SekEndRun(c)\r
 #endif\r
 \r
-extern int PicoMCD;\r
-\r
 // ---------------------------------------------------------\r
 \r
+extern int PicoMCD;\r
+\r
 // main oscillator clock which controls timing\r
 #define OSC_NTSC 53693100\r
 // seems to be accurate, see scans from http://www.hot.ee/tmeeco/\r
@@ -171,9 +178,9 @@ struct PicoMisc
   unsigned char  z80_fakeval;\r
   unsigned char  pad0;\r
   unsigned char  padDelay[2];  // 10 gamepad phase time outs, so we count a delay\r
-  unsigned short sram_addr;  // EEPROM address register\r
-  unsigned char sram_cycle;  // EEPROM SRAM cycle number\r
-  unsigned char sram_slave;  // EEPROM slave word for X24C02 and better SRAMs\r
+  unsigned short eeprom_addr;  // EEPROM address register\r
+  unsigned char  eeprom_cycle; // EEPROM SRAM cycle number\r
+  unsigned char  eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs\r
   unsigned char prot_bytes[2]; // simple protection faking\r
   unsigned short dma_xfers;\r
   unsigned char pad[2];\r
@@ -204,10 +211,14 @@ struct PicoSRAM
   unsigned char *data;         // actual data\r
   unsigned int start;          // start address in 68k address space\r
   unsigned int end;\r
-  unsigned char resize;                // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset\r
-  unsigned char reg_back;      // copy of Pico.m.sram_reg to set after reset\r
+  unsigned char unused1;       // 0c: unused\r
+  unsigned char unused2;\r
   unsigned char changed;\r
-  unsigned char pad;\r
+  unsigned char eeprom_type;    // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words\r
+  unsigned char eeprom_abits;  // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out\r
+  unsigned char eeprom_bit_cl; // bit number for cl\r
+  unsigned char eeprom_bit_in;  // bit number for in\r
+  unsigned char eeprom_bit_out; // bit number for out\r
 };\r
 \r
 // MCD\r
@@ -291,6 +302,9 @@ PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);
 PICO_INTERNAL int PicoCdSaveState(void *file);\r
 PICO_INTERNAL int PicoCdLoadState(void *file);\r
 \r
+// Cart.c\r
+PICO_INTERNAL void PicoCartDetect(void);\r
+\r
 // Draw.c\r
 PICO_INTERNAL int PicoLine(int scan);\r
 PICO_INTERNAL void PicoFrameStart(void);\r
@@ -395,8 +409,12 @@ PICO_INTERNAL void z80_exit(void);
 #define EL_INTSW   0x0010 /* log irq switching on/off */\r
 #define EL_ASVDP   0x0020 /* VDP accesses during active scan */\r
 #define EL_VDPDMA  0x0040 /* VDP DMA transfers and their timing */\r
-#define EL_BUSREQ  0x0080 /* z80 busreq r/w */\r
+#define EL_BUSREQ  0x0080 /* z80 busreq r/w or reset w */\r
 #define EL_Z80BNK  0x0100 /* z80 i/o through bank area */\r
+#define EL_SRAMIO  0x0200 /* sram i/o */\r
+#define EL_EEPROM  0x0400 /* eeprom debug */\r
+#define EL_UIO     0x0800 /* unmapped i/o */\r
+#define EL_IO      0x1000 /* all i/o (TODO) */\r
 \r
 #define EL_STATUS  0x4000 /* status messages */\r
 #define EL_ANOMALY 0x8000 /* some unexpected conditions */\r