// Pico Library - Internal Header File\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved.\r
+// (c) Copyright 2006-2008 Grazvydas "notaz" Ignotas, all rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
#include <stdlib.h>\r
#include <string.h>\r
#include "Pico.h"\r
+#include "carthw/carthw.h"\r
\r
//\r
#define USE_POLL_DETECT\r
extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;\r
#define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run\r
#define SekCyclesLeft \\r
- (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
+ (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
#define SekCyclesLeftS68k \\r
- ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)\r
+ ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)\r
#define SekSetCyclesLeftNoMCD(c) PicoCpuCM68k.cycles=c\r
#define SekSetCyclesLeft(c) { \\r
- if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
+ if ((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
}\r
#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)\r
#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)\r
#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
+#define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)\r
+#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
+\r
+#define SekInterrupt(i) PicoCpuCM68k.irq=i\r
+\r
+#ifdef EMU_M68K\r
+#define EMU_CORE_DEBUG\r
+#endif\r
#endif\r
\r
#ifdef EMU_F68K\r
#include "../cpu/fame/fame.h"\r
-M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;\r
+extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;\r
#define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter\r
#define SekCyclesLeft \\r
- (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
+ (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
#define SekCyclesLeftS68k \\r
- ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)\r
+ ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)\r
#define SekSetCyclesLeftNoMCD(c) PicoCpuFM68k.io_cycle_counter=c\r
#define SekSetCyclesLeft(c) { \\r
- if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
+ if ((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
}\r
-#define SekPc m68k_get_pc(&PicoCpuFM68k)\r
-#define SekPcS68k m68k_get_pc(&PicoCpuFS68k)\r
+#define SekPc fm68k_get_pc(&PicoCpuFM68k)\r
+#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)\r
#define SekSetStop(x) { \\r
- PicoCpuFM68k.execinfo &= ~M68K_HALTED; \\r
- if (x) { PicoCpuFM68k.execinfo |= M68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
+ PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \\r
+ if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
}\r
#define SekSetStopS68k(x) { \\r
- PicoCpuFS68k.execinfo &= ~M68K_HALTED; \\r
- if (x) { PicoCpuFS68k.execinfo |= M68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \\r
+ PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \\r
+ if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \\r
}\r
+#define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)\r
+#define SekShouldInterrupt fm68k_would_interrupt()\r
+\r
+#define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq\r
+\r
+#ifdef EMU_M68K\r
+#define EMU_CORE_DEBUG\r
+#endif\r
#endif\r
\r
#ifdef EMU_M68K\r
#ifndef SekCyclesLeft\r
#define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles\r
#define SekCyclesLeft \\r
- (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
+ (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
#define SekCyclesLeftS68k \\r
- ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)\r
+ ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)\r
#define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)\r
#define SekSetCyclesLeft(c) { \\r
- if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \\r
+ if ((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \\r
}\r
#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)\r
#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)\r
if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \\r
else PicoCpuMS68k.stopped=0; \\r
}\r
+#define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)\r
+#define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)\r
+\r
+#define SekInterrupt(irq) { \\r
+ void *oldcontext = m68ki_cpu_p; \\r
+ m68k_set_context(&PicoCpuMM68k); \\r
+ m68k_set_irq(irq); \\r
+ m68k_set_context(oldcontext); \\r
+}\r
+\r
#endif\r
#endif\r
\r
SekCycleAim=0; \\r
}\r
#define SekCyclesBurn(c) SekCycleCnt+=c\r
-#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)\r
+#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere)\r
#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
\r
#define SekEndRun(after) { \\r
}\r
#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r
\r
-// debug cyclone\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
+extern int dbg_irq_level;\r
#undef SekSetCyclesLeftNoMCD\r
#undef SekSetCyclesLeft\r
#undef SekCyclesBurn\r
#undef SekEndRun\r
+#undef SekInterrupt\r
#define SekSetCyclesLeftNoMCD(c)\r
#define SekSetCyclesLeft(c)\r
#define SekCyclesBurn(c) c\r
#define SekEndRun(c)\r
+#define SekInterrupt(irq) dbg_irq_level=irq\r
#endif\r
\r
-// ---------------------------------------------------------\r
+// ----------------------- Z80 CPU -----------------------\r
+\r
+#if defined(_USE_MZ80)\r
+#include "../cpu/mz80/mz80.h"\r
\r
-extern int PicoMCD;\r
+#define z80_run(cycles) { mz80GetElapsedTicks(1); mz80_run(cycles) }\r
+#define z80_run_nr(cycles) mz80_run(cycles)\r
+#define z80_int() mz80int(0)\r
+\r
+#elif defined(_USE_DRZ80)\r
+#include "../cpu/DrZ80/drz80.h"\r
+\r
+extern struct DrZ80 drZ80;\r
+\r
+#define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))\r
+#define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)\r
+#define z80_int() drZ80.Z80_IRQ = 1\r
+\r
+#define z80_cyclesLeft drZ80.cycles\r
+\r
+#elif defined(_USE_CZ80)\r
+#include "../cpu/cz80/cz80.h"\r
+\r
+#define z80_run(cycles) Cz80_Exec(&CZ80, cycles)\r
+#define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)\r
+#define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)\r
+\r
+#define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)\r
+\r
+#else\r
+\r
+#define z80_run(cycles) (cycles)\r
+#define z80_run_nr(cycles)\r
+#define z80_int()\r
+\r
+#endif\r
+\r
+extern int z80stopCycle; /* in 68k cycles */\r
+extern int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
+extern int z80_cycle_aim;\r
+extern int z80_scanline;\r
+extern int z80_scanline_cycles; /* cycles done until z80_scanline */\r
+\r
+#define z80_resetCycles() \\r
+ z80_cycle_cnt = z80_cycle_aim = z80_scanline = z80_scanline_cycles = 0;\r
+\r
+#define z80_cyclesDone() \\r
+ (z80_cycle_aim - z80_cyclesLeft)\r
+\r
+#define cycles_68k_to_z80(x) ((x)*957 >> 11)\r
+\r
+// ---------------------------------------------------------\r
\r
// main oscillator clock which controls timing\r
#define OSC_NTSC 53693100\r
int status; // Status bits\r
unsigned char pending_ints; // pending interrupts: ??VH????\r
signed char lwrite_cnt; // VDP write count during active display line\r
- unsigned char pad[0x12];\r
+ unsigned short v_counter; // V-counter\r
+ unsigned char pad[0x10];\r
};\r
\r
struct PicoMisc\r
unsigned char rotate;\r
unsigned char z80Run;\r
unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches\r
- short scanline; // 04 0 to 261||311; -1 in fast mode\r
+ unsigned short scanline; // 04 0 to 261||311\r
char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
unsigned char hardware; // 07 Hardware value for country\r
unsigned char pal; // 08 1=PAL 0=NTSC\r
unsigned short z80_bank68k; // 0a\r
unsigned short z80_lastaddr; // this is for Z80 faking\r
unsigned char z80_fakeval;\r
- unsigned char pad0;\r
+ unsigned char z80_reset; // z80 reset held\r
unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay\r
unsigned short eeprom_addr; // EEPROM address register\r
unsigned char eeprom_cycle; // EEPROM SRAM cycle number\r
unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs\r
unsigned char prot_bytes[2]; // simple protection faking\r
- unsigned short dma_xfers;\r
+ unsigned short dma_xfers; // 18\r
unsigned char pad[2];\r
- unsigned int frame_count; // mainly for movies\r
+ unsigned int frame_count; // 1c for movies and idle det\r
};\r
\r
// some assembly stuff depend on these, do not touch!\r
unsigned char s68k_pend_ints;\r
unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending\r
unsigned int counter75hz;\r
- unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023)\r
- unsigned char audio_track; // playing audio track # (zero based)\r
- char pad1;\r
+ unsigned int pad0;\r
int timer_int3; // 10\r
unsigned int timer_stopwatch;\r
unsigned char bcram_reg; // 18: battery-backed RAM cart register\r
union { // 0a0000: 256K\r
struct {\r
unsigned char word_ram2M[0x40000];\r
- unsigned char unused[0x20000];\r
+ unsigned char unused0[0x20000];\r
};\r
struct {\r
- unsigned char unused[0x20000];\r
+ unsigned char unused1[0x20000];\r
unsigned char word_ram1M[2][0x20000];\r
};\r
};\r
\r
#define Pico_mcd ((mcd_state *)Pico.rom)\r
\r
+\r
// Area.c\r
-PICO_INTERNAL int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
-PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r
+PICO_INTERNAL void PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
+PICO_INTERNAL void PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r
+extern void (*PicoLoadStateHook)(void);\r
\r
// cd/Area.c\r
PICO_INTERNAL int PicoCdSaveState(void *file);\r
PICO_INTERNAL int PicoCdLoadState(void *file);\r
\r
+typedef struct {\r
+ int chunk;\r
+ int size;\r
+ void *ptr;\r
+} carthw_state_chunk;\r
+extern carthw_state_chunk *carthw_chunks;\r
+#define CHUNK_CARTHW 64\r
+\r
// Cart.c\r
-PICO_INTERNAL void PicoCartDetect(void);\r
+extern void (*PicoCartUnloadHook)(void);\r
+\r
+// Debug.c\r
+int CM_compareRun(int cyc, int is_sub);\r
\r
// Draw.c\r
-PICO_INTERNAL int PicoLine(int scan);\r
PICO_INTERNAL void PicoFrameStart(void);\r
+void PicoDrawSync(int to, int blank_last_line);\r
+extern int DrawScanline;\r
\r
// Draw2.c\r
PICO_INTERNAL void PicoFrameFull();\r
\r
// Memory.c\r
-PICO_INTERNAL int PicoInitPc(unsigned int pc);\r
+PICO_INTERNAL void PicoInitPc(unsigned int pc);\r
+PICO_INTERNAL unsigned int PicoCheckPc(unsigned int pc);\r
PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a);\r
PICO_INTERNAL void PicoMemSetup(void);\r
PICO_INTERNAL_ASM void PicoMemReset(void);\r
+PICO_INTERNAL void PicoMemResetHooks(void);\r
PICO_INTERNAL int PadRead(int i);\r
PICO_INTERNAL unsigned char z80_read(unsigned short a);\r
#ifndef _USE_CZ80\r
#else\r
PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data);\r
#endif\r
+PICO_INTERNAL int ym2612_write_local(unsigned int a, unsigned int d, int is_from_z80);\r
+extern unsigned int (*PicoRead16Hook)(unsigned int a, int realsize);\r
+extern void (*PicoWrite8Hook) (unsigned int a,unsigned int d,int realsize);\r
+extern void (*PicoWrite16Hook)(unsigned int a,unsigned int d,int realsize);\r
\r
// cd/Memory.c\r
PICO_INTERNAL void PicoMemSetupCD(void);\r
PICO_INTERNAL_ASM void PicoMemResetCD(int r3);\r
PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);\r
\r
+// Pico/Memory.c\r
+PICO_INTERNAL void PicoMemSetupPico(void);\r
+PICO_INTERNAL unsigned int ym2612_read_local_68k(void);\r
+\r
// Pico.c\r
extern struct Pico Pico;\r
extern struct PicoSRAM SRam;\r
extern int emustatus;\r
-extern int z80startCycle, z80stopCycle; // in 68k cycles\r
-PICO_INTERNAL int CheckDMA(void);\r
+extern void (*PicoResetHook)(void);\r
+extern void (*PicoLineHook)(int count);\r
+PICO_INTERNAL int CheckDMA(void);\r
+PICO_INTERNAL void PicoDetectRegion(void);\r
+PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done);\r
\r
// cd/Pico.c\r
-PICO_INTERNAL int PicoInitMCD(void);\r
+PICO_INTERNAL void PicoInitMCD(void);\r
PICO_INTERNAL void PicoExitMCD(void);\r
-PICO_INTERNAL int PicoResetMCD(int hard);\r
-PICO_INTERNAL int PicoFrameMCD(void);\r
+PICO_INTERNAL void PicoPowerMCD(void);\r
+PICO_INTERNAL int PicoResetMCD(void);\r
+PICO_INTERNAL void PicoFrameMCD(void);\r
+\r
+// Pico/Pico.c\r
+PICO_INTERNAL void PicoInitPico(void);\r
+PICO_INTERNAL void PicoReratePico(void);\r
+\r
+// Pico/xpcm.c\r
+PICO_INTERNAL void PicoPicoPCMUpdate(short *buffer, int length, int stereo);\r
+PICO_INTERNAL void PicoPicoPCMReset(void);\r
+PICO_INTERNAL void PicoPicoPCMRerate(int xpcm_rate);\r
\r
// Sek.c\r
-PICO_INTERNAL int SekInit(void);\r
-PICO_INTERNAL int SekReset(void);\r
-PICO_INTERNAL int SekInterrupt(int irq);\r
+PICO_INTERNAL void SekInit(void);\r
+PICO_INTERNAL int SekReset(void);\r
PICO_INTERNAL void SekState(int *data);\r
PICO_INTERNAL void SekSetRealTAS(int use_real);\r
+void SekInitIdleDet(void);\r
+void SekFinishIdleDet(void);\r
\r
// cd/Sek.c\r
-PICO_INTERNAL int SekInitS68k(void);\r
-PICO_INTERNAL int SekResetS68k(void);\r
-PICO_INTERNAL int SekInterruptS68k(int irq);\r
+PICO_INTERNAL void SekInitS68k(void);\r
+PICO_INTERNAL int SekResetS68k(void);\r
+PICO_INTERNAL int SekInterruptS68k(int irq);\r
\r
// sound/sound.c\r
+PICO_INTERNAL void cdda_start_play();\r
+extern short cdda_out_buffer[2*1152];\r
extern int PsndLen_exc_cnt;\r
extern int PsndLen_exc_add;\r
+extern int timer_a_next_oflow, timer_a_step; // in z80 cycles\r
+extern int timer_b_next_oflow, timer_b_step;\r
+\r
+void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new);\r
+void ym2612_pack_state(void);\r
+void ym2612_unpack_state(void);\r
+\r
+#define TIMER_NO_OFLOW 0x70000000\r
+// tA = 72 * (1024 - NA) / M\r
+#define TIMER_A_TICK_ZCYCLES 17203\r
+// tB = 1152 * (256 - NA) / M\r
+#define TIMER_B_TICK_ZCYCLES 262800 // 275251 broken, see Dai Makaimura\r
+\r
+#define timers_cycle() \\r
+ if (timer_a_next_oflow > 0 && timer_a_next_oflow < TIMER_NO_OFLOW) \\r
+ timer_a_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \\r
+ if (timer_b_next_oflow > 0 && timer_b_next_oflow < TIMER_NO_OFLOW) \\r
+ timer_b_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \\r
+ ym2612_sync_timers(0, ym2612.OPN.ST.mode, ym2612.OPN.ST.mode);\r
+\r
+#define timers_reset() \\r
+ timer_a_next_oflow = timer_b_next_oflow = TIMER_NO_OFLOW; \\r
+ timer_a_step = TIMER_A_TICK_ZCYCLES * 1024; \\r
+ timer_b_step = TIMER_B_TICK_ZCYCLES * 256;\r
+\r
\r
// VideoPort.c\r
PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);\r
PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);\r
+PICO_INTERNAL_ASM unsigned int PicoVideoRead8(unsigned int a);\r
+extern int (*PicoDmaHook)(unsigned int source, int len, unsigned short **srcp, unsigned short **limitp);\r
\r
// Misc.c\r
PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);\r
PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba);\r
\r
// sound/sound.c\r
-PICO_INTERNAL void sound_reset(void);\r
-PICO_INTERNAL void sound_timers_and_dac(int raster);\r
-PICO_INTERNAL int sound_render(int offset, int length);\r
-PICO_INTERNAL void sound_clear(void);\r
+PICO_INTERNAL void PsndReset(void);\r
+PICO_INTERNAL void PsndDoDAC(int line_to);\r
+PICO_INTERNAL int PsndRender(int offset, int length);\r
+PICO_INTERNAL void PsndClear(void);\r
// z80 functionality wrappers\r
PICO_INTERNAL void z80_init(void);\r
-PICO_INTERNAL void z80_resetCycles(void);\r
-PICO_INTERNAL void z80_int(void);\r
-PICO_INTERNAL int z80_run(int cycles);\r
PICO_INTERNAL void z80_pack(unsigned char *data);\r
PICO_INTERNAL void z80_unpack(unsigned char *data);\r
PICO_INTERNAL void z80_reset(void);\r
PICO_INTERNAL void z80_exit(void);\r
-\r
+extern int PsndDacLine;\r
\r
#ifdef __cplusplus\r
} // End of extern "C"\r
#define EL_LOGMASK 0\r
#endif\r
\r
-#define EL_HVCNT 0x0001 /* hv counter reads */\r
-#define EL_SR 0x0002 /* SR reads */\r
-#define EL_INTS 0x0004 /* ints and acks */\r
-#define EL_YM2612R 0x0008 /* 68k ym2612 reads */\r
-#define EL_INTSW 0x0010 /* log irq switching on/off */\r
-#define EL_ASVDP 0x0020 /* VDP accesses during active scan */\r
-#define EL_VDPDMA 0x0040 /* VDP DMA transfers and their timing */\r
-#define EL_BUSREQ 0x0080 /* z80 busreq r/w or reset w */\r
-#define EL_Z80BNK 0x0100 /* z80 i/o through bank area */\r
-#define EL_SRAMIO 0x0200 /* sram i/o */\r
-#define EL_EEPROM 0x0400 /* eeprom debug */\r
-#define EL_UIO 0x0800 /* unmapped i/o */\r
-#define EL_IO 0x1000 /* all i/o (TODO) */\r
-\r
-#define EL_STATUS 0x4000 /* status messages */\r
-#define EL_ANOMALY 0x8000 /* some unexpected conditions */\r
+#define EL_HVCNT 0x00000001 /* hv counter reads */\r
+#define EL_SR 0x00000002 /* SR reads */\r
+#define EL_INTS 0x00000004 /* ints and acks */\r
+#define EL_YMTIMER 0x00000008 /* ym2612 timer stuff */\r
+#define EL_INTSW 0x00000010 /* log irq switching on/off */\r
+#define EL_ASVDP 0x00000020 /* VDP accesses during active scan */\r
+#define EL_VDPDMA 0x00000040 /* VDP DMA transfers and their timing */\r
+#define EL_BUSREQ 0x00000080 /* z80 busreq r/w or reset w */\r
+#define EL_Z80BNK 0x00000100 /* z80 i/o through bank area */\r
+#define EL_SRAMIO 0x00000200 /* sram i/o */\r
+#define EL_EEPROM 0x00000400 /* eeprom debug */\r
+#define EL_UIO 0x00000800 /* unmapped i/o */\r
+#define EL_IO 0x00001000 /* all i/o */\r
+#define EL_CDPOLL 0x00002000 /* MCD: log poll detection */\r
+#define EL_SVP 0x00004000 /* SVP stuff */\r
+#define EL_PICOHW 0x00008000 /* Pico stuff */\r
+#define EL_IDLE 0x00010000 /* idle loop det. */\r
+\r
+#define EL_STATUS 0x40000000 /* status messages */\r
+#define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */\r
\r
#if EL_LOGMASK\r
+extern void lprintf(const char *fmt, ...);\r
#define elprintf(w,f,...) \\r
{ \\r
if ((w) & EL_LOGMASK) \\r
- printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \\r
+ lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \\r
}\r
+#elif defined(_MSC_VER)\r
+#define elprintf\r
#else\r
#define elprintf(w,f,...)\r
#endif\r
\r
+#ifdef _MSC_VER\r
+#define cdprintf\r
+#else\r
+#define cdprintf(x...)\r
+#endif\r
+\r
#endif // PICO_INTERNAL_INCLUDED\r
\r