{\r
unsigned char rotate;\r
unsigned char z80Run;\r
- unsigned char padTHPhase[2]; // phase of gamepad TH switches\r
- short scanline; // 0 to 261||311; -1 in fast mode\r
- char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
- unsigned char hardware; // Hardware value for country\r
- unsigned char pal; // 1=PAL 0=NTSC\r
- unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
- unsigned short z80_bank68k;\r
+ unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches\r
+ short scanline; // 04 0 to 261||311; -1 in fast mode\r
+ char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
+ unsigned char hardware; // 07 Hardware value for country\r
+ unsigned char pal; // 08 1=PAL 0=NTSC\r
+ unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
+ unsigned short z80_bank68k; // 0a\r
unsigned short z80_lastaddr; // this is for Z80 faking\r
unsigned char z80_fakeval;\r
unsigned char pad0;\r
- unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay\r
+ unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay\r
unsigned short sram_addr; // EEPROM address register\r
unsigned char sram_cycle; // EEPROM SRAM cycle number\r
unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r
PICO_INTERNAL_ASM unsigned int CPU_CALL PicoRead32(unsigned int a);\r
PICO_INTERNAL void PicoMemSetup(void);\r
PICO_INTERNAL_ASM void PicoMemReset(void);\r
+PICO_INTERNAL int PadRead(int i);\r
PICO_INTERNAL unsigned char z80_read(unsigned short a);\r
PICO_INTERNAL unsigned short z80_read16(unsigned short a);\r
PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a);\r