// Pico Library - Header File\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006 notaz, All rights reserved.\r
+// (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
#include <string.h>\r
#include "Pico.h"\r
\r
+//\r
+#define USE_POLL_DETECT\r
+\r
\r
// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r
\r
#ifdef EMU_C68K\r
#include "../cpu/Cyclone/Cyclone.h"\r
extern struct Cyclone PicoCpu, PicoCpuS68k;\r
-#define SekCyclesLeft PicoCpu.cycles // cycles left for this run\r
-#define SekSetCyclesLeft(c) PicoCpu.cycles=c\r
+#define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run\r
+#define SekCyclesLeft \\r
+ (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
+#define SekCyclesLeftS68k \\r
+ ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.cycles)\r
+#define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c\r
+#define SekSetCyclesLeft(c) { \\r
+ if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
+}\r
#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
+#define SekSetStop(x) { PicoCpu.stopped=x; if (x) PicoCpu.cycles=0; }\r
+#define SekSetStopS68k(x) { PicoCpuS68k.stopped=x; if (x) PicoCpuS68k.cycles=0; }\r
#endif\r
\r
#ifdef EMU_A68K\r
extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r
#ifndef SekCyclesLeft\r
-#define SekCyclesLeft m68k_cycles_remaining()\r
-#define SekSetCyclesLeft(c) SET_CYCLES(c)\r
+#define SekCyclesLeftNoMCD PicoM68kCPU.cyc_remaining_cycles\r
+#define SekCyclesLeft \\r
+ (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
+#define SekCyclesLeftS68k \\r
+ ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoS68kCPU.cyc_remaining_cycles)\r
+#define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)\r
+#define SekSetCyclesLeft(c) { \\r
+ if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \\r
+}\r
#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r
#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r
+#define SekSetStop(x) { \\r
+ if(x) { SET_CYCLES(0); PicoM68kCPU.stopped=STOP_LEVEL_STOP; } \\r
+ else PicoM68kCPU.stopped=0; \\r
+}\r
+#define SekSetStopS68k(x) { \\r
+ if(x) { SET_CYCLES(0); PicoS68kCPU.stopped=STOP_LEVEL_STOP; } \\r
+ else PicoS68kCPU.stopped=0; \\r
+}\r
#endif\r
#endif\r
\r
extern int SekCycleAimS68k;\r
\r
#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r
+#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r
\r
// does not work as expected\r
//extern int z80ExtraCycles; // extra z80 cycles, used when z80 is [en|dis]abled\r
char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
unsigned char hardware; // Hardware value for country\r
unsigned char pal; // 1=PAL 0=NTSC\r
- unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM?\r
+ unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
unsigned short z80_bank68k;\r
unsigned short z80_lastaddr; // this is for Z80 faking\r
unsigned char z80_fakeval;\r
unsigned short sram_addr; // EEPROM address register\r
unsigned char sram_cycle; // EEPROM SRAM cycle number\r
unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r
- unsigned char prot_bytes[2]; // simple protection fakeing\r
+ unsigned char prot_bytes[2]; // simple protection faking\r
unsigned short dma_bytes; //\r
unsigned char pad[2];\r
unsigned int frame_count; // mainly for movies\r
// sram\r
struct PicoSRAM\r
{\r
- unsigned char *data; // actual data\r
- unsigned int start; // start address in 68k address space\r
+ unsigned char *data; // actual data\r
+ unsigned int start; // start address in 68k address space\r
unsigned int end;\r
- unsigned char resize; // 1=SRAM size changed and needs to be reallocated on PicoReset\r
- unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r
+ unsigned char resize; // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset\r
+ unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r
unsigned char changed;\r
unsigned char pad;\r
};\r
unsigned char bank;\r
int pad1;\r
\r
- struct pcm_chan\r
+ struct pcm_chan // 08, size 0x10\r
{\r
unsigned char regs[8];\r
- unsigned int addr; // played sample address\r
+ unsigned int addr; // .08: played sample address\r
int pad;\r
} ch[8];\r
};\r
unsigned short hint_vector;\r
unsigned char busreq;\r
unsigned char s68k_pend_ints;\r
- unsigned int state_flags; // emu state: reset_pending,\r
+ unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending\r
unsigned int counter75hz;\r
- unsigned short audio_offset; // for savestates: play pointer offset (0-1023)\r
+ unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023)\r
unsigned char audio_track; // playing audio track # (zero based)\r
- char pad1;\r
- int timer_int3;\r
+ char pad1;\r
+ int timer_int3; // 10\r
unsigned int timer_stopwatch;\r
- int pad[10];\r
+ unsigned char bcram_reg; // 18: battery-backed RAM cart register\r
+ unsigned char pad2;\r
+ unsigned short pad3;\r
+ int pad[9];\r
};\r
\r
typedef struct\r
{\r
- unsigned char bios[0x20000]; // 128K\r
- union { // 512K\r
+ unsigned char bios[0x20000]; // 000000: 128K\r
+ union { // 020000: 512K\r
unsigned char prg_ram[0x80000];\r
unsigned char prg_ram_b[4][0x20000];\r
};\r
- union { // 256K\r
+ union { // 0a0000: 256K\r
struct {\r
unsigned char word_ram2M[0x40000];\r
unsigned char unused[0x20000];\r
unsigned char word_ram1M[2][0x20000];\r
};\r
};\r
- union { // 64K\r
+ union { // 100000: 64K\r
unsigned char pcm_ram[0x10000];\r
unsigned char pcm_ram_b[0x10][0x1000];\r
};\r
- unsigned char bram[0x2000]; // 8K\r
- unsigned char s68k_regs[0x200]; // GA, not CPU regs\r
- struct mcd_pcm pcm;\r
+ unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs\r
+ unsigned char bram[0x2000]; // 110200: 8K\r
+ struct mcd_misc m; // 112200: misc\r
+ struct mcd_pcm pcm; // 112240:\r
_scd_toc TOC; // not to be saved\r
CDD cdd;\r
CDC cdc;\r
_scd scd;\r
Rot_Comp rot_comp;\r
- struct mcd_misc m;\r
} mcd_state;\r
\r
#define Pico_mcd ((mcd_state *)Pico.rom)\r
\r
// cd/Memory.c\r
void PicoMemSetupCD(void);\r
+void PicoMemResetCD(int r3);\r
+void PicoMemResetCDdecode(int r3);\r
unsigned char PicoReadCD8 (unsigned int a);\r
unsigned short PicoReadCD16(unsigned int a);\r
unsigned int PicoReadCD32(unsigned int a);\r
extern struct Pico Pico;\r
extern struct PicoSRAM SRam;\r
extern int emustatus;\r
+extern int z80startCycle, z80stopCycle; // in 68k cycles\r
int CheckDMA(void);\r
\r
// cd/Pico.c\r
int SekReset(void);\r
int SekInterrupt(int irq);\r
void SekState(unsigned char *data);\r
+void SekSetRealTAS(int use_real);\r
\r
// cd/Sek.c\r
int SekInitS68k(void);\r
unsigned int SRAMReadEEPROM();\r
void SRAMUpdPending(unsigned int a, unsigned int d);\r
void memcpy16(unsigned short *dest, unsigned short *src, int count);\r
-void memcpy32(int *dest, int *src, int count);\r
+void memcpy16bswap(unsigned short *dest, void *src, int count);\r
+void memcpy32(int *dest, int *src, int count); // 32bit word count\r
void memset32(int *dest, int c, int count);\r
\r
// cd/Misc.c\r