/* context */\r
// Cyclone 68000\r
#ifdef EMU_C68K\r
-struct Cyclone PicoCpu;\r
+struct Cyclone PicoCpuCM68k;\r
#endif\r
// MUSASHI 68000\r
#ifdef EMU_M68K\r
-m68ki_cpu_core PicoM68kCPU;\r
+m68ki_cpu_core PicoCpuMM68k;\r
#endif\r
// FAME 68000\r
#ifdef EMU_F68K\r
-M68K_CONTEXT PicoCpuM68k;\r
+M68K_CONTEXT PicoCpuFM68k;\r
#endif\r
\r
\r
// try to emulate VDP's reaction to 68000 int ack\r
if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
- PicoCpu.irq = 0;\r
+ PicoCpuCM68k.irq = 0;\r
return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
{\r
unsigned int pc, op;\r
pc = SekPc;\r
- op = PicoCpu.read16(pc);\r
+ op = PicoCpuCM68k.read16(pc);\r
elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);\r
// see if we are not executing trash\r
if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
- PicoCpu.cycles = 0;\r
- PicoCpu.state_flags |= 1;\r
+ PicoCpuCM68k.cycles = 0;\r
+ PicoCpuCM68k.state_flags |= 1;\r
return 1;\r
}\r
#ifdef EMU_M68K // debugging cyclone\r
\r
\r
#ifdef EMU_F68K\r
-static void setup_fame_fetchmap(void)\r
-{\r
- int i;\r
-\r
- // be default, point everything to fitst 64k of ROM\r
- for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
- // now real ROM\r
- for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuM68k.Fetch[i] = (unsigned int)Pico.rom;\r
- elprintf(EL_ANOMALY, "ROM end @ #%i %06x", i, (i<<(24-FAMEC_FETCHBITS)));\r
- // .. and RAM (TODO)\r
- for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
-\r
- elprintf(EL_ANOMALY, "rom = %p, ram = %p", Pico.rom, Pico.ram);\r
- for (i = 0; i < M68K_FETCHBANK1; i++)\r
- elprintf(EL_ANOMALY, "Fetch[%i] = %p", i, PicoCpuM68k.Fetch[i]);\r
-}\r
-\r
-void SekIntAckF68K(unsigned level)\r
+static void SekIntAckF68K(unsigned level)\r
{\r
if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
- PicoCpuM68k.interrupts[0] = 0;\r
+ PicoCpuFM68k.interrupts[0] = 0;\r
}\r
#endif\r
\r
{\r
#ifdef EMU_C68K\r
CycloneInit();\r
- memset(&PicoCpu,0,sizeof(PicoCpu));\r
- PicoCpu.IrqCallback=SekIntAck;\r
- PicoCpu.ResetCallback=SekResetAck;\r
- PicoCpu.UnrecognizedCallback=SekUnrecognizedOpcode;\r
+ memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
+ PicoCpuCM68k.IrqCallback=SekIntAck;\r
+ PicoCpuCM68k.ResetCallback=SekResetAck;\r
+ PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
#endif\r
#ifdef EMU_M68K\r
{\r
void *oldcontext = m68ki_cpu_p;\r
- m68k_set_context(&PicoM68kCPU);\r
+ m68k_set_context(&PicoCpuMM68k);\r
m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
m68k_init();\r
m68k_set_int_ack_callback(SekIntAckM68K);\r
#ifdef EMU_F68K\r
{\r
void *oldcontext = g_m68kcontext;\r
- g_m68kcontext = &PicoCpuM68k;\r
- memset(&PicoCpuM68k, 0, sizeof(PicoCpuM68k));\r
+ g_m68kcontext = &PicoCpuFM68k;\r
+ memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
m68k_init();\r
- PicoCpuM68k.iack_handler = SekIntAckF68K;\r
+ PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
g_m68kcontext = oldcontext;\r
}\r
#endif\r
if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
- PicoCpu.state_flags=0;\r
- PicoCpu.osp=0;\r
- PicoCpu.srh =0x27; // Supervisor mode\r
- PicoCpu.flags=4; // Z set\r
- PicoCpu.irq=0;\r
- PicoCpu.a[7]=PicoCpu.read32(0); // Stack Pointer\r
- PicoCpu.membase=0;\r
- PicoCpu.pc=PicoCpu.checkpc(PicoCpu.read32(4)); // Program Counter\r
+ PicoCpuCM68k.state_flags=0;\r
+ PicoCpuCM68k.osp=0;\r
+ PicoCpuCM68k.srh =0x27; // Supervisor mode\r
+ PicoCpuCM68k.flags=4; // Z set\r
+ PicoCpuCM68k.irq=0;\r
+ PicoCpuCM68k.a[7]=PicoCpuCM68k.read32(0); // Stack Pointer\r
+ PicoCpuCM68k.membase=0;\r
+ PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.read32(4)); // Program Counter\r
#endif\r
#ifdef EMU_M68K\r
- m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set\r
+ m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
m68ki_cpu.sp[0]=0;\r
m68k_set_irq(0);\r
m68k_pulse_reset();\r
#endif\r
#ifdef EMU_F68K\r
{\r
- unsigned ret;\r
- g_m68kcontext = &PicoCpuM68k;\r
- setup_fame_fetchmap();\r
- ret = m68k_reset();\r
- /*if (ret)*/ elprintf(EL_ANOMALY, "m68k_reset returned %u", ret);\r
+ g_m68kcontext = &PicoCpuFM68k;\r
+ m68k_reset();\r
}\r
#endif\r
\r
}\r
#endif\r
#ifdef EMU_C68K\r
- PicoCpu.irq=irq;\r
+ PicoCpuCM68k.irq=irq;\r
#endif\r
#ifdef EMU_M68K\r
{\r
void *oldcontext = m68ki_cpu_p;\r
- m68k_set_context(&PicoM68kCPU);\r
+ m68k_set_context(&PicoCpuMM68k);\r
m68k_set_irq(irq); // raise irq (gets lowered after taken or must be done in ack)\r
m68k_set_context(oldcontext);\r
}\r
#endif\r
#ifdef EMU_F68K\r
- PicoCpuM68k.interrupts[0]=irq;\r
+ PicoCpuFM68k.interrupts[0]=irq;\r
#endif\r
\r
return 0;\r
}\r
\r
-PICO_INTERNAL void SekState(unsigned char *data)\r
+// data must be word aligned\r
+PICO_INTERNAL void SekState(int *data)\r
{\r
#ifdef EMU_C68K\r
- memcpy(data,PicoCpu.d,0x44);\r
+ memcpy32(data,PicoCpuCM68k.d,0x44/4);\r
#elif defined(EMU_M68K)\r
- memcpy(data, PicoM68kCPU.dar, 0x40);\r
- *(int *)(data+0x40) = PicoM68kCPU.pc;\r
+ memcpy32(data, PicoCpuMM68k.dar, 0x40/4);\r
+ data[0x10] = PicoCpuMM68k.pc;\r
#elif defined(EMU_F68K)\r
- memcpy(data, PicoCpuM68k.dreg, 0x40);\r
- *(int *)(data+0x40) = PicoCpuM68k.pc;\r
+ memcpy32(data, (int *)PicoCpuFM68k.dreg, 0x40/4);\r
+ data[0x10] = PicoCpuFM68k.pc;\r
#endif\r
}\r
\r
notaz.gp2x.de / picodrive.git / blobdiff