int SekCycleAim=0; // cycle aim\r
unsigned int SekCycleCntT=0;\r
\r
+\r
+/* context */\r
+// Cyclone 68000\r
#ifdef EMU_C68K\r
-// ---------------------- Cyclone 68000 ----------------------\r
-struct Cyclone PicoCpu;\r
+struct Cyclone PicoCpuCM68k;\r
#endif\r
-\r
+// MUSASHI 68000\r
#ifdef EMU_M68K\r
-// ---------------------- MUSASHI 68000 ----------------------\r
-m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
+m68ki_cpu_core PicoCpuMM68k;\r
#endif\r
-\r
-#ifdef EMU_A68K\r
-// ---------------------- A68K ----------------------\r
-\r
-void __cdecl M68000_RESET();\r
-int m68k_ICount=0;\r
-unsigned int mem_amask=0xffffff; // 24-bit bus\r
-unsigned int mame_debug=0,cur_mrhard=0,m68k_illegal_opcode=0,illegal_op=0,illegal_pc=0,opcode_entry=0; // filler\r
-\r
-static int IrqCallback(int i) { i; return -1; }\r
-static int DoReset() { return 0; }\r
-static int (*ResetCallback)()=DoReset;\r
-\r
-#pragma warning (disable:4152)\r
+// FAME 68000\r
+#ifdef EMU_F68K\r
+M68K_CONTEXT PicoCpuFM68k;\r
#endif\r
\r
\r
-\r
+/* callbacks */\r
#ifdef EMU_C68K\r
// interrupt acknowledgment\r
-static void SekIntAck(int level)\r
+static int SekIntAck(int level)\r
{\r
// try to emulate VDP's reaction to 68000 int ack\r
- if (level == 4) Pico.video.pending_ints = 0;\r
- else if(level == 6) Pico.video.pending_ints &= ~0x20;\r
- PicoCpu.irq = 0;\r
+ if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
+ else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
+ PicoCpuCM68k.irq = 0;\r
+ return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
-static void SekResetAck()\r
+static void SekResetAck(void)\r
{\r
-#if defined(__DEBUG_PRINT) || defined(WIN32)\r
- dprintf("Reset encountered @ %06x", SekPc);\r
-#endif\r
+ elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
}\r
\r
static int SekUnrecognizedOpcode()\r
{\r
unsigned int pc, op;\r
pc = SekPc;\r
- op = PicoCpu.read16(pc);\r
-#if defined(__DEBUG_PRINT) || defined(WIN32)\r
- dprintf("Unrecognized Opcode %04x @ %06x", op, pc);\r
-#endif\r
+ op = PicoCpuCM68k.read16(pc);\r
+ elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);\r
// see if we are not executing trash\r
if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
- PicoCpu.cycles = 0;\r
- PicoCpu.stopped = 1;\r
+ PicoCpuCM68k.cycles = 0;\r
+ PicoCpuCM68k.state_flags |= 1;\r
return 1;\r
}\r
- //exit(1);\r
+#ifdef EMU_M68K // debugging cyclone\r
+ {\r
+ extern int have_illegal;\r
+ have_illegal = 1;\r
+ }\r
+#endif\r
return 0;\r
}\r
#endif\r
#ifdef EMU_M68K\r
static int SekIntAckM68K(int level)\r
{\r
- if (level == 4) { Pico.video.pending_ints = 0; dprintf("hack: [%i|%i]", Pico.m.scanline, SekCyclesDone()); }\r
- else if(level == 6) { Pico.video.pending_ints &= ~0x20; dprintf("vack: [%i|%i]", Pico.m.scanline, SekCyclesDone()); }\r
+ if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
+ else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
CPU_INT_LEVEL = 0;\r
return M68K_INT_ACK_AUTOVECTOR;\r
}\r
+\r
+static int SekTasCallback(void)\r
+{\r
+ return 0; // no writeback\r
+}\r
#endif\r
\r
\r
+#ifdef EMU_F68K\r
+static void SekIntAckF68K(unsigned level)\r
+{\r
+ if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
+ else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
+ PicoCpuFM68k.interrupts[0] = 0;\r
+}\r
+#endif\r
\r
-int SekInit()\r
+\r
+PICO_INTERNAL int SekInit()\r
{\r
#ifdef EMU_C68K\r
CycloneInit();\r
- memset(&PicoCpu,0,sizeof(PicoCpu));\r
- PicoCpu.IrqCallback=SekIntAck;\r
- PicoCpu.ResetCallback=SekResetAck;\r
- PicoCpu.UnrecognizedCallback=SekUnrecognizedOpcode;\r
-#endif\r
-#ifdef EMU_A68K\r
- memset(&M68000_regs,0,sizeof(M68000_regs));\r
- M68000_regs.IrqCallback=IrqCallback;\r
- M68000_regs.pResetCallback=ResetCallback;\r
- M68000_RESET(); // Init cpu emulator\r
+ memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r
+ PicoCpuCM68k.IrqCallback=SekIntAck;\r
+ PicoCpuCM68k.ResetCallback=SekResetAck;\r
+ PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
+ PicoCpuCM68k.flags=4; // Z set\r
#endif\r
#ifdef EMU_M68K\r
{\r
void *oldcontext = m68ki_cpu_p;\r
- m68k_set_context(&PicoM68kCPU);\r
+ m68k_set_context(&PicoCpuMM68k);\r
m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
m68k_init();\r
m68k_set_int_ack_callback(SekIntAckM68K);\r
+ m68k_set_tas_instr_callback(SekTasCallback);\r
m68k_pulse_reset(); // Init cpu emulator\r
m68k_set_context(oldcontext);\r
}\r
#endif\r
+#ifdef EMU_F68K\r
+ {\r
+ void *oldcontext = g_m68kcontext;\r
+ g_m68kcontext = &PicoCpuFM68k;\r
+ memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
+ fm68k_init();\r
+ PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
+ PicoCpuFM68k.sr = 0x2704; // Z flag\r
+ g_m68kcontext = oldcontext;\r
+ }\r
+#endif\r
\r
return 0;\r
}\r
\r
+\r
// Reset the 68000:\r
-int SekReset()\r
+PICO_INTERNAL int SekReset()\r
{\r
if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
- PicoCpu.stopped=0;\r
- PicoCpu.osp=0;\r
- PicoCpu.srh =0x27; // Supervisor mode\r
- PicoCpu.flags=4; // Z set\r
- PicoCpu.irq=0;\r
- PicoCpu.a[7]=PicoCpu.read32(0); // Stack Pointer\r
- PicoCpu.membase=0;\r
- PicoCpu.pc=PicoCpu.checkpc(PicoCpu.read32(4)); // Program Counter\r
-#endif\r
-#ifdef EMU_A68K\r
- // Reset CPU: fetch SP and PC\r
- M68000_regs.srh=0x27; // Supervisor mode\r
- M68000_regs.a[7]=PicoRead32(0);\r
- M68000_regs.pc =PicoRead32(4);\r
- PicoInitPc(M68000_regs.pc);\r
+ PicoCpuCM68k.state_flags=0;\r
+ PicoCpuCM68k.osp=0;\r
+ PicoCpuCM68k.srh =0x27; // Supervisor mode\r
+ PicoCpuCM68k.irq=0;\r
+ PicoCpuCM68k.a[7]=PicoCpuCM68k.read32(0); // Stack Pointer\r
+ PicoCpuCM68k.membase=0;\r
+ PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.read32(4)); // Program Counter\r
#endif\r
#ifdef EMU_M68K\r
- m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set\r
+ m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r
+ m68ki_cpu.sp[0]=0;\r
+ m68k_set_irq(0);\r
m68k_pulse_reset();\r
#endif\r
+#ifdef EMU_F68K\r
+ {\r
+ g_m68kcontext = &PicoCpuFM68k;\r
+ fm68k_reset();\r
+ }\r
+#endif\r
\r
return 0;\r
}\r
\r
\r
-int SekInterrupt(int irq)\r
+// data must be word aligned\r
+PICO_INTERNAL void SekState(int *data)\r
{\r
#ifdef EMU_C68K\r
- PicoCpu.irq=irq;\r
-#endif\r
-#ifdef EMU_A68K\r
- M68000_regs.irq=irq; // raise irq (gets lowered after taken)\r
-#endif\r
-#ifdef EMU_M68K\r
- {\r
- void *oldcontext = m68ki_cpu_p;\r
- m68k_set_context(&PicoM68kCPU);\r
- m68k_set_irq(irq); // raise irq (gets lowered after taken or must be done in ack)\r
- m68k_set_context(oldcontext);\r
- }\r
+ memcpy32(data,(int *)PicoCpuCM68k.d,0x44/4);\r
+#elif defined(EMU_M68K)\r
+ memcpy32(data, (int *)PicoCpuMM68k.dar, 0x40/4);\r
+ data[0x10] = PicoCpuMM68k.pc;\r
+#elif defined(EMU_F68K)\r
+ memcpy32(data, (int *)PicoCpuFM68k.dreg, 0x40/4);\r
+ data[0x10] = PicoCpuFM68k.pc;\r
#endif\r
- return 0;\r
}\r
\r
-//int SekPc() { return PicoCpu.pc-PicoCpu.membase; }\r
-//int SekPc() { return M68000_regs.pc; }\r
-//int SekPc() { return m68k_get_reg(NULL, M68K_REG_PC); }\r
-\r
-void SekState(unsigned char *data)\r
+PICO_INTERNAL void SekSetRealTAS(int use_real)\r
{\r
#ifdef EMU_C68K\r
- memcpy(data,PicoCpu.d,0x44);\r
-#elif defined(EMU_A68K)\r
- memcpy(data, M68000_regs.d, 0x40);\r
- memcpy(data+0x40,&M68000_regs.pc,0x04);\r
-#elif defined(EMU_M68K)\r
- memcpy(data, PicoM68kCPU.dar,0x40);\r
- memcpy(data+0x40,&PicoM68kCPU.pc, 0x04);\r
+ CycloneSetRealTAS(use_real);\r
+#endif\r
+#ifdef EMU_F68K\r
+ // TODO\r
#endif\r
}\r
+\r
notaz.gp2x.de / picodrive.git / blobdiff