\r
\r
\r
-// interrupt acknowledgment\r
#ifdef EMU_C68K\r
-static void SekIntAck(int level)\r
+// interrupt acknowledgment\r
+static int SekIntAck(int level)\r
{\r
// try to emulate VDP's reaction to 68000 int ack\r
if (level == 4) Pico.video.pending_ints = 0;\r
else if(level == 6) Pico.video.pending_ints &= ~0x20;\r
PicoCpu.irq = 0;\r
+ return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
static void SekResetAck()\r
// see if we are not executing trash\r
if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
PicoCpu.cycles = 0;\r
- PicoCpu.stopped = 1;\r
+ PicoCpu.state_flags |= 1;\r
return 1;\r
}\r
+#ifdef EMU_M68K // debugging cyclone\r
+ {\r
+ extern int have_illegal;\r
+ have_illegal = 1;\r
+ }\r
+#endif\r
//exit(1);\r
return 0;\r
}\r
#ifdef EMU_M68K\r
static int SekIntAckM68K(int level)\r
{\r
- if (level == 4) { Pico.video.pending_ints = 0; } // dprintf("hack: [%i|%i]", Pico.m.scanline, SekCyclesDone()); }\r
- else if(level == 6) { Pico.video.pending_ints &= ~0x20; } // dprintf("vack: [%i|%i]", Pico.m.scanline, SekCyclesDone()); }\r
+ if (level == 4) { Pico.video.pending_ints = 0; dprintf("hack: [%i|%i]", Pico.m.scanline, SekCyclesDone()); }\r
+ else if(level == 6) { Pico.video.pending_ints &= ~0x20; dprintf("vack: [%i|%i]", Pico.m.scanline, SekCyclesDone()); }\r
CPU_INT_LEVEL = 0;\r
return M68K_INT_ACK_AUTOVECTOR;\r
}\r
+\r
+static int SekTasCallback(void)\r
+{\r
+ return 0; // no writeback\r
+}\r
#endif\r
\r
\r
\r
-int SekInit()\r
+PICO_INTERNAL int SekInit()\r
{\r
#ifdef EMU_C68K\r
CycloneInit();\r
m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
m68k_init();\r
m68k_set_int_ack_callback(SekIntAckM68K);\r
+ m68k_set_tas_instr_callback(SekTasCallback);\r
m68k_pulse_reset(); // Init cpu emulator\r
m68k_set_context(oldcontext);\r
}\r
}\r
\r
// Reset the 68000:\r
-int SekReset()\r
+PICO_INTERNAL int SekReset()\r
{\r
if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
- PicoCpu.stopped=0;\r
+ PicoCpu.state_flags=0;\r
PicoCpu.osp=0;\r
PicoCpu.srh =0x27; // Supervisor mode\r
PicoCpu.flags=4; // Z set\r
PicoInitPc(M68000_regs.pc);\r
#endif\r
#ifdef EMU_M68K\r
- {\r
- void *oldcontext = m68ki_cpu_p;\r
- m68k_set_context(&PicoM68kCPU);\r
- m68k_pulse_reset();\r
- m68k_set_context(oldcontext);\r
- }\r
+ m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set\r
+ m68ki_cpu.sp[0]=0;\r
+ m68k_set_irq(0);\r
+ m68k_pulse_reset();\r
#endif\r
\r
return 0;\r
}\r
\r
\r
-int SekInterrupt(int irq)\r
+PICO_INTERNAL int SekInterrupt(int irq)\r
{\r
+#if defined(EMU_C68K) && defined(EMU_M68K)\r
+ {\r
+ extern unsigned int dbg_irq_level;\r
+ dbg_irq_level=irq;\r
+ return 0;\r
+ }\r
+#endif\r
#ifdef EMU_C68K\r
PicoCpu.irq=irq;\r
#endif\r
//int SekPc() { return M68000_regs.pc; }\r
//int SekPc() { return m68k_get_reg(NULL, M68K_REG_PC); }\r
\r
-void SekState(unsigned char *data)\r
+PICO_INTERNAL void SekState(unsigned char *data)\r
{\r
#ifdef EMU_C68K\r
memcpy(data,PicoCpu.d,0x44);\r
memcpy(data+0x40,&PicoM68kCPU.pc, 0x04);\r
#endif\r
}\r
+\r
+PICO_INTERNAL void SekSetRealTAS(int use_real)\r
+{\r
+#ifdef EMU_C68K\r
+ CycloneSetRealTAS(use_real);\r
+#endif\r
+}\r
+\r