svp compiler: some adjustments

[picodrive.git] / Pico / carthw / svp / gen_arm.c

diff --git a/Pico/carthw/svp/gen_arm.c b/Pico/carthw/svp/gen_arm.c
index 76a0304..d92ae24 100644 (file)
--- a/Pico/carthw/svp/gen_arm.c
+++ b/Pico/carthw/svp/gen_arm.c
@@ -11,6 +11,10 @@
 #define A_R14M (1 << 14)
 
 #define A_COND_AL 0xe
+#define A_COND_EQ 0x0
+#define A_COND_NE 0x1
+#define A_COND_MI 0x4
+#define A_COND_PL 0x5
 
 /* addressing mode 1 */
 #define A_AM1_LSL 0
@@ -25,6 +29,7 @@
 #define A_OP_AND 0x0
 #define A_OP_SUB 0x2
 #define A_OP_ADD 0x4
+#define A_OP_TST 0x8
 #define A_OP_ORR 0xc
 #define A_OP_MOV 0xd
 #define A_OP_BIC 0xe
@@ -40,10 +45,13 @@
 #define EOP_ADD_IMM(rd,rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_ADD,0,rn,rd,ror2,imm8)
 #define EOP_BIC_IMM(rd,rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_BIC,0,rn,rd,ror2,imm8)
 #define EOP_AND_IMM(rd,rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_AND,0,rn,rd,ror2,imm8)
+#define EOP_SUB_IMM(rd,rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_SUB,0,rn,rd,ror2,imm8)
+#define EOP_TST_IMM(   rn,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_TST,1,rn, 0,ror2,imm8)
 
 #define EOP_MOV_REG(s,   rd,shift_imm,shift_op,rm) EOP_C_DOP_REG(A_COND_AL,A_OP_MOV,s, 0,rd,shift_imm,shift_op,rm)
 #define EOP_ORR_REG(s,rn,rd,shift_imm,shift_op,rm) EOP_C_DOP_REG(A_COND_AL,A_OP_ORR,s,rn,rd,shift_imm,shift_op,rm)
 #define EOP_ADD_REG(s,rn,rd,shift_imm,shift_op,rm) EOP_C_DOP_REG(A_COND_AL,A_OP_ADD,s,rn,rd,shift_imm,shift_op,rm)
+#define EOP_TST_REG(  rn,   shift_imm,shift_op,rm) EOP_C_DOP_REG(A_COND_AL,A_OP_TST,1,rn, 0,shift_imm,shift_op,rm)
 
 #define EOP_MOV_REG_SIMPLE(rd,rm)           EOP_MOV_REG(0,rd,0,A_AM1_LSL,rm)
 #define EOP_MOV_REG_LSL(rd,   rm,shift_imm) EOP_MOV_REG(0,rd,shift_imm,A_AM1_LSL,rm)
@@ -61,6 +69,8 @@
 #define EOP_ADD_REG_LSL(rd,rn,rm,shift_imm) EOP_ADD_REG(0,rn,rd,shift_imm,A_AM1_LSL,rm)
 #define EOP_ADD_REG_LSR(rd,rn,rm,shift_imm) EOP_ADD_REG(0,rn,rd,shift_imm,A_AM1_LSR,rm)
 
+#define EOP_TST_REG_SIMPLE(rn,rm)           EOP_TST_REG(  rn,   0,A_AM1_LSL,rm)
+
 /* addressing mode 2 */
 #define EOP_C_AM2_IMM(cond,u,b,l,rn,rd,offset_12) \
        EMIT(((cond)<<28) | 0x05000000 | ((u)<<23) | ((b)<<22) | ((l)<<20) | ((rn)<<16) | ((rd)<<12) | (offset_12))
@@ -101,24 +111,35 @@
 #define EOP_B( signed_immed_24) EOP_C_B(A_COND_AL,0,signed_immed_24)
 #define EOP_BL(signed_immed_24) EOP_C_B(A_COND_AL,1,signed_immed_24)
 
+/* misc */
+#define EOP_C_MUL(cond,s,rd,rs,rm) \
+       EMIT(((cond)<<28) | ((s)<<20) | ((rd)<<16) | ((rs)<<8) | 0x90 | (rm))
+
+#define EOP_MUL(rd,rm,rs) EOP_C_MUL(A_COND_AL,0,rd,rs,rm) // note: rd != rm
+
+#define EOP_C_MRS(cond,rd) \
+       EMIT(((cond)<<28) | 0x014f0000 | ((rd)<<12))
+
+#define EOP_MRS(rd) EOP_C_MRS(A_COND_AL,rd)
+
 
-static void emit_mov_const(int d, unsigned int val)
+static void emit_mov_const(int cond, int d, unsigned int val)
 {
        int need_or = 0;
        if (val & 0xff000000) {
-               EOP_MOV_IMM(d,  8/2, (val>>24)&0xff);
+               EOP_C_DOP_IMM(cond, A_OP_MOV, 0, 0, d, 8/2, (val>>24)&0xff);
                need_or = 1;
        }
        if (val & 0x00ff0000) {
-               EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 16/2, (val>>16)&0xff);
+               EOP_C_DOP_IMM(cond, need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 16/2, (val>>16)&0xff);
                need_or = 1;
        }
        if (val & 0x0000ff00) {
-               EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 24/2, (val>>8)&0xff);
+               EOP_C_DOP_IMM(cond, need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 24/2, (val>>8)&0xff);
                need_or = 1;
        }
        if ((val &0x000000ff) || !need_or)
-               EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 0, val&0xff);
+               EOP_C_DOP_IMM(cond, need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 0, val&0xff);
 }
 
 /*
@@ -150,29 +171,24 @@ static void emit_block_prologue(void)
        // stack regs
        EOP_STMFD_ST(A_R4M|A_R5M|A_R6M|A_R7M|A_R8M|A_R9M|A_R10M|A_R11M|A_R14M); // stmfd r13!, {r4-r11,lr}
        emit_call(regfile_load);
+       EOP_MOV_IMM(11, 0, 0);                  // mov r11, #0
 }
 
 static void emit_block_epilogue(int icount)
 {
+       if (icount > 0xff) { printf("large icount: %i\n", icount); icount = 0xff; }
        emit_call(regfile_store);
+       EOP_ADD_IMM(0,11,0,icount);             // add r0, r11, #icount
        EOP_LDMFD_ST(A_R4M|A_R5M|A_R6M|A_R7M|A_R8M|A_R9M|A_R10M|A_R11M|A_R14M); // ldmfd r13!, {r4-r11,lr}
-       emit_mov_const(0, icount);
        EOP_BX(14);                             // bx r14
 }
 
 static void emit_pc_dump(int pc)
 {
-       emit_mov_const(3, pc<<16);
+       emit_mov_const(A_COND_AL, 3, pc<<16);
        EOP_STR_IMM(3,7,0x400+6*4);             // str r3, [r7, #(0x400+6*8)]
 }
 
-static void emit_interpreter_call(void *target)
-{
-       emit_call(regfile_store);
-       emit_call(target);
-       emit_call(regfile_load);
-}
-
 static void handle_caches()
 {
 #ifdef ARM