+// basic, incomplete SSP160x (SSP1601?) interpreter
+
+// (c) Copyright 2008, Grazvydas "notaz" Ignotas
+// Free for non-commercial use.
+
+// For commercial use, separate licencing terms must be obtained.
+
// register names
enum {
//
#define SSP_PMC_HAVE_ADDR 0x0001 // address written to PMAC, waiting for mode
#define SSP_PMC_SET 0x0002 // PMAC is set
- #define SSP_30FE06_WAIT 0x4000 // ssp tight loops on 30FE08 to become non-zero
- #define SSP_30FE08_WAIT 0x8000 // same for 30FE06
+ #define SSP_WAIT_PM0 0x2000 // bit1 in PM0
+ #define SSP_WAIT_30FE06 0x4000 // ssp tight loops on 30FE08 to become non-zero
+ #define SSP_WAIT_30FE08 0x8000 // same for 30FE06
+ #define SSP_WAIT_MASK 0xe000
unsigned int emu_status;
unsigned int pad[30];
} ssp1601_t;