#define SSP_PMC_HAVE_ADDR 0x0001 // address written to PMAC, waiting for mode
#define SSP_PMC_SET 0x0002 // PMAC is set
#define SSP_WAIT_PM0 0x2000 // bit1 in PM0
- #define SSP_WAIT_30FE06 0x4000 // ssp tight loops on 30FE08 to become non-zero
- #define SSP_WAIT_30FE08 0x8000 // same for 30FE06
+ #define SSP_WAIT_30FE06 0x4000 // ssp tight loops on 30FE06 to become non-zero
+ #define SSP_WAIT_30FE08 0x8000 // same for 30FE08
#define SSP_WAIT_MASK 0xe000
unsigned int emu_status; // 484
- unsigned int pad[30];
+ unsigned int rom_ptr; // 488 recompiler convenience
+ unsigned int iram_ptr; // 48c
+ unsigned int dram_ptr; // 490
+ unsigned int pad[27];
} ssp1601_t;
void ssp1601_reset(ssp1601_t *ssp);
void ssp1601_run(int cycles);
-int ssp1601_dyn_init(void);
-void ssp1601_dyn_reset(ssp1601_t *ssp);
-void ssp1601_dyn_run(int cycles);
-