\r
#include "../PicoInt.h"\r
\r
-#define cdprintf printf\r
+#define cdprintf dprintf\r
//#define cdprintf(x...)\r
\r
\r
#define CDC_DMA_SPEED 256\r
\r
-int CDC_Decode_Reg_Read;\r
-static int Status_CDC; // internal status (TODO: 2 context?)\r
-\r
\r
static void CDD_Reset(void)\r
{\r
Pico_mcd->cdc.IFCTRL = 0;\r
Pico_mcd->cdc.CTRL.N = 0;\r
\r
- CDC_Decode_Reg_Read = 0;\r
- Status_CDC = 0;\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read = 0;\r
+ Pico_mcd->scd.Status_CDC &= ~0x08;\r
}\r
\r
\r
CDD_Reset();\r
CDC_Reset();\r
\r
- Pico_mcd->cdc.Host_Data = 0;\r
- Pico_mcd->cdc.DMA_Adr = 0;\r
- Pico_mcd->cdc.Stop_Watch = 0;\r
+ // clear DMA_Adr & Stop_Watch\r
+ memset(Pico_mcd->s68k_regs + 0xA, 0, 4);\r
}\r
\r
\r
void Update_CDC_TRansfer(int which)\r
{\r
- unsigned int dep, length, len;\r
+ unsigned int DMA_Adr, dep, length, len;\r
unsigned short *dest;\r
unsigned char *src;\r
\r
if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
{\r
length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
- Status_CDC &= ~0x08; // Last transfer\r
+ Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r
Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
\r
// TODO: dst bounds checking? DAC.N alignment?\r
src = Pico_mcd->cdc.Buffer + Pico_mcd->cdc.DAC.N;\r
-\r
+ DMA_Adr = (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB];\r
\r
if (which == 7) // WORD RAM\r
{\r
if (Pico_mcd->s68k_regs[3] & 4)\r
{\r
- dep = ((Pico_mcd->cdc.DMA_Adr & 0x3FFF) << 3);\r
+ dep = ((DMA_Adr & 0x3FFF) << 3);\r
cdprintf("CD DMA # %04x -> word_ram1M # %06x, len=%i",\r
Pico_mcd->cdc.DAC.N, dep, length);\r
\r
- dep = ((Pico_mcd->cdc.DMA_Adr & 0x3FFF) << 4);\r
+ dep = ((DMA_Adr & 0x3FFF) << 4);\r
if (!(Pico_mcd->s68k_regs[3]&1)) dep += 2;\r
dest = (unsigned short *) (Pico_mcd->word_ram + dep);\r
\r
}\r
else\r
{\r
- dep = ((Pico_mcd->cdc.DMA_Adr & 0x7FFF) << 3);\r
+ dep = ((DMA_Adr & 0x7FFF) << 3);\r
cdprintf("CD DMA # %04x -> word_ram2M # %06x, len=%i",\r
Pico_mcd->cdc.DAC.N, dep, length);\r
dest = (unsigned short *) (Pico_mcd->word_ram + dep);\r
{\r
#if 0\r
dest = (unsigned char *) Ram_PCM;\r
- dep = ((Pico_mcd->cdc.DMA_Adr & 0x03FF) << 2) + PCM_Chip.Bank;\r
+ dep = ((DMA_Adr & 0x03FF) << 2) + PCM_Chip.Bank;\r
#else\r
- cdprintf("TODO: PCM Dma");\r
+ cdprintf("CD DMA # %04x -> PCD TODO", Pico_mcd->cdc.DAC.N);\r
#endif\r
}\r
else if (which == 5) // PRG RAM\r
{\r
- dep = (Pico_mcd->cdc.DMA_Adr & 0xFFFF) << 3;\r
+ dep = DMA_Adr << 3;\r
dest = (unsigned short *) (Pico_mcd->prg_ram + dep);\r
cdprintf("CD DMA # %04x -> prg_ram # %06x, len=%i",\r
Pico_mcd->cdc.DAC.N, dep, length);\r
\r
length <<= 1;\r
Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;\r
- if (Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
+ if (Pico_mcd->scd.Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
else Pico_mcd->cdc.DBC.N = 0;\r
}\r
\r
{\r
int addr;\r
\r
- if (!(Status_CDC & 0x08))\r
+ if (!(Pico_mcd->scd.Status_CDC & 0x08))\r
{\r
// Transfer data disabled\r
+ cdprintf("Read_CDC_Host: Transfer data disabled");\r
return 0;\r
}\r
\r
(!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r
{\r
// Wrong setting\r
+ cdprintf("Read_CDC_Host: Wrong setting");\r
return 0;\r
}\r
\r
if (Pico_mcd->cdc.DBC.N <= 0)\r
{\r
Pico_mcd->cdc.DBC.N = 0;\r
- Status_CDC &= ~0x08; // Last transfer\r
+ Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r
Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
SekInterruptS68k(5);\r
}\r
\r
- cdprintf("CDC - DTE interrupt\n");\r
+ cdprintf("CDC - DTE interrupt");\r
}\r
}\r
\r
addr = Pico_mcd->cdc.DAC.N;\r
Pico_mcd->cdc.DAC.N += 2;\r
+\r
+ cdprintf("Read_CDC_Host sub=%i d=%04x dac=%04x dbc=%04x", is_sub,\r
+ (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1], Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N);\r
+\r
return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];\r
\r
#if 0\r
{\r
unsigned char ret;\r
\r
- cdprintf("CDC read reg %.2d = ", Pico_mcd->s68k_regs[5] & 0xF);\r
-\r
switch(Pico_mcd->s68k_regs[5] & 0xF)\r
{\r
case 0x0: // COMIN\r
- cdprintf("%.2X\n", Pico_mcd->cdc.COMIN);\r
+ cdprintf("CDC read reg 00 = %.2X", Pico_mcd->cdc.COMIN);\r
\r
Pico_mcd->s68k_regs[5] = 0x1;\r
return Pico_mcd->cdc.COMIN;\r
\r
case 0x1: // IFSTAT\r
- cdprintf("%.2X\n", Pico_mcd->cdc.IFSTAT);\r
+ cdprintf("CDC read reg 01 = %.2X", Pico_mcd->cdc.IFSTAT);\r
\r
- CDC_Decode_Reg_Read |= (1 << 1); // Reg 1 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 1); // Reg 1 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x2;\r
return Pico_mcd->cdc.IFSTAT;\r
\r
case 0x2: // DBCL\r
- cdprintf("%.2X\n", Pico_mcd->cdc.DBC.B.L);\r
+ cdprintf("CDC read reg 02 = %.2X", Pico_mcd->cdc.DBC.B.L);\r
\r
Pico_mcd->s68k_regs[5] = 0x3;\r
return Pico_mcd->cdc.DBC.B.L;\r
\r
case 0x3: // DBCH\r
- cdprintf("%.2X\n", Pico_mcd->cdc.DBC.B.H);\r
+ cdprintf("CDC read reg 03 = %.2X", Pico_mcd->cdc.DBC.B.H);\r
\r
Pico_mcd->s68k_regs[5] = 0x4;\r
return Pico_mcd->cdc.DBC.B.H;\r
\r
case 0x4: // HEAD0\r
- cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B0);\r
+ cdprintf("CDC read reg 04 = %.2X", Pico_mcd->cdc.HEAD.B.B0);\r
\r
- CDC_Decode_Reg_Read |= (1 << 4); // Reg 4 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 4); // Reg 4 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x5;\r
return Pico_mcd->cdc.HEAD.B.B0;\r
\r
case 0x5: // HEAD1\r
- cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B1);\r
+ cdprintf("CDC read reg 05 = %.2X", Pico_mcd->cdc.HEAD.B.B1);\r
\r
- CDC_Decode_Reg_Read |= (1 << 5); // Reg 5 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 5); // Reg 5 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x6;\r
return Pico_mcd->cdc.HEAD.B.B1;\r
\r
case 0x6: // HEAD2\r
- cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B2);\r
+ cdprintf("CDC read reg 06 = %.2X", Pico_mcd->cdc.HEAD.B.B2);\r
\r
- CDC_Decode_Reg_Read |= (1 << 6); // Reg 6 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 6); // Reg 6 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x7;\r
return Pico_mcd->cdc.HEAD.B.B2;\r
\r
case 0x7: // HEAD3\r
- cdprintf("%.2X\n", Pico_mcd->cdc.HEAD.B.B3);\r
+ cdprintf("CDC read reg 07 = %.2X", Pico_mcd->cdc.HEAD.B.B3);\r
\r
- CDC_Decode_Reg_Read |= (1 << 7); // Reg 7 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 7); // Reg 7 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x8;\r
return Pico_mcd->cdc.HEAD.B.B3;\r
\r
case 0x8: // PTL\r
- cdprintf("%.2X\n", Pico_mcd->cdc.PT.B.L);\r
+ cdprintf("CDC read reg 08 = %.2X", Pico_mcd->cdc.PT.B.L);\r
\r
- CDC_Decode_Reg_Read |= (1 << 8); // Reg 8 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 8); // Reg 8 (decoding)\r
Pico_mcd->s68k_regs[5] = 0x9;\r
return Pico_mcd->cdc.PT.B.L;\r
\r
case 0x9: // PTH\r
- cdprintf("%.2X\n", Pico_mcd->cdc.PT.B.H);\r
+ cdprintf("CDC read reg 09 = %.2X", Pico_mcd->cdc.PT.B.H);\r
\r
- CDC_Decode_Reg_Read |= (1 << 9); // Reg 9 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 9); // Reg 9 (decoding)\r
Pico_mcd->s68k_regs[5] = 0xA;\r
return Pico_mcd->cdc.PT.B.H;\r
\r
case 0xA: // WAL\r
- cdprintf("%.2X\n", Pico_mcd->cdc.WA.B.L);\r
+ cdprintf("CDC read reg 10 = %.2X", Pico_mcd->cdc.WA.B.L);\r
\r
Pico_mcd->s68k_regs[5] = 0xB;\r
return Pico_mcd->cdc.WA.B.L;\r
\r
case 0xB: // WAH\r
- cdprintf("%.2X\n", Pico_mcd->cdc.WA.B.H);\r
+ cdprintf("CDC read reg 11 = %.2X", Pico_mcd->cdc.WA.B.H);\r
\r
Pico_mcd->s68k_regs[5] = 0xC;\r
return Pico_mcd->cdc.WA.B.H;\r
\r
case 0xC: // STAT0\r
- cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B0);\r
+ cdprintf("CDC read reg 12 = %.2X", Pico_mcd->cdc.STAT.B.B0);\r
\r
- CDC_Decode_Reg_Read |= (1 << 12); // Reg 12 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 12); // Reg 12 (decoding)\r
Pico_mcd->s68k_regs[5] = 0xD;\r
return Pico_mcd->cdc.STAT.B.B0;\r
\r
case 0xD: // STAT1\r
- cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B1);\r
+ cdprintf("CDC read reg 13 = %.2X", Pico_mcd->cdc.STAT.B.B1);\r
\r
- CDC_Decode_Reg_Read |= (1 << 13); // Reg 13 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 13); // Reg 13 (decoding)\r
Pico_mcd->s68k_regs[5] = 0xE;\r
return Pico_mcd->cdc.STAT.B.B1;\r
\r
case 0xE: // STAT2\r
- cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B2);\r
+ cdprintf("CDC read reg 14 = %.2X", Pico_mcd->cdc.STAT.B.B2);\r
\r
- CDC_Decode_Reg_Read |= (1 << 14); // Reg 14 (decoding)\r
+ Pico_mcd->cdd.CDC_Decode_Reg_Read |= (1 << 14); // Reg 14 (decoding)\r
Pico_mcd->s68k_regs[5] = 0xF;\r
return Pico_mcd->cdc.STAT.B.B2;\r
\r
case 0xF: // STAT3\r
- cdprintf("%.2X\n", Pico_mcd->cdc.STAT.B.B3);\r
+ cdprintf("CDC read reg 15 = %.2X", Pico_mcd->cdc.STAT.B.B3);\r
\r
ret = Pico_mcd->cdc.STAT.B.B3;\r
Pico_mcd->cdc.IFSTAT |= 0x20; // decoding interrupt flag cleared\r
if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))\r
{\r
- if ((CDC_Decode_Reg_Read & 0x73F2) == 0x73F2)\r
+ if ((Pico_mcd->cdd.CDC_Decode_Reg_Read & 0x73F2) == 0x73F2)\r
Pico_mcd->cdc.STAT.B.B3 = 0x80;\r
}\r
return ret;\r
\r
void CDC_Write_Reg(unsigned char Data)\r
{\r
- cdprintf("CDC write reg%d = %.2X\n", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
+ cdprintf("CDC write reg%02d = %.2X", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
\r
switch (Pico_mcd->s68k_regs[5] & 0xF)\r
{\r
if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0) // Stop data transfer\r
{\r
Pico_mcd->cdc.DBC.N = 0;\r
- Status_CDC &= ~0x08;\r
+ Pico_mcd->scd.Status_CDC &= ~0x08;\r
Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
}\r
break;\r
if (Pico_mcd->cdc.IFCTRL & 0x02) // Data transfer enable ?\r
{\r
Pico_mcd->cdc.IFSTAT &= ~0x08; // Data transfer in progress\r
- Status_CDC |= 0x08; // Data transfer in progress\r
+ Pico_mcd->scd.Status_CDC |= 0x08; // Data transfer in progress\r
Pico_mcd->s68k_regs[4] &= 0x7F; // A data transfer start\r
\r
- cdprintf("\n************** Starting Data Transfer ***********\n");\r
+ cdprintf("************** Starting Data Transfer ***********");\r
cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
- Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, Pico_mcd->cdc.DMA_Adr);\r
+ Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]);\r
}\r
break;\r
\r
SekInterruptS68k(4);\r
}\r
\r
- cdprintf("CDD exported status\n");\r
- cdprintf("Status =%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X\n",\r
+// cdprintf("CDD exported status\n");\r
+ cdprintf("out: Status=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",\r
(Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],\r
(Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],\r
(Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],\r
\r
void CDD_Import_Command(void)\r
{\r
- cdprintf("CDD importing command\n");\r
- cdprintf("Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X\n",\r
+// cdprintf("CDD importing command\n");\r
+ cdprintf("in: Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",\r
(Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],\r
(Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],\r
(Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],\r
notaz.gp2x.de / picodrive.git / blobdiff