// Loosely based on Gens code.\r
// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
\r
-// A68K no longer supported here\r
\r
//#define __debug_io\r
\r
//#define __debug_io\r
//#define __debug_io2\r
\r
-#define rdprintf dprintf\r
-//#define rdprintf(...)\r
+//#define rdprintf dprintf\r
+#define rdprintf(...)\r
//#define wrdprintf dprintf\r
#define wrdprintf(...)\r
#define plprintf dprintf\r
//#define plprintf(...)\r
\r
+#ifdef EMU_CORE_DEBUG\r
+extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
+extern int lrp_cyc, lwp_cyc;\r
+#undef USE_POLL_DETECT\r
+#endif\r
+\r
// -----------------------------------------------------------------\r
\r
// poller detection\r
-//#undef USE_POLL_DETECT\r
#define POLL_LIMIT 16\r
#define POLL_CYCLES 124\r
// int m68k_poll_addr, m68k_poll_cnt;\r
{\r
//dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
\r
- // TODO: review against Gens\r
// Warning: d might have upper bits set\r
switch (a) {\r
case 2:\r
// -----------------------------------------------------------------\r
// Read Rom and read Ram\r
\r
-//u8 PicoReadM68k8_(u32 a);\r
#ifdef _ASM_CD_MEMORY_C\r
u32 PicoReadM68k8(u32 a);\r
#else\r
\r
#ifdef __debug_io\r
dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
+#endif\r
+#ifdef EMU_CORE_DEBUG\r
+ if (a>=Pico.romsize) {\r
+ lastread_a = a;\r
+ lastread_d[lrp_cyc++&15] = d;\r
+ }\r
#endif\r
return d;\r
}\r
\r
#ifdef __debug_io\r
dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
+#endif\r
+#ifdef EMU_CORE_DEBUG\r
+ if (a>=Pico.romsize) {\r
+ lastread_a = a;\r
+ lastread_d[lrp_cyc++&15] = d;\r
+ }\r
#endif\r
return d;\r
}\r
end:\r
#ifdef __debug_io\r
dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
+#endif\r
+#ifdef EMU_CORE_DEBUG\r
+ if (a>=Pico.romsize) {\r
+ lastread_a = a;\r
+ lastread_d[lrp_cyc++&15] = d;\r
+ }\r
#endif\r
return d;\r
}\r
#ifdef __debug_io\r
dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
#endif\r
- //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
- // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
-\r
+#ifdef EMU_CORE_DEBUG\r
+ lastwrite_cyc_d[lwp_cyc++&15] = d;\r
+#endif\r
\r
if ((a&0xe00000)==0xe00000) { // Ram\r
*(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
#ifdef __debug_io\r
dprintf("w16: %06x, %04x", a&0xffffff, d);\r
#endif\r
- // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
+#ifdef EMU_CORE_DEBUG\r
+ lastwrite_cyc_d[lwp_cyc++&15] = d;\r
+#endif\r
\r
if ((a&0xe00000)==0xe00000) { // Ram\r
*(u16 *)(Pico.ram+(a&0xfffe))=d;\r
#ifdef __debug_io\r
dprintf("w32: %06x, %08x", a&0xffffff, d);\r
#endif\r
+#ifdef EMU_CORE_DEBUG\r
+ lastwrite_cyc_d[lwp_cyc++&15] = d;\r
+#endif\r
\r
if ((a&0xe00000)==0xe00000)\r
{\r
{\r
u32 d=0;\r
\r
+#ifdef EMU_CORE_DEBUG\r
+ u32 ab=a&0xfffffe;\r
+#endif\r
a&=0xffffff;\r
\r
// prg RAM\r
\r
#ifdef __debug_io2\r
dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
+#endif\r
+#ifdef EMU_CORE_DEBUG\r
+ lastread_a = ab;\r
+ lastread_d[lrp_cyc++&15] = d;\r
#endif\r
return d;\r
}\r
{\r
u32 d=0;\r
\r
+#ifdef EMU_CORE_DEBUG\r
+ u32 ab=a&0xfffffe;\r
+#endif\r
a&=0xfffffe;\r
\r
// prg RAM\r
\r
#ifdef __debug_io2\r
dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
+#endif\r
+#ifdef EMU_CORE_DEBUG\r
+ lastread_a = ab;\r
+ lastread_d[lrp_cyc++&15] = d;\r
#endif\r
return d;\r
}\r
{\r
u32 d=0;\r
\r
+#ifdef EMU_CORE_DEBUG\r
+ u32 ab=a&0xfffffe;\r
+#endif\r
a&=0xfffffe;\r
\r
// prg RAM\r
\r
#ifdef __debug_io2\r
dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
+#endif\r
+#ifdef EMU_CORE_DEBUG\r
+ if (ab > 0x78) { // not vectors and stuff\r
+ lastread_a = ab;\r
+ lastread_d[lrp_cyc++&15] = d;\r
+ }\r
#endif\r
return d;\r
}\r
\r
a&=0xffffff;\r
\r
+#ifdef EMU_CORE_DEBUG\r
+ lastwrite_cyc_d[lwp_cyc++&15] = d;\r
+#endif\r
+\r
// prg RAM\r
if (a < 0x80000) {\r
u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
\r
a&=0xfffffe;\r
\r
+#ifdef EMU_CORE_DEBUG\r
+ lastwrite_cyc_d[lwp_cyc++&15] = d;\r
+#endif\r
+\r
// prg RAM\r
if (a < 0x80000) {\r
wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
\r
a&=0xfffffe;\r
\r
+#ifdef EMU_CORE_DEBUG\r
+ lastwrite_cyc_d[lwp_cyc++&15] = d;\r
+#endif\r
+\r
// prg RAM\r
if (a < 0x80000) {\r
if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
}\r
\r
// these are allowed to access RAM\r
-unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {\r
+unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
+{\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoCpuMS68k) {\r
if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
}\r
return 0;//(u8) lastread_d;\r
}\r
-unsigned int m68k_read_pcrelative_CD16(unsigned int a) {\r
+unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
+{\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoCpuMS68k) {\r
if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
}\r
return 0;\r
}\r
-unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
+unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
+{\r
u16 *pm;\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoCpuMS68k) {\r