// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
\r
\r
-//#define __debug_io\r
-\r
#include "../PicoInt.h"\r
\r
#include "../sound/ym2612.h"\r
#define UTYPES_DEFINED\r
#endif\r
\r
-//#define __debug_io\r
-//#define __debug_io2\r
-\r
//#define rdprintf dprintf\r
#define rdprintf(...)\r
//#define wrdprintf dprintf\r
#define wrdprintf(...)\r
-#define plprintf dprintf\r
-//#define plprintf(...)\r
\r
#ifdef EMU_CORE_DEBUG\r
extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
d = Read_CDC_Host(0);\r
goto end;\r
case 0xA:\r
- dprintf("m68k FIXME: reserved read");\r
+ elprintf(EL_UIO, "m68k FIXME: reserved read");\r
goto end;\r
case 0xC:\r
d = Pico_mcd->m.timer_stopwatch >> 16;\r
goto end;\r
}\r
\r
- dprintf("m68k_regs FIXME invalid read @ %02x", a);\r
+ elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
\r
end:\r
\r
- // dprintf("ret = %04x", d);\r
return d;\r
}\r
#endif\r
switch (a) {\r
case 0:\r
d &= 1;\r
- if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
+ if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
return;\r
case 1:\r
d &= 3;\r
#ifdef USE_POLL_DETECT\r
if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- plprintf("s68k poll release, a=%02x\n", a);\r
+ elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
}\r
#endif\r
return;\r
#ifdef USE_POLL_DETECT\r
if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- plprintf("s68k poll release, a=%02x\n", a);\r
+ elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
}\r
#endif\r
return;\r
#ifdef USE_POLL_DETECT\r
if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- plprintf("s68k poll release, a=%02x\n", a);\r
+ elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
}\r
#endif\r
return;\r
}\r
\r
- dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
+ elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
u32 s68k_poll_detect(u32 a, u32 d)\r
{\r
#ifdef USE_POLL_DETECT\r
+ // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
+ if (SekIsStoppedS68k()) return d;\r
// polling detection\r
if (a == (s68k_poll_adclk&0xff)) {\r
unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
//printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
if (s68k_poll_cnt > POLL_LIMIT) {\r
SekSetStopS68k(1);\r
- plprintf("s68k poll detected @ %06x, a=%02x\n", SekPcS68k, a);\r
+ elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
}\r
s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
return d;\r
\r
if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
{\r
- dprintf("s68k FIXME: invalid write @ %02x?", a);\r
+ elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
return;\r
}\r
\r
goto end;\r
}\r
\r
- dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
+ if (a==0x400000) {\r
+ if (SRam.data != NULL) d=3; // 64k cart\r
+ goto end;\r
+ }\r
+\r
+ if ((a&0xfe0000)==0x600000) {\r
+ if (SRam.data != NULL) {\r
+ d=SRam.data[((a>>1)&0xffff)+0x2000];\r
+ if (realsize == 8) d|=d<<8;\r
+ }\r
+ goto end;\r
+ }\r
+\r
+ if (a==0x7ffffe) {\r
+ d=Pico_mcd->m.bcram_reg;\r
+ goto end;\r
+ }\r
+\r
+ elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
\r
end:\r
return d;\r
{\r
if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
\r
- dprintf("m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
+ if ((a&0xfe0000)==0x600000) {\r
+ if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {\r
+ SRam.data[((a>>1)&0xffff)+0x2000]=d;\r
+ SRam.changed = 1;\r
+ }\r
+ return;\r
+ }\r
+\r
+ if (a==0x7fffff) {\r
+ Pico_mcd->m.bcram_reg=d;\r
+ return;\r
+ }\r
+\r
+ elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
}\r
\r
#define _CD_MEMORY_C\r
#ifdef _ASM_CD_MEMORY_C\r
u32 PicoReadM68k8(u32 a);\r
#else\r
-static u32 PicoReadM68k8(u32 a)\r
+u32 PicoReadM68k8(u32 a)\r
{\r
u32 d=0;\r
\r
- if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
-\r
a&=0xffffff;\r
\r
- if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r
+ switch (a >> 17)\r
+ {\r
+ case 0x00>>1: // BIOS: 000000 - 020000\r
+ d = *(u8 *)(Pico_mcd->bios+(a^1));\r
+ break;\r
+ case 0x02>>1: // prg RAM\r
+ if ((Pico_mcd->m.busreq&3)!=1) {\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
+ d = *(prg_bank+((a^1)&0x1ffff));\r
+ }\r
+ break;\r
+ case 0x20>>1: // word RAM: 200000 - 220000\r
+ wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
+ a &= 0x1ffff;\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ d = Pico_mcd->word_ram1M[bank][a^1];\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = Pico_mcd->word_ram2M[a^1];\r
+ }\r
+ wrdprintf("ret = %02x", (u8)d);\r
+ break;\r
+ case 0x22>>1: // word RAM: 220000 - 240000\r
+ wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
+ d = Pico_mcd->word_ram1M[bank][a^1];\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
+ }\r
+ wrdprintf("ret = %02x", (u8)d);\r
+ break;\r
+ case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
+ case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
+ case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
+ case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
+ // VDP\r
+ if ((a&0xe700e0)==0xc00000) {\r
+ d=PicoVideoRead(a);\r
+ if ((a&1)==0) d>>=8;\r
+ }\r
+ break;\r
+ case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
+ case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
+ case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
+ case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
+ // RAM:\r
+ d = *(u8 *)(Pico.ram+((a^1)&0xffff));\r
+ break;\r
+ default:\r
+ if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
\r
- // prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- d = *(prg_bank+((a^1)&0x1ffff));\r
- goto end;\r
- }\r
+ d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
\r
- // word RAM\r
- if ((a&0xfc0000)==0x200000) {\r
- wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- if (a >= 0x220000)\r
- a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
- else a &= 0x1ffff;\r
- d = Pico_mcd->word_ram1M[bank][a^1];\r
- } else {\r
- // allow access in any mode, like Gens does\r
- d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
- }\r
- wrdprintf("ret = %02x", (u8)d);\r
- goto end;\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %02x", (u8)d);\r
+ break;\r
}\r
\r
- if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
-\r
- d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
-\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("ret = %02x", (u8)d);\r
-\r
- end:\r
-\r
-#ifdef __debug_io\r
- dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
if (a>=Pico.romsize) {\r
lastread_a = a;\r
{\r
u32 d=0;\r
\r
- if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
-\r
a&=0xfffffe;\r
\r
- if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r
+ switch (a >> 17)\r
+ {\r
+ case 0x00>>1: // BIOS: 000000 - 020000\r
+ d = *(u16 *)(Pico_mcd->bios+a);\r
+ break;\r
+ case 0x02>>1: // prg RAM\r
+ if ((Pico_mcd->m.busreq&3)!=1) {\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
+ wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
+ d = *(u16 *)(prg_bank+(a&0x1fffe));\r
+ wrdprintf("ret = %04x", d);\r
+ }\r
+ break;\r
+ case 0x20>>1: // word RAM: 200000 - 220000\r
+ wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
+ a &= 0x1fffe;\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = *(u16 *)(Pico_mcd->word_ram2M+a);\r
+ }\r
+ wrdprintf("ret = %04x", d);\r
+ break;\r
+ case 0x22>>1: // word RAM: 220000 - 240000\r
+ wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ }\r
+ wrdprintf("ret = %04x", d);\r
+ break;\r
+ case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
+ case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
+ case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
+ case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
+ // VDP\r
+ if ((a&0xe700e0)==0xc00000)\r
+ d=PicoVideoRead(a);\r
+ break;\r
+ case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
+ case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
+ case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
+ case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
+ // RAM:\r
+ d=*(u16 *)(Pico.ram+(a&0xfffe));\r
+ break;\r
+ default:\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
\r
- // prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
- d = *(u16 *)(prg_bank+(a&0x1fffe));\r
- wrdprintf("ret = %04x", d);\r
- goto end;\r
- }\r
+ d = OtherRead16(a, 16);\r
\r
- // word RAM\r
- if ((a&0xfc0000)==0x200000) {\r
- wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- if (a >= 0x220000)\r
- a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
- else a &= 0x1fffe;\r
- d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
- } else {\r
- // allow access in any mode, like Gens does\r
- d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- }\r
- wrdprintf("ret = %04x", d);\r
- goto end;\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %04x", d);\r
+ break;\r
}\r
\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
\r
- d = OtherRead16(a, 16);\r
-\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("ret = %04x", d);\r
-\r
- end:\r
-\r
-#ifdef __debug_io\r
- dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
if (a>=Pico.romsize) {\r
lastread_a = a;\r
{\r
u32 d=0;\r
\r
- if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
-\r
a&=0xfffffe;\r
\r
- if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r
-\r
- // prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
- d = (pm[0]<<16)|pm[1];\r
- goto end;\r
- }\r
-\r
- // word RAM\r
- if ((a&0xfc0000)==0x200000) {\r
- wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- if (a >= 0x220000) { // cell arranged\r
+ switch (a >> 17)\r
+ {\r
+ case 0x00>>1: { // BIOS: 000000 - 020000\r
+ u16 *pm=(u16 *)(Pico_mcd->bios+a);\r
+ d = (pm[0]<<16)|pm[1];\r
+ break;\r
+ }\r
+ case 0x02>>1: // prg RAM\r
+ if ((Pico_mcd->m.busreq&3)!=1) {\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
+ u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
+ d = (pm[0]<<16)|pm[1];\r
+ }\r
+ break;\r
+ case 0x20>>1: // word RAM: 200000 - 220000\r
+ wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
+ a&=0x1fffe;\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
+ d = (pm[0]<<16)|pm[1];\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);\r
+ d = (pm[0]<<16)|pm[1];\r
+ }\r
+ wrdprintf("ret = %08x", d);\r
+ break;\r
+ case 0x22>>1: // word RAM: 220000 - 240000\r
+ wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?\r
u32 a1, a2;\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
a1 = (a&2) | (cell_map(a >> 2) << 2);\r
if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
else a2 = a1 + 2;\r
d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
} else {\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ d = (pm[0]<<16)|pm[1];\r
}\r
- } else {\r
- // allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
+ wrdprintf("ret = %08x", d);\r
+ break;\r
+ case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
+ case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
+ case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
+ case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
+ // VDP\r
+ d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
+ break;\r
+ case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
+ case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
+ case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
+ case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {\r
+ // RAM:\r
+ u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
+ d = (pm[0]<<16)|pm[1];\r
+ break;\r
}\r
- wrdprintf("ret = %08x", d);\r
- goto end;\r
- }\r
+ default:\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
+ d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
\r
- d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %08x", d);\r
+ break;\r
+ }\r
\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("ret = %08x", d);\r
\r
- end:\r
-#ifdef __debug_io\r
- dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
if (a>=Pico.romsize) {\r
lastread_a = a;\r
#ifdef _ASM_CD_MEMORY_C\r
void PicoWriteM68k8(u32 a,u8 d);\r
#else\r
-static void PicoWriteM68k8(u32 a,u8 d)\r
+void PicoWriteM68k8(u32 a,u8 d)\r
{\r
-#ifdef __debug_io\r
- dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
-#endif\r
+ elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
return;\r
}\r
\r
- a&=0xffffff;\r
-\r
// prg RAM\r
if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
return;\r
}\r
\r
+ a&=0xffffff;\r
+\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
#else\r
static void PicoWriteM68k16(u32 a,u16 d)\r
{\r
-#ifdef __debug_io\r
- dprintf("w16: %06x, %04x", a&0xffffff, d);\r
-#endif\r
+ elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
return;\r
}\r
\r
- a&=0xfffffe;\r
-\r
// prg RAM\r
if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
return;\r
}\r
\r
+ a&=0xfffffe;\r
+\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
#ifdef USE_POLL_DETECT\r
if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- plprintf("s68k poll release, a=%02x\n", a);\r
+ elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
}\r
#endif\r
return;\r
return;\r
}\r
\r
+ // VDP\r
+ if ((a&0xe700e0)==0xc00000) {\r
+ PicoVideoWrite(a,(u16)d);\r
+ return;\r
+ }\r
+\r
OtherWrite16(a,d);\r
}\r
#endif\r
#else\r
static void PicoWriteM68k32(u32 a,u32 d)\r
{\r
-#ifdef __debug_io\r
- dprintf("w32: %06x, %08x", a&0xffffff, d);\r
-#endif\r
+ elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
return;\r
}\r
\r
- a&=0xfffffe;\r
-\r
// prg RAM\r
if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
return;\r
}\r
\r
+ a&=0xfffffe;\r
+\r
// word RAM\r
if ((a&0xfc0000)==0x200000) {\r
if (d != 0) // don't log clears\r
if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
}\r
\r
+ // VDP\r
+ if ((a&0xe700e0)==0xc00000)\r
+ {\r
+ PicoVideoWrite(a, (u16)(d>>16));\r
+ PicoVideoWrite(a+2,(u16)d);\r
+ return;\r
+ }\r
+\r
OtherWrite16(a, (u16)(d>>16));\r
OtherWrite16(a+2,(u16)d);\r
}\r
d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
if (a&1) d &= 0x0f;\r
else d >>= 4;\r
- dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
\r
// PCM\r
if ((a&0xff8000)==0xff0000) {\r
- dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
+ elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
a &= 0x7fff;\r
if (a >= 0x2000)\r
d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
if (a & 2) d >>= 8;\r
}\r
- dprintf("ret = %02x", (u8)d);\r
+ elprintf(EL_IO, "ret = %02x", (u8)d);\r
goto end;\r
}\r
\r
goto end;\r
}\r
\r
- dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
+ elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
\r
end:\r
\r
-#ifdef __debug_io2\r
- dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
-#endif\r
+ elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
#ifdef EMU_CORE_DEBUG\r
lastread_a = ab;\r
lastread_d[lrp_cyc++&15] = d;\r
int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
d |= d << 4; d &= ~0xf0;\r
- dprintf("FIXME: decode");\r
} else {\r
// allow access in any mode, like Gens does\r
d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
goto end;\r
}\r
\r
- dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
+ elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
\r
end:\r
\r
-#ifdef __debug_io2\r
- dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
-#endif\r
+ elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
#ifdef EMU_CORE_DEBUG\r
lastread_a = ab;\r
lastread_d[lrp_cyc++&15] = d;\r
goto end;\r
}\r
\r
- dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
+ elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
\r
end:\r
\r
-#ifdef __debug_io2\r
- dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
-#endif\r
+ elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
#ifdef EMU_CORE_DEBUG\r
if (ab > 0x78) { // not vectors and stuff\r
lastread_a = ab;\r
#else\r
static void PicoWriteS68k8(u32 a,u8 d)\r
{\r
-#ifdef __debug_io2\r
- dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
-#endif\r
+ elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
\r
a&=0xffffff;\r
\r
return;\r
}\r
\r
- dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
+ elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
#endif\r
\r
#else\r
static void PicoWriteS68k16(u32 a,u16 d)\r
{\r
-#ifdef __debug_io2\r
- dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
-#endif\r
+ elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
\r
a&=0xfffffe;\r
\r
return;\r
}\r
\r
- dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
+ elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
#endif\r
\r
#else\r
static void PicoWriteS68k32(u32 a,u32 d)\r
{\r
-#ifdef __debug_io2\r
- dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
-#endif\r
+ elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
\r
a&=0xfffffe;\r
\r
return;\r
}\r
\r
- dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
+ elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
#endif\r
\r
}\r
\r
// Error - Program Counter is invalid\r
- dprintf("m68k FIXME: unhandled jump to %06x", pc);\r
+ elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);\r
\r
return (int)Pico_mcd->bios;\r
}\r
}\r
\r
// Error - Program Counter is invalid\r
- dprintf("s68k FIXME: unhandled jump to %06x", pc);\r
+ elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);\r
\r
return (int)Pico_mcd->prg_ram;\r
}\r
\r
PICO_INTERNAL void PicoMemSetupCD(void)\r
{\r
- dprintf("PicoMemSetupCD()");\r
+ // additional handlers for common code\r
+ PicoRead16Hook = OtherRead16End;\r
+ PicoWrite8Hook = OtherWrite8End;\r
+\r
#ifdef EMU_C68K\r
// Setup m68k memory callbacks:\r
PicoCpuCM68k.checkpc=PicoCheckPcM68k;\r
int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
}\r
- dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
+ elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
} else {\r
if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
}\r
}\r
- dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
+ elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
}\r
return 0;//(u8) lastread_d;\r
}\r
int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
}\r
- dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
+ elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
} else {\r
if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
}\r
}\r
- dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
+ elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
}\r
return 0;\r
}\r
pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
return (pm[0]<<16)|pm[1];\r
}\r
- dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
+ elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
} else {\r
if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
return (pm[0]<<16)|pm[1];\r
}\r
}\r
- dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
+ elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
}\r
return 0;\r
}\r
notaz.gp2x.de / picodrive.git / blobdiff