// This is part of Pico Library\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006 notaz, All rights reserved.\r
+// (c) Copyright 2007 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
#include "../sound/ym2612.h"\r
#include "../sound/sn76496.h"\r
\r
+#include "gfx_cd.h"\r
+#include "pcm.h"\r
+\r
+#include "cell_map.c"\r
+\r
typedef unsigned char u8;\r
typedef unsigned short u16;\r
typedef unsigned int u32;\r
\r
//#define __debug_io\r
//#define __debug_io2\r
+//#define rdprintf dprintf\r
+#define rdprintf(...)\r
\r
// -----------------------------------------------------------------\r
\r
-// extern m68ki_cpu_core m68ki_cpu;\r
-\r
-extern int counter75hz;\r
\r
-\r
-static u32 m68k_reg_read16(u32 a, int realsize)\r
+static u32 m68k_reg_read16(u32 a)\r
{\r
u32 d=0;\r
a &= 0x3e;\r
\r
switch (a) {\r
case 0:\r
- d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m68k_regs[1]; // here IFL2 is always 0, just like in Gens\r
+ d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
+ dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
+ goto end;\r
+ case 4:\r
+ d = Pico_mcd->s68k_regs[4]<<8;\r
+ goto end;\r
+ case 6:\r
+ d = Pico_mcd->m.hint_vector;\r
goto end;\r
case 8:\r
- dprintf("m68k host data read");\r
d = Read_CDC_Host(0);\r
goto end;\r
+ case 0xA:\r
+ dprintf("m68k FIXME: reserved read");\r
+ goto end;\r
case 0xC:\r
- dprintf("m68k stopwatch read");\r
- break;\r
- }\r
-\r
- if (a < 0xE) {\r
- d = (Pico_mcd->m68k_regs[a]<<8) | Pico_mcd->m68k_regs[a+1];\r
- goto end;\r
+ dprintf("m68k stopwatch timer read");\r
+ d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ goto end;\r
}\r
\r
if (a < 0x30) {\r
goto end;\r
}\r
\r
- dprintf("m68k_regs invalid read @ %02x", a);\r
+ dprintf("m68k_regs FIXME invalid read @ %02x", a);\r
\r
end:\r
\r
return d;\r
}\r
\r
-static void m68k_reg_write8(u32 a, u32 d, int realsize)\r
+static void m68k_reg_write8(u32 a, u32 d)\r
{\r
a &= 0x3f;\r
// dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
case 0:\r
d &= 1;\r
if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
- break;\r
+ return;\r
case 1:\r
d &= 3;\r
- if (!(d&1)) PicoMCD |= 2; // reset pending, needed to be sure we fetch the right vectors on reset\r
- if ( (Pico_mcd->m68k_regs[1]&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
- if ( (Pico_mcd->m68k_regs[1]&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
- if (/*!(Pico_mcd->m68k_regs[1]&1) &&*/ (PicoMCD&2) && (d&3)==1) {\r
+ if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
+ if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
+ if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
+ if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
SekResetS68k(); // S68k comes out of RESET or BRQ state\r
- PicoMCD&=~2;\r
+ Pico_mcd->m.state_flags&=~1;\r
dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
}\r
- break;\r
+ Pico_mcd->m.busreq = d;\r
+ return;\r
case 2:\r
Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
return;\r
case 3:\r
+ dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
d &= 0xc2;\r
if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))\r
dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
//if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
// ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
d |= Pico_mcd->s68k_regs[3]&0x1d;\r
- if (d & 2) d &= ~1; // returning word RAM to s68k\r
+ if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
return;\r
+ case 6:\r
+ dprintf("FIXME hint[2]: %02x @%06x", (u8)d, SekPc);\r
+ Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
+ return;\r
+ case 7:\r
+ dprintf("FIXME hint[3]: %02x @%06x", (u8)d, SekPc);\r
+ Pico_mcd->bios[0x72] = d;\r
+ dprintf("vector is now %08x", PicoRead32(0x70));\r
+ return;\r
case 0xe:\r
//dprintf("m68k: comm flag: %02x", d);\r
-\r
- //dprintf("s68k @ %06x", SekPcS68k);\r
-\r
Pico_mcd->s68k_regs[0xe] = d;\r
- break;\r
- }\r
-\r
- if (a < 0x10) {\r
- Pico_mcd->m68k_regs[a] = (u8) d;\r
- return;\r
+ return;\r
}\r
\r
if ((a&0xf0) == 0x10) {\r
return;\r
}\r
\r
- if (a >= 0x20 || (a >= 0xa && a <= 0xd) || a == 0x0f)\r
- dprintf("m68k: invalid write?");\r
+ dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);\r
}\r
\r
\r
\r
-static u32 s68k_reg_read16(u32 a, int realsize)\r
+static u32 s68k_reg_read16(u32 a)\r
{\r
u32 d=0;\r
- a &= 0x1fe;\r
\r
// dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
\r
switch (a) {\r
case 0:\r
- d = 1; goto end; // ver = 0, not in reset state\r
+ d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
+ goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
+ dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
goto end;\r
case 6:\r
d = CDC_Read_Reg();\r
goto end;\r
case 8:\r
- dprintf("s68k host data read");\r
- d = Read_CDC_Host(1);\r
+ d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
goto end;\r
case 0xC:\r
- dprintf("s68k stopwatch read");\r
+ dprintf("s68k stopwatch timer read");\r
+ d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ goto end;\r
+ case 0x30:\r
+ dprintf("s68k int3 timer read");\r
break;\r
case 0x34: // fader\r
d = 0; // no busy bit\r
return d;\r
}\r
\r
-static void s68k_reg_write8(u32 a, u32 d, int realsize)\r
+static void s68k_reg_write8(u32 a, u32 d)\r
{\r
- a &= 0x1ff;\r
//dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
\r
// TODO: review against Gens\r
switch (a) {\r
case 2:\r
return; // only m68k can change WP\r
- case 3:\r
+ case 3: {\r
+ int dold = Pico_mcd->s68k_regs[3];\r
+ dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
d &= 0x1d;\r
- d |= Pico_mcd->s68k_regs[3]&0xc2;\r
- if (d&1) d &= ~2; // returning word RAM to m68k\r
+ if (d&4) {\r
+ d |= dold&0xc2;\r
+ if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
+ if (!(dold & 4)) {\r
+ dprintf("wram mode 2M->1M");\r
+ wram_2M_to_1M(Pico_mcd->word_ram2M);\r
+ }\r
+ } else {\r
+ d |= Pico_mcd->s68k_regs[3]&0xc3;\r
+ if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
+ if (dold & 4) {\r
+ dprintf("wram mode 1M->2M");\r
+ wram_1M_to_2M(Pico_mcd->word_ram2M);\r
+ }\r
+ }\r
break;\r
+ }\r
case 4:\r
dprintf("s68k CDC dest: %x", d&7);\r
Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
return;\r
case 5:\r
- dprintf("s68k CDC reg addr: %x", d&0xf);\r
+ //dprintf("s68k CDC reg addr: %x", d&0xf);\r
break;\r
case 7:\r
CDC_Write_Reg(d);\r
case 0xa:\r
dprintf("s68k set CDC dma addr");\r
break;\r
+ case 0xc:\r
+ case 0xd:\r
+ dprintf("s68k set stopwatch timer");\r
+ Pico_mcd->m.timer_stopwatch = 0;\r
+ return;\r
+ case 0xe:\r
+ Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair\r
+ Pico_mcd->m.timer_stopwatch = 0;\r
+ return;\r
+ case 0x31:\r
+ dprintf("s68k set int3 timer: %02x", d);\r
+ Pico_mcd->m.timer_int3 = d << 16;\r
+ break;\r
case 0x33: // IRQ mask\r
dprintf("s68k irq mask: %02x", d);\r
if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
CDD_Export_Status();\r
- // counter75hz = 0; // ???\r
}\r
break;\r
case 0x34: // fader\r
Pico_mcd->s68k_regs[0x37] = d&7;\r
if ((d&4) && !(d_old&4)) {\r
CDD_Export_Status();\r
- // counter75hz = 0; // ???\r
}\r
return;\r
}\r
return;\r
}\r
\r
- if ((a&0x1f0) == 0x10 || a == 0x0e || (a >= 0x38 && a < 0x42))\r
+ if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
{\r
- dprintf("m68k: invalid write @ %02x?", a);\r
+ dprintf("s68k FIXME: invalid write @ %02x?", a);\r
return;\r
}\r
\r
\r
\r
\r
-\r
-\r
-static int PadRead(int i)\r
-{\r
- int pad=0,value=0,TH;\r
- pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
- TH=Pico.ioports[i+1]&0x40;\r
-\r
- if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
- int phase = Pico.m.padTHPhase[i];\r
-\r
- if(phase == 2 && !TH) {\r
- value=(pad&0xc0)>>2; // ?0SA 0000\r
- goto end;\r
- } else if(phase == 3 && TH) {\r
- value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
- goto end;\r
- } else if(phase == 3 && !TH) {\r
- value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
- goto end;\r
- }\r
- }\r
-\r
- if(TH) value=(pad&0x3f); // ?1CB RLDU\r
- else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
-\r
- end:\r
-\r
- // orr the bits, which are set as output\r
- value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r
-\r
- return value; // will mirror later\r
-}\r
-\r
-static u8 z80Read8(u32 a)\r
-{\r
- if(Pico.m.z80Run&1) return 0;\r
-\r
- a&=0x1fff;\r
-\r
- if(!(PicoOpt&4)) {\r
- // Z80 disabled, do some faking\r
- static u8 zerosent = 0;\r
- if(a == Pico.m.z80_lastaddr) { // probably polling something\r
- u8 d = Pico.m.z80_fakeval;\r
- if((d & 0xf) == 0xf && !zerosent) {\r
- d = 0; zerosent = 1;\r
- } else {\r
- Pico.m.z80_fakeval++;\r
- zerosent = 0;\r
- }\r
- return d;\r
- } else {\r
- Pico.m.z80_fakeval = 0;\r
- }\r
- }\r
-\r
- Pico.m.z80_lastaddr = (u16) a;\r
- return Pico.zram[a];\r
-}\r
-\r
-\r
-// for nonstandard reads\r
-static u32 UnusualRead16(u32 a, int realsize)\r
-{\r
- u32 d=0;\r
-\r
- dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
-\r
-\r
- dprintf("ret = %04x", d);\r
- return d;\r
-}\r
-\r
-static u32 OtherRead16(u32 a, int realsize)\r
+static u32 OtherRead16End(u32 a, int realsize)\r
{\r
u32 d=0;\r
\r
- if ((a&0xff0000)==0xa00000) {\r
- if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r
- if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled\r
- d=0xffff; goto end;\r
- }\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- switch(a) {\r
- case 0: d=Pico.m.hardware; break; // Hardware value (Version register)\r
- case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r
- case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r
- default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r
- }\r
- d|=d<<8;\r
- goto end;\r
- }\r
- // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r
- if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }\r
-\r
- if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r
-\r
if ((a&0xffffc0)==0xa12000) {\r
- d=m68k_reg_read16(a, realsize);\r
+ d=m68k_reg_read16(a);\r
goto end;\r
}\r
\r
- d = UnusualRead16(a, realsize);\r
+ dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
\r
end:\r
return d;\r
}\r
\r
-//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
\r
-static void OtherWrite8(u32 a,u32 d,int realsize)\r
+static void OtherWrite8End(u32 a, u32 d, int realsize)\r
{\r
- if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r
- if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if(PicoOpt&0x20) {\r
- if(a==1) {\r
- Pico.m.padDelay[0] = 0;\r
- if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
- }\r
- else if(a==2) {\r
- Pico.m.padDelay[1] = 0;\r
- if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
- }\r
- }\r
- Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
- return;\r
- }\r
- if (a==0xa11100) {\r
- extern int z80startCycle, z80stopCycle;\r
- //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
- d&=1; d^=1;\r
- if(!d) {\r
- // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r
- if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);\r
- z80stopCycle = SekCyclesDone();\r
- //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r
- } else {\r
- z80startCycle = SekCyclesDone();\r
- //if(Pico.m.scanline != -1)\r
- //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r
- }\r
- //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);\r
- Pico.m.z80Run=(u8)d; return;\r
- }\r
- if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }\r
-\r
- if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r
- {\r
- Pico.m.z80_bank68k>>=1;\r
- Pico.m.z80_bank68k|=(d&1)<<8;\r
- Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
- return;\r
- }\r
-\r
- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r
-\r
- if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d, realsize); return; }\r
+ if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
\r
- dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
+ dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
}\r
\r
-static void OtherWrite16(u32 a,u32 d)\r
-{\r
- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r
-\r
- if ((a&0xffffe0)==0xa10000) { // I/O ports\r
- a=(a>>1)&0xf;\r
- // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if(PicoOpt&0x20) {\r
- if(a==1) {\r
- Pico.m.padDelay[0] = 0;\r
- if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
- }\r
- else if(a==2) {\r
- Pico.m.padDelay[1] = 0;\r
- if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
- }\r
- }\r
- Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
- return;\r
- }\r
- if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r
- if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }\r
\r
- OtherWrite8(a, d>>8, 16);\r
- OtherWrite8(a+1,d&0xff, 16);\r
-}\r
+#undef _ASM_MEMORY_C\r
+#include "../MemoryCmn.c"\r
+\r
\r
// -----------------------------------------------------------------\r
// Read Rom and read Ram\r
goto end;\r
}\r
\r
+#if 0\r
+ if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r
+ {\r
+ int i;\r
+ FILE *ff;\r
+ unsigned short *ram = (unsigned short *) Pico.ram;\r
+ // unswap and dump RAM\r
+ for (i = 0; i < 0x10000/2; i++)\r
+ ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
+ ff = fopen("ram.bin", "wb");\r
+ fwrite(ram, 1, 0x10000, ff);\r
+ fclose(ff);\r
+ exit(0);\r
+ }\r
+#endif\r
+\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000)\r
+ a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
+ else a &= 0x1ffff;\r
+ d = Pico_mcd->word_ram1M[bank][a^1];\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
+ }\r
+ dprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+\r
if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
+ rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
\r
d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("ret = %02x", (u8)d);\r
+ rdprintf("ret = %02x", (u8)d);\r
\r
end:\r
\r
return (u8)d;\r
}\r
\r
+\r
u16 PicoReadM68k16(u32 a)\r
{\r
u16 d=0;\r
goto end;\r
}\r
\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000)\r
+ a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
+ else a &= 0x1fffe;\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ }\r
+ dprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
+ rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
\r
d = (u16)OtherRead16(a, 16);\r
\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("ret = %04x", d);\r
+ rdprintf("ret = %04x", d);\r
\r
end:\r
\r
return d;\r
}\r
\r
+\r
u32 PicoReadM68k32(u32 a)\r
{\r
u32 d=0;\r
goto end;\r
}\r
\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000) { // cell arranged\r
+ u32 a1, a2;\r
+ a1 = (a&2) | (cell_map(a >> 2) << 2);\r
+ if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
+ else a2 = a1 + 2;\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
+ d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
+ } else {\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
+ }\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
+ }\r
+ dprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
+ rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
\r
d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("ret = %08x", d);\r
+ rdprintf("ret = %08x", d);\r
\r
end:\r
#ifdef __debug_io\r
return d;\r
}\r
\r
+\r
// -----------------------------------------------------------------\r
// Write Ram\r
\r
// dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
\r
\r
- if ((a&0xe00000)==0xe00000) { u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram\r
+ if ((a&0xe00000)==0xe00000) { // Ram\r
+ *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
+ return;\r
+ }\r
\r
a&=0xffffff;\r
\r
// prg RAM\r
if ((a&0xfe0000)==0x020000) {\r
u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- u8 *pm=(u8 *)(prg_bank+((a^1)&0x1ffff));\r
- *pm=d;\r
+ *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
+ return;\r
+ }\r
+\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000)\r
+ a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
+ else a &= 0x1ffff;\r
+ *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
+ }\r
return;\r
}\r
\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
+ rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
\r
OtherWrite8(a,d,8);\r
}\r
\r
+\r
void PicoWriteM68k16(u32 a,u16 d)\r
{\r
#ifdef __debug_io\r
dprintf("w16: %06x, %04x", a&0xffffff, d);\r
#endif\r
- //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
// dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
\r
- if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
+ if ((a&0xe00000)==0xe00000) { // Ram\r
+ *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
+ return;\r
+ }\r
\r
a&=0xfffffe;\r
\r
return;\r
}\r
\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000)\r
+ a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
+ else a &= 0x1fffe;\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
+ }\r
+ return;\r
+ }\r
+\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
+ rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
\r
OtherWrite16(a,d);\r
}\r
\r
+\r
void PicoWriteM68k32(u32 a,u32 d)\r
{\r
#ifdef __debug_io\r
}\r
\r
// word RAM\r
- if (a!=0x200000 && (a&0xfc0000)==0x200000) // tmp hack\r
+ if ((a&0xfc0000)==0x200000) {\r
+ if (d != 0) // don't log clears\r
+ dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ if (a >= 0x220000) { // cell arranged\r
+ u32 a1, a2;\r
+ a1 = (a&2) | (cell_map(a >> 2) << 2);\r
+ if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
+ else a2 = a1 + 2;\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
+ } else {\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ }\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ }\r
return;\r
-\r
+ }\r
\r
if ((a&0xffffc0)==0xa12000)\r
- dprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
+ rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
\r
OtherWrite16(a, (u16)(d>>16));\r
OtherWrite16(a+2,(u16)d);\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- dprintf("s68k_regs r8: [%02x] @ %06x", a&0x1ff, SekPcS68k);\r
- d = s68k_reg_read16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
+ a &= 0x1ff;\r
+ rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ d = gfx_cd_read(a&~1);\r
+ else d = s68k_reg_read16(a&~1);\r
+ if ((a&1)==0) d>>=8;\r
+ rdprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ // test: batman returns\r
+ dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
+ if (a&1) d &= 0x0f;\r
+ else d >>= 4;\r
+ dprintf("FIXME: decode");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
+ }\r
dprintf("ret = %02x", (u8)d);\r
goto end;\r
}\r
\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
+ dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
+ dprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+\r
+ // PCM\r
+ if ((a&0xff8000)==0xff0000) {\r
+ dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
+ a &= 0x7fff;\r
+ if (a >= 0x2000)\r
+ d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
+ else if (a >= 0x20) {\r
+ a &= 0x1e;\r
+ d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
+ if (a & 2) d >>= 8;\r
+ }\r
+ dprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ d = Pico_mcd->bram[(a>>1)&0x1fff];\r
+ goto end;\r
+ }\r
+\r
dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
\r
end:\r
return (u8)d;\r
}\r
\r
+\r
u16 PicoReadS68k16(u32 a)\r
{\r
- u16 d=0;\r
+ u32 d=0;\r
\r
a&=0xfffffe;\r
\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- dprintf("s68k_regs r16: [%02x] @ %06x", a&0x1fe, SekPcS68k);\r
- d = s68k_reg_read16(a, 16);\r
+ a &= 0x1fe;\r
+ rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ d = gfx_cd_read(a);\r
+ else d = s68k_reg_read16(a);\r
+ rdprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
+ d |= d << 4; d &= ~0xf0;\r
+ dprintf("FIXME: decode");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ }\r
+ dprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
+ dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ dprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
+ a = (a>>1)&0x1fff;\r
+ d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
+ d|= Pico_mcd->bram[a++] << 8;\r
+ dprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
+ // PCM\r
+ if ((a&0xff8000)==0xff0000) {\r
+ dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
+ a &= 0x7fff;\r
+ if (a >= 0x2000)\r
+ d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
+ else if (a >= 0x20) {\r
+ a &= 0x1e;\r
+ d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
+ if (a & 2) d >>= 8;\r
+ }\r
dprintf("ret = %04x", d);\r
goto end;\r
}\r
return d;\r
}\r
\r
+\r
u32 PicoReadS68k32(u32 a)\r
{\r
u32 d=0;\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- dprintf("s68k_regs r32: [%02x] @ %06x", a&0x1fe, SekPcS68k);\r
- d = (s68k_reg_read16(a, 32)<<16)|s68k_reg_read16(a+2, 32);\r
+ a &= 0x1fe;\r
+ rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
+ else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
+ rdprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ a >>= 1;\r
+ d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
+ d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
+ d |= d << 4; d &= 0x0f0f0f0f;\r
+ dprintf("FIXME: decode");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
+ }\r
+ dprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
+ dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
+ dprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
+ // PCM\r
+ if ((a&0xff8000)==0xff0000) {\r
+ dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
+ a &= 0x7fff;\r
+ if (a >= 0x2000) {\r
+ a >>= 1;\r
+ d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
+ d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
+ } else if (a >= 0x20) {\r
+ a &= 0x1e;\r
+ if (a & 2) {\r
+ a >>= 2;\r
+ d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
+ d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
+ } else {\r
+ d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
+ d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
+ }\r
+ }\r
+ dprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
+ a = (a>>1)&0x1fff;\r
+ d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
+ d|= Pico_mcd->bram[a++] << 24;\r
+ d|= Pico_mcd->bram[a++];\r
+ d|= Pico_mcd->bram[a++] << 8;\r
dprintf("ret = %08x", d);\r
goto end;\r
}\r
return d;\r
}\r
\r
+\r
// -----------------------------------------------------------------\r
\r
void PicoWriteS68k8(u32 a,u8 d)\r
return;\r
}\r
\r
- if (a != 0xff0011 && (a&0xff8000) == 0xff0000) // PCM hack\r
- return;\r
-\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- dprintf("s68k_regs w8: [%02x] %02x @ %06x", a&0x1ff, d, SekPcS68k);\r
- s68k_reg_write8(a,d,8);\r
+ a &= 0x1ff;\r
+ rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ gfx_cd_write(a&~1, (d<<8)|d);\r
+ else s68k_reg_write8(a,d);\r
+ return;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ if (a&1) d &= 0x0f;\r
+ else d >>= 4;\r
+ Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff]=d;\r
+ dprintf("FIXME: decode");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
+ if (d)\r
+ dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
+ return;\r
+ }\r
+\r
+ // PCM\r
+ if ((a&0xff8000)==0xff0000) {\r
+ a &= 0x7fff;\r
+ if (a >= 0x2000)\r
+ Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
+ else if (a < 0x12)\r
+ pcm_write(a>>1, d);\r
+ return;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
+ SRam.changed = 1;\r
return;\r
}\r
\r
dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
\r
+\r
void PicoWriteS68k16(u32 a,u16 d)\r
{\r
#ifdef __debug_io2\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- dprintf("s68k_regs w16: [%02x] %04x @ %06x", a&0x1ff, d, SekPcS68k);\r
- s68k_reg_write8(a, d>>8, 16);\r
- s68k_reg_write8(a+1,d&0xff, 16);\r
+ a &= 0x1fe;\r
+ rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ gfx_cd_write(a, d);\r
+ else {\r
+ if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
+ Pico_mcd->s68k_regs[0xf] = d;\r
+ return;\r
+ }\r
+ s68k_reg_write8(a, d>>8);\r
+ s68k_reg_write8(a+1,d&0xff);\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ d &= ~0xf0; d |= d >> 8;\r
+ Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff] = d;\r
+ dprintf("FIXME: decode");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
+ if (d)\r
+ dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
+ return;\r
+ }\r
+\r
+ // PCM\r
+ if ((a&0xff8000)==0xff0000) {\r
+ a &= 0x7fff;\r
+ if (a >= 0x2000)\r
+ Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
+ else if (a < 0x12)\r
+ pcm_write(a>>1, d & 0xff);\r
+ return;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
+ a = (a>>1)&0x1fff;\r
+ Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
+ Pico_mcd->bram[a++] = d >> 8;\r
+ SRam.changed = 1;\r
return;\r
}\r
\r
dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
\r
+\r
void PicoWriteS68k32(u32 a,u32 d)\r
{\r
#ifdef __debug_io2\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- dprintf("s68k_regs w32: [%02x] %08x @ %06x", a&0x1ff, d, SekPcS68k);\r
- s68k_reg_write8(a, d>>24, 32);\r
- s68k_reg_write8(a+1,(d>>16)&0xff, 32);\r
- s68k_reg_write8(a+2,(d>>8) &0xff, 32);\r
- s68k_reg_write8(a+3, d &0xff, 32);\r
+ a &= 0x1fe;\r
+ rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68) {\r
+ gfx_cd_write(a, d>>16);\r
+ gfx_cd_write(a+2, d&0xffff);\r
+ } else {\r
+ s68k_reg_write8(a, d>>24);\r
+ s68k_reg_write8(a+1,(d>>16)&0xff);\r
+ s68k_reg_write8(a+2,(d>>8) &0xff);\r
+ s68k_reg_write8(a+3, d &0xff);\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ a >>= 1;\r
+ d &= 0x0f0f0f0f; d |= d >> 4;\r
+ Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] = d >> 16;\r
+ Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff] = d;\r
+ dprintf("FIXME: decode");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff\r
+ int bank;\r
+ u16 *pm;\r
+ if (d)\r
+ dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ dprintf("s68k_wram1M FIXME: wrong mode");\r
+ bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ return;\r
+ }\r
+\r
+ // PCM\r
+ if ((a&0xff8000)==0xff0000) {\r
+ a &= 0x7fff;\r
+ if (a >= 0x2000) {\r
+ a >>= 1;\r
+ Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
+ Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
+ } else if (a < 0x12) {\r
+ a >>= 1;\r
+ pcm_write(a, (d>>16) & 0xff);\r
+ pcm_write(a+1, d & 0xff);\r
+ }\r
+ return;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
+ a = (a>>1)&0x1fff;\r
+ Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
+ Pico_mcd->bram[a++] = d >> 24;\r
+ Pico_mcd->bram[a++] = d;\r
+ Pico_mcd->bram[a++] = d >> 8;\r
+ SRam.changed = 1;\r
return;\r
}\r
\r
\r
// -----------------------------------------------------------------\r
\r
+\r
+#if defined(EMU_C68K)\r
+static __inline int PicoMemBaseM68k(u32 pc)\r
+{\r
+ if ((pc&0xe00000)==0xe00000)\r
+ return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
+\r
+ if (pc < 0x20000)\r
+ return (int)Pico_mcd->bios; // Program Counter in BIOS\r
+\r
+ if ((pc&0xfc0000)==0x200000)\r
+ {\r
+ if (!(Pico_mcd->s68k_regs[3]&4))\r
+ return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
+ if (pc < 0x220000) {\r
+ int bank = (Pico_mcd->s68k_regs[3]&1);\r
+ return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
+ }\r
+ }\r
+\r
+ // Error - Program Counter is invalid\r
+ dprintf("m68k FIXME: unhandled jump to %06x", pc);\r
+\r
+ return (int)Pico_mcd->bios;\r
+}\r
+\r
+\r
+static u32 PicoCheckPcM68k(u32 pc)\r
+{\r
+ pc-=PicoCpu.membase; // Get real pc\r
+ pc&=0xfffffe;\r
+\r
+ PicoCpu.membase=PicoMemBaseM68k(pc);\r
+\r
+ return PicoCpu.membase+pc;\r
+}\r
+\r
+\r
+static __inline int PicoMemBaseS68k(u32 pc)\r
+{\r
+ if (pc < 0x80000) // PRG RAM\r
+ return (int)Pico_mcd->prg_ram;\r
+\r
+ if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
+ return (int)Pico_mcd->word_ram2M - 0x080000;\r
+\r
+ if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
+ }\r
+\r
+ // Error - Program Counter is invalid\r
+ dprintf("s68k FIXME: unhandled jump to %06x", pc);\r
+\r
+ return (int)Pico_mcd->prg_ram;\r
+}\r
+\r
+\r
+static u32 PicoCheckPcS68k(u32 pc)\r
+{\r
+ pc-=PicoCpuS68k.membase; // Get real pc\r
+ pc&=0xfffffe;\r
+\r
+ PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r
+\r
+ return PicoCpuS68k.membase+pc;\r
+}\r
+#endif\r
+\r
+\r
+void PicoMemSetupCD()\r
+{\r
+ dprintf("PicoMemSetupCD()");\r
+#ifdef EMU_C68K\r
+ // Setup m68k memory callbacks:\r
+ PicoCpu.checkpc=PicoCheckPcM68k;\r
+ PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r
+ PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r
+ PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r
+ PicoCpu.write8 =PicoWriteM68k8;\r
+ PicoCpu.write16=PicoWriteM68k16;\r
+ PicoCpu.write32=PicoWriteM68k32;\r
+ // s68k\r
+ PicoCpuS68k.checkpc=PicoCheckPcS68k;\r
+ PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r
+ PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r
+ PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r
+ PicoCpuS68k.write8 =PicoWriteS68k8;\r
+ PicoCpuS68k.write16=PicoWriteS68k16;\r
+ PicoCpuS68k.write32=PicoWriteS68k32;\r
+#endif\r
+}\r
+\r
+\r
#ifdef EMU_M68K\r
unsigned char PicoReadCD8w (unsigned int a) {\r
return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
- else dprintf("s68k read_pcrel8 @ %06x", a);\r
+ if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
+ return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
+ }\r
+ dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
+ if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
+ if((a&0xfc0000)==0x200000) { // word RAM\r
+ if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
+ return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
+ else if (a < 0x220000) {\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
+ }\r
+ }\r
+ dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
}\r
return 0;//(u8) lastread_d;\r
}\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
- else dprintf("s68k read_pcrel16 @ %06x", a);\r
+ if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
+ return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ }\r
+ dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
+ if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
+ if((a&0xfc0000)==0x200000) { // word RAM\r
+ if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
+ return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
+ else if (a < 0x220000) {\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ }\r
+ }\r
+ dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
}\r
- return 0;//(u16) lastread_d;\r
+ return 0;\r
}\r
unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
+ u16 *pm;\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
- else dprintf("s68k read_pcrel32 @ %06x", a);\r
+ if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
+ { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
+ int bank = !(Pico_mcd->s68k_regs[3]&1);\r
+ pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ return (pm[0]<<16)|pm[1];\r
+ }\r
+ dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
+ if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
+ if((a&0xfc0000)==0x200000) { // word RAM\r
+ if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
+ { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
+ else if (a < 0x220000) {\r
+ int bank = Pico_mcd->s68k_regs[3]&1;\r
+ pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
+ return (pm[0]<<16)|pm[1];\r
+ }\r
+ }\r
+ dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
}\r
- return 0; //lastread_d;\r
+ return 0;\r
}\r
#endif // EMU_M68K\r
\r
notaz.gp2x.de / picodrive.git / blobdiff