// This is part of Pico Library\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006 notaz, All rights reserved.\r
+// (c) Copyright 2007 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
#include "../sound/ym2612.h"\r
#include "../sound/sn76496.h"\r
\r
+#include "gfx_cd.h"\r
+\r
typedef unsigned char u8;\r
typedef unsigned short u16;\r
typedef unsigned int u32;\r
\r
//#define __debug_io\r
//#define __debug_io2\r
+//#define rdprintf dprintf\r
+#define rdprintf(...)\r
\r
// -----------------------------------------------------------------\r
\r
// extern m68ki_cpu_core m68ki_cpu;\r
\r
-extern int counter75hz;\r
-\r
\r
-static u32 m68k_reg_read16(u32 a, int realsize)\r
+static u32 m68k_reg_read16(u32 a)\r
{\r
u32 d=0;\r
a &= 0x3e;\r
- dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
+ // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
\r
switch (a) {\r
+ case 0:\r
+ d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
+ goto end;\r
case 2:\r
- d = (Pico_mcd->m68k_regs[a]<<8) | Pico_mcd->m68k_regs[a+1] | 1; // for now 2M to m68k\r
+ d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
+ dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
+ goto end;\r
+ case 4:\r
+ d = Pico_mcd->s68k_regs[4]<<8;\r
+ goto end;\r
+ case 6:\r
+ d = Pico_mcd->m.hint_vector;\r
goto end;\r
case 8:\r
- dprintf("m68k host data read");\r
d = Read_CDC_Host(0);\r
goto end;\r
+ case 0xA:\r
+ dprintf("m68k reserved read");\r
+ goto end;\r
case 0xC:\r
- dprintf("m68k stopwatch read");\r
+ dprintf("m68k stopwatch timer read");\r
break;\r
}\r
\r
- if (a < 0xE) {\r
- d = (Pico_mcd->m68k_regs[a]<<8) | Pico_mcd->m68k_regs[a+1];\r
- goto end;\r
- }\r
-\r
if (a < 0x30) {\r
// comm flag/cmd/status (0xE-0x2F)\r
d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
\r
end:\r
\r
- dprintf("ret = %04x", d);\r
+ // dprintf("ret = %04x", d);\r
return d;\r
}\r
\r
-static void m68k_reg_write8(u32 a, u32 d, int realsize)\r
+static void m68k_reg_write8(u32 a, u32 d)\r
{\r
a &= 0x3f;\r
- dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
+ // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
\r
switch (a) {\r
case 0:\r
+ d &= 1;\r
if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r
- break;\r
+ return;\r
case 1:\r
- if (!(d&1)) PicoMCD |= 2; // reset pending, needed to be sure we fetch the right vectors on reset\r
- if ( (Pico_mcd->m68k_regs[1]&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
- if ( (Pico_mcd->m68k_regs[1]&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
- if (/*!(Pico_mcd->m68k_regs[1]&1) &&*/ (PicoMCD&2) && (d&3)==1) {\r
+ d &= 3;\r
+ if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
+ if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
+ if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
+ if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
SekResetS68k(); // S68k comes out of RESET or BRQ state\r
- PicoMCD&=~2;\r
- dprintf("m68k: resetting s68k");\r
+ Pico_mcd->m.state_flags&=~1;\r
+ dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
}\r
- break;\r
+ Pico_mcd->m.busreq = d;\r
+ return;\r
+ case 2:\r
+ Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
+ return;\r
case 3:\r
- if ((Pico_mcd->m68k_regs[3]>>6) != ((d>>6)&3))\r
- dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->m68k_regs[a]>>6), ((d>>6)&3));\r
- if ((Pico_mcd->m68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
- if ((Pico_mcd->m68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
- ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
- break;\r
+ dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
+ d &= 0xc2;\r
+ if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))\r
+ dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
+ //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
+ //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
+ // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
+ d |= Pico_mcd->s68k_regs[3]&0x1d;\r
+ if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r
+ Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r
+ return;\r
+ case 6:\r
+ *((char *)&Pico_mcd->m.hint_vector+1) = d;\r
+ Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
+ return;\r
+ case 7:\r
+ *(char *)&Pico_mcd->m.hint_vector = d;\r
+ Pico_mcd->bios[0x72] = d;\r
+ return;\r
case 0xe:\r
- dprintf("m68k: comm flag: %02x", d);\r
+ //dprintf("m68k: comm flag: %02x", d);\r
\r
- dprintf("s68k @ %06x", SekPcS68k);\r
+ //dprintf("s68k @ %06x", SekPcS68k);\r
\r
Pico_mcd->s68k_regs[0xe] = d;\r
- break;\r
+ return;\r
}\r
\r
- if ((a&0xff) == 0x10) {\r
+ if ((a&0xf0) == 0x10) {\r
Pico_mcd->s68k_regs[a] = d;\r
+ return;\r
}\r
\r
- if (a >= 0x20 || (a >= 0xa && a <= 0xd) || a == 0x0f)\r
- dprintf("m68k: invalid write?");\r
-\r
- if (a < 0x10)\r
- Pico_mcd->m68k_regs[a] = (u8) d;\r
+ dprintf("m68k: invalid write? [%02x] %02x", a, d);\r
}\r
\r
\r
\r
-static u32 s68k_reg_read16(u32 a, int realsize)\r
+static u32 s68k_reg_read16(u32 a)\r
{\r
u32 d=0;\r
- a &= 0x1fe;\r
\r
- dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
+ // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
\r
switch (a) {\r
case 0:\r
- d = 1; goto end; // ver = 0, not in reset state\r
+ d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
+ goto end;\r
+ case 2:\r
+ d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r
+ dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
+ goto end;\r
case 6:\r
d = CDC_Read_Reg();\r
goto end;\r
case 8:\r
- dprintf("s68k host data read");\r
- d = Read_CDC_Host(1);\r
+ d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
goto end;\r
case 0xC:\r
- dprintf("s68k stopwatch read");\r
+ dprintf("s68k stopwatch timer read");\r
+ break;\r
+ case 0x30:\r
+ dprintf("s68k int3 timer read");\r
break;\r
case 0x34: // fader\r
d = 0; // no busy bit\r
\r
end:\r
\r
- dprintf("ret = %04x", d);\r
+ // dprintf("ret = %04x", d);\r
\r
return d;\r
}\r
\r
-static void s68k_reg_write8(u32 a, u32 d, int realsize)\r
+static void s68k_reg_write8(u32 a, u32 d)\r
{\r
- a &= 0x1ff;\r
- dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
+ //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
\r
// TODO: review against Gens\r
switch (a) {\r
+ case 2:\r
+ return; // only m68k can change WP\r
+ case 3:\r
+ dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
+ d &= 0x1d;\r
+ if (d&4) {\r
+ d |= Pico_mcd->s68k_regs[3]&0xc2;\r
+ if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
+ } else {\r
+ d |= Pico_mcd->s68k_regs[3]&0xc3;\r
+ if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
+ }\r
+ break;\r
case 4:\r
dprintf("s68k CDC dest: %x", d&7);\r
Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
return;\r
case 5:\r
- dprintf("s68k CDC reg addr: %x", d&0xf);\r
+ //dprintf("s68k CDC reg addr: %x", d&0xf);\r
break;\r
case 7:\r
CDC_Write_Reg(d);\r
case 0xa:\r
dprintf("s68k set CDC dma addr");\r
break;\r
+ case 0xc:\r
+ dprintf("s68k set stopwatch timer");\r
+ break;\r
+ case 0x31:\r
+ dprintf("s68k set int3 timer");\r
+ break;\r
case 0x33: // IRQ mask\r
dprintf("s68k irq mask: %02x", d);\r
if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
CDD_Export_Status();\r
- // counter75hz = 0; // ???\r
}\r
break;\r
case 0x34: // fader\r
Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
return;\r
- case 0x37:\r
- if ((d&4) && !(Pico_mcd->s68k_regs[0x37]&4)) {\r
+ case 0x36:\r
+ return; // d/m bit is unsetable\r
+ case 0x37: {\r
+ u32 d_old = Pico_mcd->s68k_regs[0x37];\r
+ Pico_mcd->s68k_regs[0x37] = d&7;\r
+ if ((d&4) && !(d_old&4)) {\r
CDD_Export_Status();\r
- // counter75hz = 0; // ???\r
}\r
- break;\r
+ return;\r
+ }\r
case 0x4b:\r
Pico_mcd->s68k_regs[a] = (u8) d;\r
CDD_Import_Command();\r
\r
if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r
\r
- if ((a&0xffffc0)==0xa12000) { d=m68k_reg_read16(a, realsize); goto end; }\r
+ if ((a&0xffffc0)==0xa12000) {\r
+ d=m68k_reg_read16(a);\r
+ goto end;\r
+ }\r
\r
d = UnusualRead16(a, realsize);\r
\r
\r
if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r
\r
- if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d, realsize); return; }\r
+ if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
\r
dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
}\r
\r
// prg RAM\r
if ((a&0xfe0000)==0x020000) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
d = *(prg_bank+((a^1)&0x1ffff));\r
goto end;\r
}\r
\r
+#if 0\r
+ if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r
+ {\r
+ int i;\r
+ FILE *ff;\r
+ unsigned short *ram = (unsigned short *) Pico.ram;\r
+ // unswap and dump RAM\r
+ for (i = 0; i < 0x10000/2; i++)\r
+ ram[i] = (ram[i]>>8) | (ram[i]<<8);\r
+ ff = fopen("ram.bin", "wb");\r
+ fwrite(ram, 1, 0x10000, ff);\r
+ fclose(ff);\r
+ exit(0);\r
+ }\r
+#endif\r
+\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ if (a >= 0x220000) {\r
+ dprintf("cell");\r
+ } else {\r
+ a=((a&0x1fffe)<<1)|(a&1);\r
+ if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
+ d = Pico_mcd->word_ram[a^1];\r
+ }\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r
+ }\r
+ dprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+\r
if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
+\r
d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %02x", (u8)d);\r
+\r
end:\r
\r
#ifdef __debug_io\r
return (u8)d;\r
}\r
\r
+\r
u16 PicoReadM68k16(u32 a)\r
{\r
u16 d=0;\r
\r
// prg RAM\r
if ((a&0xfe0000)==0x020000) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
d = *(u16 *)(prg_bank+(a&0x1fffe));\r
goto end;\r
}\r
\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ if (a >= 0x220000) {\r
+ dprintf("cell");\r
+ } else {\r
+ a=((a&0x1fffe)<<1);\r
+ if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
+ d = *(u16 *)(Pico_mcd->word_ram+a);\r
+ }\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ }\r
+ dprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
+\r
d = (u16)OtherRead16(a, 16);\r
\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %04x", d);\r
+\r
end:\r
\r
#ifdef __debug_io\r
return d;\r
}\r
\r
+\r
u32 PicoReadM68k32(u32 a)\r
{\r
u32 d=0;\r
\r
// prg RAM\r
if ((a&0xfe0000)==0x020000) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
d = (pm[0]<<16)|pm[1];\r
goto end;\r
}\r
\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ if (a >= 0x220000) {\r
+ dprintf("cell");\r
+ } else {\r
+ a=((a&0x1fffe)<<1);\r
+ if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
+ d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r
+ d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r
+ }\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
+ }\r
+ dprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
+\r
d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("ret = %08x", d);\r
+\r
end:\r
#ifdef __debug_io\r
dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
return d;\r
}\r
\r
+\r
// -----------------------------------------------------------------\r
// Write Ram\r
\r
// dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
\r
\r
- if ((a&0xe00000)==0xe00000) { u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram\r
+ if ((a&0xe00000)==0xe00000) { // Ram\r
+ *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
+ return;\r
+ }\r
\r
a&=0xffffff;\r
\r
// prg RAM\r
if ((a&0xfe0000)==0x020000) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];\r
- u8 *pm=(u8 *)(prg_bank+((a^1)&0x1ffff));\r
- *pm=d;\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
+ *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
+ return;\r
+ }\r
+\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ if (a >= 0x220000) {\r
+ dprintf("cell");\r
+ } else {\r
+ a=((a&0x1fffe)<<1)|(a&1);\r
+ if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
+ *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r
+ }\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r
+ }\r
return;\r
}\r
\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
+\r
OtherWrite8(a,d,8);\r
}\r
\r
+\r
void PicoWriteM68k16(u32 a,u16 d)\r
{\r
#ifdef __debug_io\r
dprintf("w16: %06x, %04x", a&0xffffff, d);\r
#endif\r
- //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
// dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
\r
- if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
+ if ((a&0xe00000)==0xe00000) { // Ram\r
+ *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
+ return;\r
+ }\r
\r
a&=0xfffffe;\r
\r
// prg RAM\r
if ((a&0xfe0000)==0x020000) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
*(u16 *)(prg_bank+(a&0x1fffe))=d;\r
return;\r
}\r
\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ if (a >= 0x220000) {\r
+ dprintf("cell");\r
+ } else {\r
+ a=((a&0x1fffe)<<1);\r
+ if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
+ *(u16 *)(Pico_mcd->word_ram+a)=d;\r
+ }\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r
+ }\r
+ return;\r
+ }\r
+\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
\r
OtherWrite16(a,d);\r
}\r
\r
+\r
void PicoWriteM68k32(u32 a,u32 d)\r
{\r
#ifdef __debug_io\r
\r
// prg RAM\r
if ((a&0xfe0000)==0x020000) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->m68k_regs[3]>>6];\r
+ u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
return;\r
}\r
\r
+ // word RAM\r
+ if ((a&0xfc0000)==0x200000) {\r
+ if (d != 0) // don't log clears\r
+ dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ if (a >= 0x220000) {\r
+ dprintf("cell");\r
+ } else {\r
+ a=((a&0x1fffe)<<1);\r
+ if (Pico_mcd->s68k_regs[3]&1) a+=2;\r
+ *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r
+ *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r
+ }\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ }\r
+ return;\r
+ }\r
+\r
+ if ((a&0xffffc0)==0xa12000)\r
+ rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
\r
OtherWrite16(a, (u16)(d>>16));\r
OtherWrite16(a+2,(u16)d);\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- d = s68k_reg_read16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
+ a &= 0x1ff;\r
+ rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ d = gfx_cd_read(a&~1);\r
+ else d = s68k_reg_read16(a&~1);\r
+ if ((a&1)==0) d>>=8;\r
+ rdprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ // TODO (decode)\r
+ dprintf("(decode)");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r
+ }\r
+ dprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPc);\r
+ a=((a&0x1fffe)<<1)|(a&1);\r
+ if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
+ d = Pico_mcd->word_ram[a^1];\r
+ dprintf("ret = %02x", (u8)d);\r
+ goto end;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ d = Pico_mcd->bram[(a>>1)&0x1fff];\r
goto end;\r
}\r
\r
return (u8)d;\r
}\r
\r
+\r
u16 PicoReadS68k16(u32 a)\r
{\r
u16 d=0;\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- d = s68k_reg_read16(a, 16);\r
+ a &= 0x1fe;\r
+ rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ d = gfx_cd_read(a);\r
+ else d = s68k_reg_read16(a);\r
+ rdprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ // TODO (decode)\r
+ dprintf("(decode)");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ }\r
+ dprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPc);\r
+ a=((a&0x1fffe)<<1);\r
+ if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
+ d = *(u16 *)(Pico_mcd->word_ram+a);\r
+ dprintf("ret = %04x", d);\r
+ goto end;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ dprintf("s68k_bram r16: [%06x] @%06x", a, SekPc);\r
+ a = (a>>1)&0x1fff;\r
+ d = Pico_mcd->bram[a++]; // Gens does little endian here, an so do we..\r
+ d|= Pico_mcd->bram[a++] << 8;\r
+ dprintf("ret = %04x", d);\r
goto end;\r
}\r
\r
return d;\r
}\r
\r
+\r
u32 PicoReadS68k32(u32 a)\r
{\r
u32 d=0;\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- d = (s68k_reg_read16(a, 32)<<16)|s68k_reg_read16(a+2, 32);\r
+ a &= 0x1fe;\r
+ rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
+ else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
+ rdprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ // TODO (decode)\r
+ dprintf("(decode)");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
+ }\r
+ dprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPc);\r
+ a=((a&0x1fffe)<<1);\r
+ if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
+ d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r
+ d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r
+ dprintf("ret = %08x", d);\r
+ goto end;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ dprintf("s68k_bram r32: [%06x] @%06x", a, SekPc);\r
+ a = (a>>1)&0x1fff;\r
+ d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
+ d|= Pico_mcd->bram[a++] << 24;\r
+ d|= Pico_mcd->bram[a++];\r
+ d|= Pico_mcd->bram[a++] << 8;\r
+ dprintf("ret = %08x", d);\r
goto end;\r
}\r
\r
return d;\r
}\r
\r
+\r
// -----------------------------------------------------------------\r
\r
void PicoWriteS68k8(u32 a,u8 d)\r
return;\r
}\r
\r
+ if (a != 0xff0011 && (a&0xff8000) == 0xff0000) // PCM hack\r
+ return;\r
+\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- s68k_reg_write8(a,d,8);\r
+ a &= 0x1ff;\r
+ rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ gfx_cd_write(a&~1, (d<<8)|d);\r
+ else s68k_reg_write8(a,d);\r
+ return;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ // TODO (decode)\r
+ dprintf("(decode)");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if (d)\r
+ dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPc);\r
+ a=((a&0x1fffe)<<1)|(a&1);\r
+ if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
+ *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r
+ return;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
+ SRam.changed = 1;\r
return;\r
}\r
\r
dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
\r
+\r
void PicoWriteS68k16(u32 a,u16 d)\r
{\r
#ifdef __debug_io2\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- s68k_reg_write8(a, d>>8, 16);\r
- s68k_reg_write8(a+1,d&0xff, 16);\r
+ a &= 0x1fe;\r
+ rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68)\r
+ gfx_cd_write(a, d);\r
+ else {\r
+ s68k_reg_write8(a, d>>8);\r
+ s68k_reg_write8(a+1,d&0xff);\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ // TODO (decode)\r
+ dprintf("(decode)");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if (d)\r
+ dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPc);\r
+ a=((a&0x1fffe)<<1);\r
+ if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
+ *(u16 *)(Pico_mcd->word_ram+a)=d;\r
+ return;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPc);\r
+ a = (a>>1)&0x1fff;\r
+ Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
+ Pico_mcd->bram[a++] = d >> 8;\r
+ SRam.changed = 1;\r
return;\r
}\r
\r
dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
}\r
\r
+\r
void PicoWriteS68k32(u32 a,u32 d)\r
{\r
#ifdef __debug_io2\r
\r
// regs\r
if ((a&0xfffe00) == 0xff8000) {\r
- s68k_reg_write8(a, d>>24, 32);\r
- s68k_reg_write8(a+1,(d>>16)&0xff, 32);\r
- s68k_reg_write8(a+2,(d>>8) &0xff, 32);\r
- s68k_reg_write8(a+3, d &0xff, 32);\r
+ a &= 0x1fe;\r
+ rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
+ if (a >= 0x50 && a < 0x68) {\r
+ gfx_cd_write(a, d>>16);\r
+ gfx_cd_write(a+2, d&0xffff);\r
+ } else {\r
+ s68k_reg_write8(a, d>>24);\r
+ s68k_reg_write8(a+1,(d>>16)&0xff);\r
+ s68k_reg_write8(a+2,(d>>8) &0xff);\r
+ s68k_reg_write8(a+3, d &0xff);\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (2M area)\r
+ if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
+ dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPc);\r
+ if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
+ // TODO (decode)\r
+ dprintf("(decode)");\r
+ } else {\r
+ // allow access in any mode, like Gens does\r
+ u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
+ }\r
+ return;\r
+ }\r
+\r
+ // word RAM (1M area)\r
+ if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
+ if (d)\r
+ dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPc);\r
+ a=((a&0x1fffe)<<1);\r
+ if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r
+ *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r
+ *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r
+ return;\r
+ }\r
+\r
+ // bram\r
+ if ((a&0xff0000)==0xfe0000) {\r
+ dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPc);\r
+ a = (a>>1)&0x1fff;\r
+ Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
+ Pico_mcd->bram[a++] = d >> 24;\r
+ Pico_mcd->bram[a++] = d;\r
+ Pico_mcd->bram[a++] = d >> 8;\r
+ SRam.changed = 1;\r
return;\r
}\r
\r
\r
// -----------------------------------------------------------------\r
\r
+\r
+#if defined(EMU_C68K)\r
+static __inline int PicoMemBaseM68k(u32 pc)\r
+{\r
+ int membase=0;\r
+\r
+ if (pc < 0x20000)\r
+ {\r
+ membase=(int)Pico_mcd->bios; // Program Counter in BIOS\r
+ }\r
+ else if ((pc&0xe00000)==0xe00000)\r
+ {\r
+ membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
+ }\r
+ else if ((pc&0xfc0000)==0x200000 && !(Pico_mcd->s68k_regs[3]&4))\r
+ {\r
+ membase=(int)Pico_mcd->word_ram-0x200000; // Program Counter in Word Ram\r
+ }\r
+ else\r
+ {\r
+ // Error - Program Counter is invalid\r
+ dprintf("m68k: unhandled jump to %06x", pc);\r
+ membase=(int)Pico.rom;\r
+ }\r
+\r
+ return membase;\r
+}\r
+\r
+\r
+static u32 PicoCheckPcM68k(u32 pc)\r
+{\r
+ pc-=PicoCpu.membase; // Get real pc\r
+ pc&=0xfffffe;\r
+\r
+ PicoCpu.membase=PicoMemBaseM68k(pc);\r
+\r
+ return PicoCpu.membase+pc;\r
+}\r
+\r
+\r
+static __inline int PicoMemBaseS68k(u32 pc)\r
+{\r
+ int membase;\r
+\r
+ membase=(int)Pico_mcd->prg_ram; // Program Counter in Prg RAM\r
+ if (pc >= 0x80000)\r
+ {\r
+ // Error - Program Counter is invalid\r
+ dprintf("s68k: unhandled jump to %06x", pc);\r
+ }\r
+\r
+ return membase;\r
+}\r
+\r
+\r
+static u32 PicoCheckPcS68k(u32 pc)\r
+{\r
+ pc-=PicoCpuS68k.membase; // Get real pc\r
+ pc&=0xfffffe;\r
+\r
+ PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r
+\r
+ return PicoCpuS68k.membase+pc;\r
+}\r
+#endif\r
+\r
+\r
+void PicoMemSetupCD()\r
+{\r
+ dprintf("PicoMemSetupCD()");\r
+#ifdef EMU_C68K\r
+ // Setup m68k memory callbacks:\r
+ PicoCpu.checkpc=PicoCheckPcM68k;\r
+ PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r
+ PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r
+ PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r
+ PicoCpu.write8 =PicoWriteM68k8;\r
+ PicoCpu.write16=PicoWriteM68k16;\r
+ PicoCpu.write32=PicoWriteM68k32;\r
+ // s68k\r
+ PicoCpuS68k.checkpc=PicoCheckPcS68k;\r
+ PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r
+ PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r
+ PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r
+ PicoCpuS68k.write8 =PicoWriteS68k8;\r
+ PicoCpuS68k.write16=PicoWriteS68k16;\r
+ PicoCpuS68k.write32=PicoWriteS68k32;\r
+#endif\r
+}\r
+\r
+\r
#ifdef EMU_M68K\r
unsigned char PicoReadCD8w (unsigned int a) {\r
return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
- else dprintf("s68k read_pcrel8 @ %06x", a);\r
+ dprintf("s68k_read_pcrelative_CD8: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
+ if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
+ if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
+ return Pico_mcd->word_ram[(a^1)&0x3fffe];\r
+ dprintf("m68k_read_pcrelative_CD8: can't handle %06x", a);\r
}\r
return 0;//(u8) lastread_d;\r
}\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
- else dprintf("s68k read_pcrel16 @ %06x", a);\r
+ dprintf("s68k_read_pcrelative_CD16: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
+ if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
+ if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
+ return *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r
+ dprintf("m68k_read_pcrelative_CD16: can't handle %06x", a);\r
}\r
- return 0;//(u16) lastread_d;\r
+ return 0;\r
}\r
unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r
a&=0xffffff;\r
if(m68ki_cpu_p == &PicoS68kCPU) {\r
if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
- else dprintf("s68k read_pcrel32 @ %06x", a);\r
+ dprintf("s68k_read_pcrelative_CD32: can't handle %06x", a);\r
} else {\r
- if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
+ if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
+ if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r
+ { u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
+ dprintf("m68k_read_pcrelative_CD32: can't handle %06x", a);\r
}\r
- return 0; //lastread_d;\r
+ return 0;\r
}\r
#endif // EMU_M68K\r
\r
notaz.gp2x.de / picodrive.git / blobdiff