// -----------------------------------------------------------------\r
\r
// poller detection\r
-#define USE_POLL_DETECT\r
#define POLL_LIMIT 16\r
#define POLL_CYCLES 124\r
// int m68k_poll_addr, m68k_poll_cnt;\r
goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
- dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
+ dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
goto end;\r
case 4:\r
d = Pico_mcd->s68k_regs[4]<<8;\r
d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
} else {\r
//dold &= ~2; // ??\r
+#if 1\r
+ if ((d & 2) && !(dold & 2)) {\r
+ Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
+ d &= ~2;\r
+ }\r
+#else\r
if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
+#endif\r
}\r
Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
#ifdef USE_POLL_DETECT\r
return; // only m68k can change WP\r
case 3: {\r
int dold = Pico_mcd->s68k_regs[3];\r
- dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
+ dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r
d &= 0x1d;\r
d |= dold&0xc2;\r
if (d&4) {\r