FAME integration finished, some adjustments of CPU core stuff

[picodrive.git] / Pico / cd / Pico.s

diff --git a/Pico/cd/Pico.s b/Pico/cd/Pico.s
index 380ca5d..87e8554 100644 (file)
--- a/Pico/cd/Pico.s
+++ b/Pico/cd/Pico.s
@@ -1,6 +1,6 @@
 @ vim:filetype=armasm
 
-@ SekRunPS runs PicoCpu and PicoCpuS68k interleaved in steps of PS_STEP_M68K
+@ SekRunPS runs PicoCpuCM68k and PicoCpuCS68k interleaved in steps of PS_STEP_M68K
 @ cycles. This is done without calling CycloneRun and jumping directly to
 @ Cyclone code to avoid pushing/popping all the registers every time.
 
@@ -13,8 +13,8 @@
 @ .extern is ignored by gas, we add these here just to see what we depend on.
 .extern CycloneJumpTab
 .extern CycloneDoInterrupt
-.extern PicoCpu
-.extern PicoCpuS68k
+.extern PicoCpuCM68k
+.extern PicoCpuCS68k
 .extern SekCycleAim
 .extern SekCycleCnt
 .extern SekCycleAimS68k
@@ -32,12 +32,12 @@ SekRunPS:
     sub     sp, sp, #2*4          @ sp[0] = main_cycle_cnt, sp[4] = run_cycle_cnt
 
     @ override CycloneEnd for both contexts
-    ldr     r7, =PicoCpu
-    ldr     lr, =PicoCpuS68k
+    ldr     r7, =PicoCpuCM68k
+    ldr     lr, =PicoCpuCS68k
     ldr     r2, =CycloneEnd_M68k
     ldr     r3, =CycloneEnd_S68k
-    str     r2, [r7,#0x54]
-    str     r3, [lr,#0x54]
+    str     r2, [r7,#0x98]
+    str     r3, [lr,#0x98]
 
     @ update aims
     ldr     r8, =SekCycleAim
@@ -90,7 +90,7 @@ schedule_s68k:
     subs    r5, r0, r3, asr #16
     ble     schedule_m68k             @ s68k has not enough cycles
 
-    ldr     r7, =PicoCpuS68k
+    ldr     r7, =PicoCpuCS68k
     str     r5, [sp,#4]               @ run_cycle_cnt
     b       CycloneRunLocal
 
@@ -122,25 +122,24 @@ schedule_m68k:
     subs    r5, r0, r3, asr #16
     ble     schedule_s68k             @ m68k has not enough cycles
 
-    ldr     r7, =PicoCpu
+    ldr     r7, =PicoCpuCM68k
     str     r5, [sp,#4]               @ run_cycle_cnt
     b       CycloneRunLocal
 
 
 
 SekRunPS_end:
-    ldr     r7, =PicoCpu
-    ldr     lr, =PicoCpuS68k
+    ldr     r7, =PicoCpuCM68k
+    ldr     lr, =PicoCpuCS68k
     mov     r0, #0
-    str     r0, [r7,#0x54]            @ remove CycloneEnd handler
-    str     r0, [lr,#0x54]
+    str     r0, [r7,#0x98]            @ remove CycloneEnd handler
+    str     r0, [lr,#0x98]
     @ return
     add     sp, sp, #2*4
     ldmfd   sp!, {r4-r11,pc}
 
 
 
-
 CycloneRunLocal:
                      ;@ r0-3 = Temporary registers
   ldr r4,[r7,#0x40]  ;@ r4 = Current PC + Memory Base
@@ -159,20 +158,23 @@ CycloneRunLocal:
   cmp r0,#6 ;@ irq>6 ?
   andle r1,r1,#7 ;@ Get interrupt mask
   cmple r0,r1 ;@ irq<=6: Is irq<=mask ?
-  ldrgt lr,[r7,#0x54]      @ Interrupt will definitely use more cycles than our step,
-  bgt CycloneDoInterrupt   @ so make this function return directly to CycloneEnd_*
+  bgt CycloneDoInterrupt
 NoIntsLocal:
 
-  ;@ Check if our processor is in stopped state and jump to opcode handler if not
-  ldr r0,[r7,#0x58]
+;@ Check if our processor is in special state
+;@ and jump to opcode handler if not
+  ldr r0,[r7,#0x58] ;@ state_flags
   ldrh r8,[r4],#2 ;@ Fetch first opcode
-  tst r0,r0 ;@ stopped?
+  tst r0,#0x03 ;@ special state?
   andeq r9,r9,#0xf0000000
   ldreq pc,[r6,r8,asl #2] ;@ Jump to opcode handler
 
-  @ stopped
+CycloneSpecial2:
+  tst r0,#2 ;@ tracing?
+  bne CycloneDoTrace
+;@ stopped or halted
   sub r4,r4,#2
-  ldr r1,[r7,#0x54]
+  ldr r1,[r7,#0x98]
   mov r5,#0
   bx r1