+++ /dev/null
-// Memory I/O handlers for Sega/Mega CD.\r
-// Loosely based on Gens code.\r
-// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
-\r
-\r
-#include "../pico_int.h"\r
-\r
-#include "../sound/ym2612.h"\r
-#include "../sound/sn76496.h"\r
-\r
-#include "gfx_cd.h"\r
-#include "pcm.h"\r
-\r
-#ifndef UTYPES_DEFINED\r
-typedef unsigned char u8;\r
-typedef unsigned short u16;\r
-typedef unsigned int u32;\r
-#define UTYPES_DEFINED\r
-#endif\r
-\r
-#ifdef _MSC_VER\r
-#define rdprintf\r
-#define wrdprintf\r
-#define r3printf\r
-#else\r
-//#define rdprintf dprintf\r
-#define rdprintf(...)\r
-//#define wrdprintf dprintf\r
-#define wrdprintf(...)\r
-#define r3printf(...)\r
-#endif\r
-\r
-#ifdef EMU_CORE_DEBUG\r
-extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
-extern int lrp_cyc, lwp_cyc;\r
-#undef USE_POLL_DETECT\r
-#endif\r
-\r
-// -----------------------------------------------------------------\r
-\r
-// poller detection\r
-#define POLL_LIMIT 16\r
-#define POLL_CYCLES 124\r
-// int m68k_poll_addr, m68k_poll_cnt;\r
-unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-static u32 m68k_reg_read16(u32 a)\r
-{\r
- u32 d=0;\r
- a &= 0x3e;\r
- // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
-\r
- switch (a) {\r
- case 0:\r
- d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
- goto end;\r
- case 2:\r
- d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
- // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)\r
- if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }\r
- r3printf(EL_STATUS, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
- goto end;\r
- case 4:\r
- d = Pico_mcd->s68k_regs[4]<<8;\r
- goto end;\r
- case 6:\r
- d = *(u16 *)(Pico_mcd->bios + 0x72);\r
- goto end;\r
- case 8:\r
- d = Read_CDC_Host(0);\r
- goto end;\r
- case 0xA:\r
- elprintf(EL_UIO, "m68k FIXME: reserved read");\r
- goto end;\r
- case 0xC:\r
- d = Pico_mcd->m.timer_stopwatch >> 16;\r
- dprintf("m68k stopwatch timer read (%04x)", d);\r
- goto end;\r
- }\r
-\r
- if (a < 0x30) {\r
- // comm flag/cmd/status (0xE-0x2F)\r
- d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
- goto end;\r
- }\r
-\r
- elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
-\r
-end:\r
-\r
- return d;\r
-}\r
-#endif\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-static\r
-#endif\r
-void m68k_reg_write8(u32 a, u32 d)\r
-{\r
- a &= 0x3f;\r
- // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
-\r
- switch (a) {\r
- case 0:\r
- d &= 1;\r
- if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
- return;\r
- case 1:\r
- d &= 3;\r
- if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
- if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
- if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
- if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
- SekResetS68k(); // S68k comes out of RESET or BRQ state\r
- Pico_mcd->m.state_flags&=~1;\r
- dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
- }\r
- Pico_mcd->m.busreq = d;\r
- return;\r
- case 2:\r
- dprintf("m68k: prg wp=%02x", d);\r
- Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
- return;\r
- case 3: {\r
- u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
- r3printf(EL_STATUS, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
- d &= 0xc2;\r
- if ((dold>>6) != ((d>>6)&3))\r
- dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
- //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
- //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
- // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
- if (dold & 4) {\r
- d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
- } else {\r
- //dold &= ~2; // ??\r
-#if 1\r
- if (d & (d ^ dold) & 2) { // DMNA is being set\r
- Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
- d &= ~2;\r
- }\r
- else\r
- Pico_mcd->m.state_flags &= ~2;\r
-#else\r
- if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
-#endif\r
- }\r
- Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
-#ifdef USE_POLL_DETECT\r
- if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
- }\r
-#endif\r
- return;\r
- }\r
- case 6:\r
- Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
- return;\r
- case 7:\r
- Pico_mcd->bios[0x72] = d;\r
- dprintf("hint vector set to %08x", PicoRead32(0x70));\r
- return;\r
- case 0xf:\r
- d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
- case 0xe:\r
- //dprintf("m68k: comm flag: %02x", d);\r
- Pico_mcd->s68k_regs[0xe] = d;\r
-#ifdef USE_POLL_DETECT\r
- if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
- }\r
-#endif\r
- return;\r
- }\r
-\r
- if ((a&0xf0) == 0x10) {\r
- Pico_mcd->s68k_regs[a] = d;\r
-#ifdef USE_POLL_DETECT\r
- if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
- }\r
-#endif\r
- return;\r
- }\r
-\r
- elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
-}\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-static\r
-#endif\r
-u32 s68k_poll_detect(u32 a, u32 d)\r
-{\r
-#ifdef USE_POLL_DETECT\r
- // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
- if (SekIsStoppedS68k()) return d;\r
- // polling detection\r
- if (a == (s68k_poll_adclk&0xff)) {\r
- unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
- if (clkdiff <= POLL_CYCLES) {\r
- s68k_poll_cnt++;\r
- //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
- if (s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(1);\r
- elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
- }\r
- s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
- return d;\r
- }\r
- }\r
- s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
- s68k_poll_cnt = 0;\r
-#endif\r
- return d;\r
-}\r
-\r
-#define READ_FONT_DATA(basemask) \\r
-{ \\r
- unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
- unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
- if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
- if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
- if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
- if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
-}\r
-\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-static\r
-#endif\r
-u32 s68k_reg_read16(u32 a)\r
-{\r
- u32 d=0;\r
-\r
- // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
-\r
- switch (a) {\r
- case 0:\r
- return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
- case 2:\r
- d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
- r3printf(EL_STATUS, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
- return s68k_poll_detect(a, d);\r
- case 6:\r
- return CDC_Read_Reg();\r
- case 8:\r
- return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
- case 0xC:\r
- d = Pico_mcd->m.timer_stopwatch >> 16;\r
- dprintf("s68k stopwatch timer read (%04x)", d);\r
- return d;\r
- case 0x30:\r
- dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
- return Pico_mcd->s68k_regs[31];\r
- case 0x34: // fader\r
- return 0; // no busy bit\r
- case 0x50: // font data (check: Lunar 2, Silpheed)\r
- READ_FONT_DATA(0x00100000);\r
- return d;\r
- case 0x52:\r
- READ_FONT_DATA(0x00010000);\r
- return d;\r
- case 0x54:\r
- READ_FONT_DATA(0x10000000);\r
- return d;\r
- case 0x56:\r
- READ_FONT_DATA(0x01000000);\r
- return d;\r
- }\r
-\r
- d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
-\r
- if (a >= 0x0e && a < 0x30)\r
- return s68k_poll_detect(a, d);\r
-\r
- return d;\r
-}\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-static\r
-#endif\r
-void s68k_reg_write8(u32 a, u32 d)\r
-{\r
- //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
-\r
- // Warning: d might have upper bits set\r
- switch (a) {\r
- case 2:\r
- return; // only m68k can change WP\r
- case 3: {\r
- int dold = Pico_mcd->s68k_regs[3];\r
- r3printf(EL_STATUS, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r
- d &= 0x1d;\r
- d |= dold&0xc2;\r
- if (d&4)\r
- {\r
- if ((d ^ dold) & 5) {\r
- d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
- PicoMemResetCD(d);\r
- }\r
-#ifdef _ASM_CD_MEMORY_C\r
- if ((d ^ dold) & 0x1d)\r
- PicoMemResetCDdecode(d);\r
-#endif\r
- if (!(dold & 4)) {\r
- r3printf(EL_STATUS, "wram mode 2M->1M");\r
- wram_2M_to_1M(Pico_mcd->word_ram2M);\r
- }\r
- }\r
- else\r
- {\r
- if (dold & 4) {\r
- r3printf(EL_STATUS, "wram mode 1M->2M");\r
- if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
- d &= ~3;\r
- d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
- }\r
- wram_1M_to_2M(Pico_mcd->word_ram2M);\r
- PicoMemResetCD(d);\r
- }\r
- else\r
- d |= dold&1;\r
- if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
- }\r
- Pico_mcd->m.state_flags &= ~2;\r
- break;\r
- }\r
- case 4:\r
- dprintf("s68k CDC dest: %x", d&7);\r
- Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
- return;\r
- case 5:\r
- //dprintf("s68k CDC reg addr: %x", d&0xf);\r
- break;\r
- case 7:\r
- CDC_Write_Reg(d);\r
- return;\r
- case 0xa:\r
- dprintf("s68k set CDC dma addr");\r
- break;\r
- case 0xc:\r
- case 0xd:\r
- dprintf("s68k set stopwatch timer");\r
- Pico_mcd->m.timer_stopwatch = 0;\r
- return;\r
- case 0xe:\r
- Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
- return;\r
- case 0x31:\r
- dprintf("s68k set int3 timer: %02x", d);\r
- Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
- break;\r
- case 0x33: // IRQ mask\r
- dprintf("s68k irq mask: %02x", d);\r
- if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
- CDD_Export_Status();\r
- }\r
- break;\r
- case 0x34: // fader\r
- Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
- return;\r
- case 0x36:\r
- return; // d/m bit is unsetable\r
- case 0x37: {\r
- u32 d_old = Pico_mcd->s68k_regs[0x37];\r
- Pico_mcd->s68k_regs[0x37] = d&7;\r
- if ((d&4) && !(d_old&4)) {\r
- CDD_Export_Status();\r
- }\r
- return;\r
- }\r
- case 0x4b:\r
- Pico_mcd->s68k_regs[a] = (u8) d;\r
- CDD_Import_Command();\r
- return;\r
- }\r
-\r
- if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
- {\r
- elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
- return;\r
- }\r
-\r
- Pico_mcd->s68k_regs[a] = (u8) d;\r
-}\r
-\r
-\r
-static u32 OtherRead16End(u32 a, int realsize)\r
-{\r
- u32 d=0;\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
- if ((a&0xffffc0)==0xa12000) {\r
- d=m68k_reg_read16(a);\r
- goto end;\r
- }\r
-\r
- if (a==0x400000) {\r
- if (SRam.data != NULL) d=3; // 64k cart\r
- goto end;\r
- }\r
-\r
- if ((a&0xfe0000)==0x600000) {\r
- if (SRam.data != NULL) {\r
- d=SRam.data[((a>>1)&0xffff)+0x2000];\r
- if (realsize == 8) d|=d<<8;\r
- }\r
- goto end;\r
- }\r
-\r
- if (a==0x7ffffe) {\r
- d=Pico_mcd->m.bcram_reg;\r
- goto end;\r
- }\r
-#endif\r
-\r
- elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-end:\r
-#endif\r
- return d;\r
-}\r
-\r
-\r
-static void OtherWrite8End(u32 a, u32 d, int realsize)\r
-{\r
-#ifndef _ASM_CD_MEMORY_C\r
- if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
-\r
- if ((a&0xfe0000)==0x600000) {\r
- if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {\r
- SRam.data[((a>>1)&0xffff)+0x2000]=d;\r
- SRam.changed = 1;\r
- }\r
- return;\r
- }\r
-\r
- if (a==0x7fffff) {\r
- Pico_mcd->m.bcram_reg=d;\r
- return;\r
- }\r
-#endif\r
-\r
- elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
-}\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-#define _CD_MEMORY_C\r
-#undef _ASM_MEMORY_C\r
-#include "../memory_cmn.c"\r
-#include "cell_map.c"\r
-#endif\r
-\r
-\r
-// -----------------------------------------------------------------\r
-// Read Rom and read Ram\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-u32 PicoReadM68k8(u32 a);\r
-#else\r
-u32 PicoReadM68k8(u32 a)\r
-{\r
- u32 d=0;\r
-\r
- a&=0xffffff;\r
-\r
- switch (a >> 17)\r
- {\r
- case 0x00>>1: // BIOS: 000000 - 020000\r
- d = *(u8 *)(Pico_mcd->bios+(a^1));\r
- break;\r
- case 0x02>>1: // prg RAM\r
- if ((Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- d = *(prg_bank+((a^1)&0x1ffff));\r
- }\r
- break;\r
- case 0x20>>1: // word RAM: 200000 - 220000\r
- wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
- a &= 0x1ffff;\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- d = Pico_mcd->word_ram1M[bank][a^1];\r
- } else {\r
- // allow access in any mode, like Gens does\r
- d = Pico_mcd->word_ram2M[a^1];\r
- }\r
- wrdprintf("ret = %02x", (u8)d);\r
- break;\r
- case 0x22>>1: // word RAM: 220000 - 240000\r
- wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
- d = Pico_mcd->word_ram1M[bank][a^1];\r
- } else {\r
- // allow access in any mode, like Gens does\r
- d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
- }\r
- wrdprintf("ret = %02x", (u8)d);\r
- break;\r
- case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
- case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
- case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
- case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
- // VDP\r
- if ((a&0xe700e0)==0xc00000)\r
- d=PicoVideoRead8(a);\r
- break;\r
- case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
- case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
- case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
- case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
- // RAM:\r
- d = *(u8 *)(Pico.ram+((a^1)&0xffff));\r
- break;\r
- default:\r
- if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
-\r
- d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
-\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("ret = %02x", (u8)d);\r
- break;\r
- }\r
-\r
-\r
- elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- if (a>=Pico.romsize) {\r
- lastread_a = a;\r
- lastread_d[lrp_cyc++&15] = d;\r
- }\r
-#endif\r
- return d;\r
-}\r
-#endif\r
-\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-u32 PicoReadM68k16(u32 a);\r
-#else\r
-static u32 PicoReadM68k16(u32 a)\r
-{\r
- u32 d=0;\r
-\r
- a&=0xfffffe;\r
-\r
- switch (a >> 17)\r
- {\r
- case 0x00>>1: // BIOS: 000000 - 020000\r
- d = *(u16 *)(Pico_mcd->bios+a);\r
- break;\r
- case 0x02>>1: // prg RAM\r
- if ((Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
- d = *(u16 *)(prg_bank+(a&0x1fffe));\r
- wrdprintf("ret = %04x", d);\r
- }\r
- break;\r
- case 0x20>>1: // word RAM: 200000 - 220000\r
- wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
- a &= 0x1fffe;\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
- } else {\r
- // allow access in any mode, like Gens does\r
- d = *(u16 *)(Pico_mcd->word_ram2M+a);\r
- }\r
- wrdprintf("ret = %04x", d);\r
- break;\r
- case 0x22>>1: // word RAM: 220000 - 240000\r
- wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
- d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
- } else {\r
- // allow access in any mode, like Gens does\r
- d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- }\r
- wrdprintf("ret = %04x", d);\r
- break;\r
- case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
- case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
- case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
- case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
- // VDP\r
- if ((a&0xe700e0)==0xc00000)\r
- d=PicoVideoRead(a);\r
- break;\r
- case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
- case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
- case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
- case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
- // RAM:\r
- d=*(u16 *)(Pico.ram+(a&0xfffe));\r
- break;\r
- default:\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
-\r
- d = OtherRead16(a, 16);\r
-\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("ret = %04x", d);\r
- break;\r
- }\r
-\r
-\r
- elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- if (a>=Pico.romsize) {\r
- lastread_a = a;\r
- lastread_d[lrp_cyc++&15] = d;\r
- }\r
-#endif\r
- return d;\r
-}\r
-#endif\r
-\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-u32 PicoReadM68k32(u32 a);\r
-#else\r
-static u32 PicoReadM68k32(u32 a)\r
-{\r
- u32 d=0;\r
-\r
- a&=0xfffffe;\r
-\r
- switch (a >> 17)\r
- {\r
- case 0x00>>1: { // BIOS: 000000 - 020000\r
- u16 *pm=(u16 *)(Pico_mcd->bios+a);\r
- d = (pm[0]<<16)|pm[1];\r
- break;\r
- }\r
- case 0x02>>1: // prg RAM\r
- if ((Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
- d = (pm[0]<<16)|pm[1];\r
- }\r
- break;\r
- case 0x20>>1: // word RAM: 200000 - 220000\r
- wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
- a&=0x1fffe;\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
- d = (pm[0]<<16)|pm[1];\r
- } else {\r
- // allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);\r
- d = (pm[0]<<16)|pm[1];\r
- }\r
- wrdprintf("ret = %08x", d);\r
- break;\r
- case 0x22>>1: // word RAM: 220000 - 240000\r
- wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?\r
- u32 a1, a2;\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- a1 = (a&2) | (cell_map(a >> 2) << 2);\r
- if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
- else a2 = a1 + 2;\r
- d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
- d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
- } else {\r
- // allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- d = (pm[0]<<16)|pm[1];\r
- }\r
- wrdprintf("ret = %08x", d);\r
- break;\r
- case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
- case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
- case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
- case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
- // VDP\r
- d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
- break;\r
- case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
- case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
- case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
- case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {\r
- // RAM:\r
- u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
- d = (pm[0]<<16)|pm[1];\r
- break;\r
- }\r
- default:\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
-\r
- d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
-\r
- if ((a&0xffffc0)==0xa12000)\r
- rdprintf("ret = %08x", d);\r
- break;\r
- }\r
-\r
-\r
- elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- if (a>=Pico.romsize) {\r
- lastread_a = a;\r
- lastread_d[lrp_cyc++&15] = d;\r
- }\r
-#endif\r
- return d;\r
-}\r
-#endif\r
-\r
-\r
-// -----------------------------------------------------------------\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-void PicoWriteM68k8(u32 a,u8 d);\r
-#else\r
-void PicoWriteM68k8(u32 a,u8 d)\r
-{\r
- elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- if ((a&0xe00000)==0xe00000) { // Ram\r
- *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
- return;\r
- }\r
-\r
- // prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
- return;\r
- }\r
-\r
- a&=0xffffff;\r
-\r
- // word RAM\r
- if ((a&0xfc0000)==0x200000) {\r
- wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- if (a >= 0x220000)\r
- a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
- else a &= 0x1ffff;\r
- *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
- } else {\r
- // allow access in any mode, like Gens does\r
- *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
- }\r
- return;\r
- }\r
-\r
- if ((a&0xffffc0)==0xa12000) {\r
- rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
- m68k_reg_write8(a, d);\r
- return;\r
- }\r
-\r
- OtherWrite8(a,d);\r
-}\r
-#endif\r
-\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-void PicoWriteM68k16(u32 a,u16 d);\r
-#else\r
-static void PicoWriteM68k16(u32 a,u16 d)\r
-{\r
- elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- if ((a&0xe00000)==0xe00000) { // Ram\r
- *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
- return;\r
- }\r
-\r
- // prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
- *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
- return;\r
- }\r
-\r
- a&=0xfffffe;\r
-\r
- // word RAM\r
- if ((a&0xfc0000)==0x200000) {\r
- wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- if (a >= 0x220000)\r
- a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
- else a &= 0x1fffe;\r
- *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
- } else {\r
- // allow access in any mode, like Gens does\r
- *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
- }\r
- return;\r
- }\r
-\r
- // regs\r
- if ((a&0xffffc0)==0xa12000) {\r
- rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
- if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
- Pico_mcd->s68k_regs[0xe] = d >> 8;\r
-#ifdef USE_POLL_DETECT\r
- if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
- }\r
-#endif\r
- return;\r
- }\r
- m68k_reg_write8(a, d>>8);\r
- m68k_reg_write8(a+1,d&0xff);\r
- return;\r
- }\r
-\r
- // VDP\r
- if ((a&0xe700e0)==0xc00000) {\r
- PicoVideoWrite(a,(u16)d);\r
- return;\r
- }\r
-\r
- OtherWrite16(a,d);\r
-}\r
-#endif\r
-\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-void PicoWriteM68k32(u32 a,u32 d);\r
-#else\r
-static void PicoWriteM68k32(u32 a,u32 d)\r
-{\r
- elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- if ((a&0xe00000)==0xe00000)\r
- {\r
- // Ram:\r
- u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
- return;\r
- }\r
-\r
- // prg RAM\r
- if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
- u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
- u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
- return;\r
- }\r
-\r
- a&=0xfffffe;\r
-\r
- // word RAM\r
- if ((a&0xfc0000)==0x200000) {\r
- if (d != 0) // don't log clears\r
- wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- if (a >= 0x220000) { // cell arranged\r
- u32 a1, a2;\r
- a1 = (a&2) | (cell_map(a >> 2) << 2);\r
- if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
- else a2 = a1 + 2;\r
- *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
- *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
- } else {\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
- }\r
- } else {\r
- // allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
- }\r
- return;\r
- }\r
-\r
- if ((a&0xffffc0)==0xa12000) {\r
- rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
- if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
- }\r
-\r
- // VDP\r
- if ((a&0xe700e0)==0xc00000)\r
- {\r
- PicoVideoWrite(a, (u16)(d>>16));\r
- PicoVideoWrite(a+2,(u16)d);\r
- return;\r
- }\r
-\r
- OtherWrite16(a, (u16)(d>>16));\r
- OtherWrite16(a+2,(u16)d);\r
-}\r
-#endif\r
-\r
-\r
-// -----------------------------------------------------------------\r
-// S68k\r
-// -----------------------------------------------------------------\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-u32 PicoReadS68k8(u32 a);\r
-#else\r
-static u32 PicoReadS68k8(u32 a)\r
-{\r
- u32 d=0;\r
-\r
-#ifdef EMU_CORE_DEBUG\r
- u32 ab=a&0xfffffe;\r
-#endif\r
- a&=0xffffff;\r
-\r
- // prg RAM\r
- if (a < 0x80000) {\r
- d = *(Pico_mcd->prg_ram+(a^1));\r
- goto end;\r
- }\r
-\r
- // regs\r
- if ((a&0xfffe00) == 0xff8000) {\r
- a &= 0x1ff;\r
- rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
- if (a >= 0x0e && a < 0x30) {\r
- d = Pico_mcd->s68k_regs[a];\r
- s68k_poll_detect(a, d);\r
- rdprintf("ret = %02x", (u8)d);\r
- goto end;\r
- }\r
- else if (a >= 0x58 && a < 0x68)\r
- d = gfx_cd_read(a&~1);\r
- else d = s68k_reg_read16(a&~1);\r
- if ((a&1)==0) d>>=8;\r
- rdprintf("ret = %02x", (u8)d);\r
- goto end;\r
- }\r
-\r
- // word RAM (2M area)\r
- if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- // test: batman returns\r
- wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
- if (a&1) d &= 0x0f;\r
- else d >>= 4;\r
- } else {\r
- // allow access in any mode, like Gens does\r
- d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
- }\r
- wrdprintf("ret = %02x", (u8)d);\r
- goto end;\r
- }\r
-\r
- // word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
- int bank;\r
- wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
-// if (!(Pico_mcd->s68k_regs[3]&4))\r
-// dprintf("s68k_wram1M FIXME: wrong mode");\r
- bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
- wrdprintf("ret = %02x", (u8)d);\r
- goto end;\r
- }\r
-\r
- // PCM\r
- if ((a&0xff8000)==0xff0000) {\r
- elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
- a &= 0x7fff;\r
- if (a >= 0x2000)\r
- d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
- else if (a >= 0x20) {\r
- a &= 0x1e;\r
- d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
- if (a & 2) d >>= 8;\r
- }\r
- elprintf(EL_IO, "ret = %02x", (u8)d);\r
- goto end;\r
- }\r
-\r
- // bram\r
- if ((a&0xff0000)==0xfe0000) {\r
- d = Pico_mcd->bram[(a>>1)&0x1fff];\r
- goto end;\r
- }\r
-\r
- elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
-\r
- end:\r
-\r
- elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
-#ifdef EMU_CORE_DEBUG\r
- lastread_a = ab;\r
- lastread_d[lrp_cyc++&15] = d;\r
-#endif\r
- return d;\r
-}\r
-#endif\r
-\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-u32 PicoReadS68k16(u32 a);\r
-#else\r
-static u32 PicoReadS68k16(u32 a)\r
-{\r
- u32 d=0;\r
-\r
-#ifdef EMU_CORE_DEBUG\r
- u32 ab=a&0xfffffe;\r
-#endif\r
- a&=0xfffffe;\r
-\r
- // prg RAM\r
- if (a < 0x80000) {\r
- wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
- d = *(u16 *)(Pico_mcd->prg_ram+a);\r
- wrdprintf("ret = %04x", d);\r
- goto end;\r
- }\r
-\r
- // regs\r
- if ((a&0xfffe00) == 0xff8000) {\r
- a &= 0x1fe;\r
- rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
- if (a >= 0x58 && a < 0x68)\r
- d = gfx_cd_read(a);\r
- else d = s68k_reg_read16(a);\r
- rdprintf("ret = %04x", d);\r
- goto end;\r
- }\r
-\r
- // word RAM (2M area)\r
- if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
- d |= d << 4; d &= ~0xf0;\r
- } else {\r
- // allow access in any mode, like Gens does\r
- d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- }\r
- wrdprintf("ret = %04x", d);\r
- goto end;\r
- }\r
-\r
- // word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
- int bank;\r
- wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
-// if (!(Pico_mcd->s68k_regs[3]&4))\r
-// dprintf("s68k_wram1M FIXME: wrong mode");\r
- bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- wrdprintf("ret = %04x", d);\r
- goto end;\r
- }\r
-\r
- // bram\r
- if ((a&0xff0000)==0xfe0000) {\r
- dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
- a = (a>>1)&0x1fff;\r
- d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
- d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
- dprintf("ret = %04x", d);\r
- goto end;\r
- }\r
-\r
- // PCM\r
- if ((a&0xff8000)==0xff0000) {\r
- dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
- a &= 0x7fff;\r
- if (a >= 0x2000)\r
- d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
- else if (a >= 0x20) {\r
- a &= 0x1e;\r
- d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
- if (a & 2) d >>= 8;\r
- }\r
- dprintf("ret = %04x", d);\r
- goto end;\r
- }\r
-\r
- elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
-\r
- end:\r
-\r
- elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
-#ifdef EMU_CORE_DEBUG\r
- lastread_a = ab;\r
- lastread_d[lrp_cyc++&15] = d;\r
-#endif\r
- return d;\r
-}\r
-#endif\r
-\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-u32 PicoReadS68k32(u32 a);\r
-#else\r
-static u32 PicoReadS68k32(u32 a)\r
-{\r
- u32 d=0;\r
-\r
-#ifdef EMU_CORE_DEBUG\r
- u32 ab=a&0xfffffe;\r
-#endif\r
- a&=0xfffffe;\r
-\r
- // prg RAM\r
- if (a < 0x80000) {\r
- u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
- d = (pm[0]<<16)|pm[1];\r
- goto end;\r
- }\r
-\r
- // regs\r
- if ((a&0xfffe00) == 0xff8000) {\r
- a &= 0x1fe;\r
- rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
- if (a >= 0x58 && a < 0x68)\r
- d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
- else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
- rdprintf("ret = %08x", d);\r
- goto end;\r
- }\r
-\r
- // word RAM (2M area)\r
- if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
- if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- a >>= 1;\r
- d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
- d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
- d |= d << 4; d &= 0x0f0f0f0f;\r
- } else {\r
- // allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
- }\r
- wrdprintf("ret = %08x", d);\r
- goto end;\r
- }\r
-\r
- // word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
- int bank;\r
- u16 *pm;\r
- wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
-// if (!(Pico_mcd->s68k_regs[3]&4))\r
-// dprintf("s68k_wram1M FIXME: wrong mode");\r
- bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
- wrdprintf("ret = %08x", d);\r
- goto end;\r
- }\r
-\r
- // PCM\r
- if ((a&0xff8000)==0xff0000) {\r
- dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
- a &= 0x7fff;\r
- if (a >= 0x2000) {\r
- a >>= 1;\r
- d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
- d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
- } else if (a >= 0x20) {\r
- a &= 0x1e;\r
- if (a & 2) {\r
- a >>= 2;\r
- d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
- d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
- } else {\r
- d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
- d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
- }\r
- }\r
- dprintf("ret = %08x", d);\r
- goto end;\r
- }\r
-\r
- // bram\r
- if ((a&0xff0000)==0xfe0000) {\r
- dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
- a = (a>>1)&0x1fff;\r
- d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
- d|= Pico_mcd->bram[a++] << 24;\r
- d|= Pico_mcd->bram[a++];\r
- d|= Pico_mcd->bram[a++] << 8;\r
- dprintf("ret = %08x", d);\r
- goto end;\r
- }\r
-\r
- elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
-\r
- end:\r
-\r
- elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
-#ifdef EMU_CORE_DEBUG\r
- if (ab > 0x78) { // not vectors and stuff\r
- lastread_a = ab;\r
- lastread_d[lrp_cyc++&15] = d;\r
- }\r
-#endif\r
- return d;\r
-}\r
-#endif\r
-\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-/* check: jaguar xj 220 (draws entire world using decode) */\r
-static void decode_write8(u32 a, u8 d, int r3)\r
-{\r
- u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
- u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
-\r
- r3 &= 0x18;\r
- d &= 0x0f;\r
- if (!(a&1)) d <<= 4;\r
-\r
- if (r3 == 8) {\r
- if ((!(*pd & (~oldmask))) && d) goto do_it;\r
- } else if (r3 > 8) {\r
- if (d) goto do_it;\r
- } else {\r
- goto do_it;\r
- }\r
-\r
- return;\r
-do_it:\r
- *pd = d | (*pd & oldmask);\r
-}\r
-\r
-\r
-static void decode_write16(u32 a, u16 d, int r3)\r
-{\r
- u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
-\r
- //if ((a & 0x3ffff) < 0x28000) return;\r
-\r
- r3 &= 0x18;\r
- d &= 0x0f0f;\r
- d |= d >> 4;\r
-\r
- if (r3 == 8) {\r
- u8 dold = *pd;\r
- if (!(dold & 0xf0)) dold |= d & 0xf0;\r
- if (!(dold & 0x0f)) dold |= d & 0x0f;\r
- *pd = dold;\r
- } else if (r3 > 8) {\r
- u8 dold = *pd;\r
- if (!(d & 0xf0)) d |= dold & 0xf0;\r
- if (!(d & 0x0f)) d |= dold & 0x0f;\r
- *pd = d;\r
- } else {\r
- *pd = d;\r
- }\r
-}\r
-#endif\r
-\r
-// -----------------------------------------------------------------\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-void PicoWriteS68k8(u32 a,u8 d);\r
-#else\r
-static void PicoWriteS68k8(u32 a,u8 d)\r
-{\r
- elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
-\r
- a&=0xffffff;\r
-\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- // prg RAM\r
- if (a < 0x80000) {\r
- u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
- if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
- return;\r
- }\r
-\r
- // regs\r
- if ((a&0xfffe00) == 0xff8000) {\r
- a &= 0x1ff;\r
- rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
- if (a >= 0x58 && a < 0x68)\r
- gfx_cd_write16(a&~1, (d<<8)|d);\r
- else s68k_reg_write8(a,d);\r
- return;\r
- }\r
-\r
- // word RAM (2M area)\r
- if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- int r3 = Pico_mcd->s68k_regs[3];\r
- wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
- if (r3 & 4) { // 1M decode mode?\r
- decode_write8(a, d, r3);\r
- } else {\r
- // allow access in any mode, like Gens does\r
- *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
- }\r
- return;\r
- }\r
-\r
- // word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
- // Wing Commander tries to write here in wrong mode\r
- int bank;\r
- if (d)\r
- wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
-// if (!(Pico_mcd->s68k_regs[3]&4))\r
-// dprintf("s68k_wram1M FIXME: wrong mode");\r
- bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
- return;\r
- }\r
-\r
- // PCM\r
- if ((a&0xff8000)==0xff0000) {\r
- a &= 0x7fff;\r
- if (a >= 0x2000)\r
- Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
- else if (a < 0x12)\r
- pcm_write(a>>1, d);\r
- return;\r
- }\r
-\r
- // bram\r
- if ((a&0xff0000)==0xfe0000) {\r
- Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
- SRam.changed = 1;\r
- return;\r
- }\r
-\r
- elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
-}\r
-#endif\r
-\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-void PicoWriteS68k16(u32 a,u16 d);\r
-#else\r
-static void PicoWriteS68k16(u32 a,u16 d)\r
-{\r
- elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
-\r
- a&=0xfffffe;\r
-\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- // prg RAM\r
- if (a < 0x80000) {\r
- wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
- if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
- *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
- return;\r
- }\r
-\r
- // regs\r
- if ((a&0xfffe00) == 0xff8000) {\r
- a &= 0x1fe;\r
- rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
- if (a >= 0x58 && a < 0x68)\r
- gfx_cd_write16(a, d);\r
- else {\r
- if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
- Pico_mcd->s68k_regs[0xf] = d;\r
- return;\r
- }\r
- s68k_reg_write8(a, d>>8);\r
- s68k_reg_write8(a+1,d&0xff);\r
- }\r
- return;\r
- }\r
-\r
- // word RAM (2M area)\r
- if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- int r3 = Pico_mcd->s68k_regs[3];\r
- wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
- if (r3 & 4) { // 1M decode mode?\r
- decode_write16(a, d, r3);\r
- } else {\r
- // allow access in any mode, like Gens does\r
- *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
- }\r
- return;\r
- }\r
-\r
- // word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
- int bank;\r
- if (d)\r
- wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
-// if (!(Pico_mcd->s68k_regs[3]&4))\r
-// dprintf("s68k_wram1M FIXME: wrong mode");\r
- bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
- return;\r
- }\r
-\r
- // PCM\r
- if ((a&0xff8000)==0xff0000) {\r
- a &= 0x7fff;\r
- if (a >= 0x2000)\r
- Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
- else if (a < 0x12)\r
- pcm_write(a>>1, d & 0xff);\r
- return;\r
- }\r
-\r
- // bram\r
- if ((a&0xff0000)==0xfe0000) {\r
- dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
- a = (a>>1)&0x1fff;\r
- Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
- Pico_mcd->bram[a++] = d >> 8;\r
- SRam.changed = 1;\r
- return;\r
- }\r
-\r
- elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
-}\r
-#endif\r
-\r
-\r
-#ifdef _ASM_CD_MEMORY_C\r
-void PicoWriteS68k32(u32 a,u32 d);\r
-#else\r
-static void PicoWriteS68k32(u32 a,u32 d)\r
-{\r
- elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
-\r
- a&=0xfffffe;\r
-\r
-#ifdef EMU_CORE_DEBUG\r
- lastwrite_cyc_d[lwp_cyc++&15] = d;\r
-#endif\r
-\r
- // prg RAM\r
- if (a < 0x80000) {\r
- if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
- u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
- }\r
- return;\r
- }\r
-\r
- // regs\r
- if ((a&0xfffe00) == 0xff8000) {\r
- a &= 0x1fe;\r
- rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
- if (a >= 0x58 && a < 0x68) {\r
- gfx_cd_write16(a, d>>16);\r
- gfx_cd_write16(a+2, d&0xffff);\r
- } else {\r
- if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
- s68k_reg_write8(a, d>>24);\r
- s68k_reg_write8(a+1,(d>>16)&0xff);\r
- s68k_reg_write8(a+2,(d>>8) &0xff);\r
- s68k_reg_write8(a+3, d &0xff);\r
- }\r
- return;\r
- }\r
-\r
- // word RAM (2M area)\r
- if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
- int r3 = Pico_mcd->s68k_regs[3];\r
- wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
- if (r3 & 4) { // 1M decode mode?\r
- decode_write16(a , d >> 16, r3);\r
- decode_write16(a+2, d , r3);\r
- } else {\r
- // allow access in any mode, like Gens does\r
- u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
- }\r
- return;\r
- }\r
-\r
- // word RAM (1M area)\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
- int bank;\r
- u16 *pm;\r
- if (d)\r
- wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
-// if (!(Pico_mcd->s68k_regs[3]&4))\r
-// dprintf("s68k_wram1M FIXME: wrong mode");\r
- bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
- return;\r
- }\r
-\r
- // PCM\r
- if ((a&0xff8000)==0xff0000) {\r
- a &= 0x7fff;\r
- if (a >= 0x2000) {\r
- a >>= 1;\r
- Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
- Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
- } else if (a < 0x12) {\r
- a >>= 1;\r
- pcm_write(a, (d>>16) & 0xff);\r
- pcm_write(a+1, d & 0xff);\r
- }\r
- return;\r
- }\r
-\r
- // bram\r
- if ((a&0xff0000)==0xfe0000) {\r
- dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
- a = (a>>1)&0x1fff;\r
- Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
- Pico_mcd->bram[a++] = d >> 24;\r
- Pico_mcd->bram[a++] = d;\r
- Pico_mcd->bram[a++] = d >> 8;\r
- SRam.changed = 1;\r
- return;\r
- }\r
-\r
- elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
-}\r
-#endif\r
-\r
-\r
-// -----------------------------------------------------------------\r
-\r
-\r
-#ifdef EMU_C68K\r
-static __inline int PicoMemBaseM68k(u32 pc)\r
-{\r
- if ((pc&0xe00000)==0xe00000)\r
- return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
-\r
- if (pc < 0x20000)\r
- return (int)Pico_mcd->bios; // Program Counter in BIOS\r
-\r
- if ((pc&0xfc0000)==0x200000)\r
- {\r
- if (!(Pico_mcd->s68k_regs[3]&4))\r
- return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
- if (pc < 0x220000) {\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
- }\r
- }\r
-\r
- // Error - Program Counter is invalid\r
- elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);\r
-\r
- return (int)Pico_mcd->bios;\r
-}\r
-\r
-\r
-static u32 PicoCheckPcM68k(u32 pc)\r
-{\r
- pc-=PicoCpuCM68k.membase; // Get real pc\r
- pc&=0xfffffe;\r
-\r
- PicoCpuCM68k.membase=PicoMemBaseM68k(pc);\r
-\r
- return PicoCpuCM68k.membase+pc;\r
-}\r
-\r
-\r
-static __inline int PicoMemBaseS68k(u32 pc)\r
-{\r
- if (pc < 0x80000) // PRG RAM\r
- return (int)Pico_mcd->prg_ram;\r
-\r
- if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
- return (int)Pico_mcd->word_ram2M - 0x080000;\r
-\r
- if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
- }\r
-\r
- // Error - Program Counter is invalid\r
- elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);\r
-\r
- return (int)Pico_mcd->prg_ram;\r
-}\r
-\r
-\r
-static u32 PicoCheckPcS68k(u32 pc)\r
-{\r
- pc-=PicoCpuCS68k.membase; // Get real pc\r
- pc&=0xfffffe;\r
-\r
- PicoCpuCS68k.membase=PicoMemBaseS68k(pc);\r
-\r
- return PicoCpuCS68k.membase+pc;\r
-}\r
-#endif\r
-\r
-#ifndef _ASM_CD_MEMORY_C\r
-void PicoMemResetCD(int r3)\r
-{\r
-#ifdef EMU_F68K\r
- // update fetchmap..\r
- int i;\r
- if (!(r3 & 4))\r
- {\r
- for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
- }\r
- else\r
- {\r
- for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
- for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
- }\r
-#endif\r
-}\r
-#endif\r
-\r
-#ifdef EMU_M68K\r
-static void m68k_mem_setup_cd(void);\r
-#endif\r
-\r
-PICO_INTERNAL void PicoMemSetupCD(void)\r
-{\r
- // additional handlers for common code\r
- PicoRead16Hook = OtherRead16End;\r
- PicoWrite8Hook = OtherWrite8End;\r
-\r
-#ifdef EMU_C68K\r
- // Setup m68k memory callbacks:\r
- PicoCpuCM68k.checkpc=PicoCheckPcM68k;\r
- PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;\r
- PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;\r
- PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;\r
- PicoCpuCM68k.write8 =PicoWriteM68k8;\r
- PicoCpuCM68k.write16=PicoWriteM68k16;\r
- PicoCpuCM68k.write32=PicoWriteM68k32;\r
- // s68k\r
- PicoCpuCS68k.checkpc=PicoCheckPcS68k;\r
- PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;\r
- PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;\r
- PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;\r
- PicoCpuCS68k.write8 =PicoWriteS68k8;\r
- PicoCpuCS68k.write16=PicoWriteS68k16;\r
- PicoCpuCS68k.write32=PicoWriteS68k32;\r
-#endif\r
-#ifdef EMU_F68K\r
- // m68k\r
- PicoCpuFM68k.read_byte =PicoReadM68k8;\r
- PicoCpuFM68k.read_word =PicoReadM68k16;\r
- PicoCpuFM68k.read_long =PicoReadM68k32;\r
- PicoCpuFM68k.write_byte=PicoWriteM68k8;\r
- PicoCpuFM68k.write_word=PicoWriteM68k16;\r
- PicoCpuFM68k.write_long=PicoWriteM68k32;\r
- // s68k\r
- PicoCpuFS68k.read_byte =PicoReadS68k8;\r
- PicoCpuFS68k.read_word =PicoReadS68k16;\r
- PicoCpuFS68k.read_long =PicoReadS68k32;\r
- PicoCpuFS68k.write_byte=PicoWriteS68k8;\r
- PicoCpuFS68k.write_word=PicoWriteS68k16;\r
- PicoCpuFS68k.write_long=PicoWriteS68k32;\r
-\r
- // setup FAME fetchmap\r
- {\r
- int i;\r
- // M68k\r
- // by default, point everything to fitst 64k of ROM (BIOS)\r
- for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
- // now real ROM (BIOS)\r
- for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
- // .. and RAM\r
- for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
- // S68k\r
- // PRG RAM is default\r
- for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
- // real PRG RAM\r
- for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
- // WORD RAM 2M area\r
- for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
- // PicoMemResetCD() will setup word ram for both\r
- }\r
-#endif\r
-#ifdef EMU_M68K\r
- m68k_mem_setup_cd();\r
-#endif\r
-\r
- // m68k_poll_addr = m68k_poll_cnt = 0;\r
- s68k_poll_adclk = s68k_poll_cnt = 0;\r
-}\r
-\r
-\r
-#ifdef EMU_M68K\r
-static unsigned int PicoReadCD8w (unsigned int a) {\r
- return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
-}\r
-static unsigned int PicoReadCD16w(unsigned int a) {\r
- return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
-}\r
-static unsigned int PicoReadCD32w(unsigned int a) {\r
- return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
-}\r
-static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
- if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
-}\r
-static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
- if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
-}\r
-static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
- if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
-}\r
-\r
-// these are allowed to access RAM\r
-static unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
-{\r
- a&=0xffffff;\r
- if(m68ki_cpu_p == &PicoCpuMS68k) {\r
- if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
- if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
- return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
- }\r
- elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
- } else {\r
- if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
- if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
- if((a&0xfc0000)==0x200000) { // word RAM\r
- if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
- return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
- else if (a < 0x220000) {\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
- }\r
- }\r
- elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
- }\r
- return 0;//(u8) lastread_d;\r
-}\r
-static unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
-{\r
- a&=0xffffff;\r
- if(m68ki_cpu_p == &PicoCpuMS68k) {\r
- if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
- if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
- return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- }\r
- elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
- } else {\r
- if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
- if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
- if((a&0xfc0000)==0x200000) { // word RAM\r
- if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
- return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- else if (a < 0x220000) {\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- }\r
- }\r
- elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
- }\r
- return 0;\r
-}\r
-static unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
-{\r
- u16 *pm;\r
- a&=0xffffff;\r
- if(m68ki_cpu_p == &PicoCpuMS68k) {\r
- if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
- if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
- { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- return (pm[0]<<16)|pm[1];\r
- }\r
- elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
- } else {\r
- if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
- if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
- if((a&0xfc0000)==0x200000) { // word RAM\r
- if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
- { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
- else if (a < 0x220000) {\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- return (pm[0]<<16)|pm[1];\r
- }\r
- }\r
- elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
- }\r
- return 0;\r
-}\r
-\r
-extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r
-extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r
-extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r
-extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r
-extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r
-extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r
-extern unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address);\r
-extern unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address);\r
-extern unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address);\r
-\r
-static void m68k_mem_setup_cd(void)\r
-{\r
- pm68k_read_memory_8 = PicoReadCD8w;\r
- pm68k_read_memory_16 = PicoReadCD16w;\r
- pm68k_read_memory_32 = PicoReadCD32w;\r
- pm68k_write_memory_8 = PicoWriteCD8w;\r
- pm68k_write_memory_16 = PicoWriteCD16w;\r
- pm68k_write_memory_32 = PicoWriteCD32w;\r
- pm68k_read_memory_pcr_8 = m68k_read_pcrelative_CD8;\r
- pm68k_read_memory_pcr_16 = m68k_read_pcrelative_CD16;\r
- pm68k_read_memory_pcr_32 = m68k_read_pcrelative_CD32;\r
-}\r
-#endif // EMU_M68K\r
-\r
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