\r
\r
#include <string.h>\r
-#include "sound.h"\r
#include "ym2612.h"\r
#include "sn76496.h"\r
\r
-#ifndef __GNUC__\r
-#pragma warning (disable:4244)\r
-#endif\r
-\r
#if defined(_USE_MZ80)\r
#include "../../cpu/mz80/mz80.h"\r
#elif defined(_USE_DRZ80)\r
#include "../../cpu/DrZ80/drz80.h"\r
+#elif defined(_USE_CZ80)\r
+#include "../../cpu/cz80/cz80.h"\r
#endif\r
\r
#include "../PicoInt.h"\r
// master int buffer to mix to\r
static int PsndBuffer[2*44100/50];\r
\r
-//int z80CycleAim = 0;\r
-\r
// dac\r
-short *dac_out;\r
-unsigned short dac_info[312]; // pppppppp ppppllll, p - pos in buff, l - length to write for this sample\r
+static unsigned short dac_info[312]; // pppppppp ppppllll, p - pos in buff, l - length to write for this sample\r
\r
// for Pico\r
int PsndRate=0;\r
extern int *sn76496_regs;\r
\r
\r
-static void dac_recalculate()\r
+static void dac_recalculate(void)\r
{\r
int i, dac_cnt, pos, len, lines = Pico.m.pal ? 312 : 262, mid = Pico.m.pal ? 68 : 93;\r
\r
}\r
\r
\r
-void sound_reset()\r
+PICO_INTERNAL void sound_reset(void)\r
{\r
- extern int z80stopCycle;\r
void *ym2612_regs;\r
\r
// also clear the internal registers+addr line\r
ym2612_regs = YM2612GetRegs();\r
memset(ym2612_regs, 0, 0x200+4);\r
- z80stopCycle = 0;\r
+ z80startCycle = z80stopCycle = 0;\r
\r
sound_rerate(0);\r
}\r
// to be called after changing sound rate or chips\r
void sound_rerate(int preserve_state)\r
{\r
- unsigned int state[28];\r
+ void *state = NULL;\r
int target_fps = Pico.m.pal ? 50 : 60;\r
\r
// not all rates are supported in MCD mode due to mp3 decoder limitations\r
}\r
\r
if (preserve_state) {\r
+ state = malloc(0x200);\r
+ if (state == NULL) return;\r
+ memcpy(state, YM2612GetRegs(), 0x200);\r
if ((PicoMCD & 1) && Pico_mcd->m.audio_track)\r
Pico_mcd->m.audio_offset = mp3_get_offset();\r
}\r
YM2612Init(Pico.m.pal ? OSC_PAL/7 : OSC_NTSC/7, PsndRate);\r
if (preserve_state) {\r
// feed it back it's own registers, just like after loading state\r
+ memcpy(YM2612GetRegs(), state, 0x200);\r
YM2612PicoStateLoad();\r
if ((PicoMCD & 1) && Pico_mcd->m.audio_track)\r
mp3_start_play(Pico_mcd->TOC.Tracks[Pico_mcd->m.audio_track].F, Pico_mcd->m.audio_offset);\r
SN76496_init(Pico.m.pal ? OSC_PAL/15 : OSC_NTSC/15, PsndRate);\r
if (preserve_state) memcpy(sn76496_regs, state, 28*4); // restore old state\r
\r
+ if (state)\r
+ free(state);\r
+\r
// calculate PsndLen\r
PsndLen=PsndRate / target_fps;\r
PsndLen_exc_add=((PsndRate - PsndLen*target_fps)<<16) / target_fps;\r
\r
\r
// This is called once per raster (aka line), but not necessarily for every line\r
-void sound_timers_and_dac(int raster)\r
+PICO_INTERNAL void sound_timers_and_dac(int raster)\r
{\r
int pos, len;\r
int do_dac = PsndOut && (PicoOpt&1) && *ym2612_dacen;\r
}\r
\r
\r
-void sound_clear(void)\r
+PICO_INTERNAL void sound_clear(void)\r
{\r
int len = PsndLen;\r
if (PsndLen_exc_add) len++;\r
}\r
\r
\r
-int sound_render(int offset, int length)\r
+PICO_INTERNAL int sound_render(int offset, int length)\r
{\r
+ int buf32_updated = 0;\r
int *buf32 = PsndBuffer+offset;\r
int stereo = (PicoOpt & 8) >> 3;\r
// emulating CD && PCM option enabled && PCM chip on && have enabled channels\r
SN76496Update(PsndOut+offset, length, stereo);\r
\r
// Add in the stereo FM buffer\r
- if (PicoOpt & 1)\r
- YM2612UpdateOne(buf32, length, stereo, 1);\r
+ if (PicoOpt & 1) {\r
+ buf32_updated = YM2612UpdateOne(buf32, length, stereo, 1);\r
+ } else\r
+ memset32(buf32, 0, length<<stereo);\r
+\r
+//printf("active_chs: %02x\n", buf32_updated);\r
\r
// CD: PCM sound\r
- if (do_pcm)\r
+ if (do_pcm) {\r
pcm_update(buf32, length, stereo);\r
+ //buf32_updated = 1;\r
+ }\r
\r
// CD: CDDA audio\r
-// if ((PicoMCD & 1) && (PicoOpt & 0x800))\r
-// mp3_update(PsndBuffer+offset, length, stereo);\r
+ // CD mode, cdda enabled, not data track, CDC is reading\r
+ if ((PicoMCD & 1) && (PicoOpt & 0x800) && !(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1))\r
+ mp3_update(buf32, length, stereo);\r
\r
// convert + limit to normal 16bit output\r
if (stereo)\r
\r
static unsigned char DrZ80_in(unsigned short p)\r
{\r
+ elprintf(EL_ANOMALY, "Z80 port %04x read", p);\r
return 0xff;\r
}\r
\r
static void DrZ80_out(unsigned short p,unsigned char d)\r
{\r
+ elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);\r
}\r
\r
static void DrZ80_irq_callback()\r
{\r
drZ80.Z80_IRQ = 0; // lower irq when accepted\r
}\r
-\r
#endif\r
\r
// z80 functionality wrappers\r
-void z80_init()\r
+PICO_INTERNAL void z80_init(void)\r
{\r
#if defined(_USE_MZ80)\r
struct mz80context z80;\r
mz80SetContext(&z80);\r
\r
#elif defined(_USE_DRZ80)\r
-\r
memset(&drZ80, 0, sizeof(struct DrZ80));\r
drZ80.z80_rebasePC=DrZ80_rebasePC;\r
drZ80.z80_rebaseSP=DrZ80_rebaseSP;\r
drZ80.z80_in =DrZ80_in;\r
drZ80.z80_out =DrZ80_out;\r
drZ80.z80_irq_callback=DrZ80_irq_callback;\r
+\r
+#elif defined(_USE_CZ80)\r
+ memset(&CZ80, 0, sizeof(CZ80));\r
+ Cz80_Init(&CZ80);\r
+ Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r
+ Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram - 0x2000); // mirror\r
+ Cz80_Set_ReadB(&CZ80, (UINT8 (*)(UINT32 address))z80_read);\r
+ Cz80_Set_WriteB(&CZ80, z80_write);\r
#endif\r
}\r
\r
-void z80_reset()\r
+PICO_INTERNAL void z80_reset(void)\r
{\r
#if defined(_USE_MZ80)\r
mz80reset();\r
drZ80.Z80IM = 0; // 1?\r
drZ80.Z80PC = drZ80.z80_rebasePC(0);\r
drZ80.Z80SP = drZ80.z80_rebaseSP(0x2000); // 0xf000 ?\r
+#elif defined(_USE_CZ80)\r
+ Cz80_Reset(&CZ80);\r
#endif\r
Pico.m.z80_fakeval = 0; // for faking when Z80 is disabled\r
}\r
\r
-void z80_resetCycles()\r
+PICO_INTERNAL void z80_resetCycles(void)\r
{\r
#if defined(_USE_MZ80)\r
mz80GetElapsedTicks(1);\r
#endif\r
}\r
\r
-void z80_int()\r
+PICO_INTERNAL void z80_int(void)\r
{\r
#if defined(_USE_MZ80)\r
mz80int(0);\r
#elif defined(_USE_DRZ80)\r
drZ80.z80irqvector = 0xFF; // default IRQ vector RST opcode\r
drZ80.Z80_IRQ = 1;\r
+#elif defined(_USE_CZ80)\r
+ Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE);\r
#endif\r
}\r
\r
// returns number of cycles actually executed\r
-int z80_run(int cycles)\r
+PICO_INTERNAL int z80_run(int cycles)\r
{\r
#if defined(_USE_MZ80)\r
int ticks_pre = mz80GetElapsedTicks(0);\r
return mz80GetElapsedTicks(0) - ticks_pre;\r
#elif defined(_USE_DRZ80)\r
return cycles - DrZ80Run(&drZ80, cycles);\r
+#elif defined(_USE_CZ80)\r
+ return Cz80_Exec(&CZ80, cycles);\r
#else\r
return cycles;\r
#endif\r
}\r
\r
-void z80_pack(unsigned char *data)\r
+PICO_INTERNAL void z80_pack(unsigned char *data)\r
{\r
#if defined(_USE_MZ80)\r
struct mz80context mz80;\r
drZ80.Z80PC = drZ80.z80_rebasePC(drZ80.Z80PC-drZ80.Z80PC_BASE);\r
drZ80.Z80SP = drZ80.z80_rebaseSP(drZ80.Z80SP-drZ80.Z80SP_BASE);\r
memcpy(data+4, &drZ80, 0x54);\r
+#elif defined(_USE_CZ80)\r
+ *(int *)data = 0x00007a43; // "Cz"\r
+ memcpy(data+4, &CZ80, (INT32)&CZ80.BasePC - (INT32)&CZ80);\r
+ printf("size: %i (%x)\n", (INT32)&CZ80.BasePC - (INT32)&CZ80, (INT32)&CZ80.BasePC - (INT32)&CZ80); // FIXME rm\r
#endif\r
}\r
\r
-void z80_unpack(unsigned char *data)\r
+PICO_INTERNAL void z80_unpack(unsigned char *data)\r
{\r
#if defined(_USE_MZ80)\r
- if(*(int *)data == 0x00005A6D) { // "mZ" save?\r
+ if (*(int *)data == 0x00005A6D) { // "mZ" save?\r
struct mz80context mz80;\r
mz80GetContext(&mz80);\r
memcpy(&mz80.z80clockticks, data+4, sizeof(mz80)-5*4);\r
z80_int();\r
}\r
#elif defined(_USE_DRZ80)\r
- if(*(int *)data == 0x015A7244) { // "DrZ" v1 save?\r
+ if (*(int *)data == 0x015A7244) { // "DrZ" v1 save?\r
memcpy(&drZ80, data+4, 0x54);\r
// update bases\r
drZ80.Z80PC = drZ80.z80_rebasePC(drZ80.Z80PC-drZ80.Z80PC_BASE);\r
drZ80.Z80IM = 1;\r
z80_int(); // try to goto int handler, maybe we won't execute trash there?\r
}\r
+#elif defined(_USE_CZ80)\r
+ if (*(int *)data == 0x00007a43) // "Cz" save?\r
+ memcpy(&CZ80, data+4, (INT32)&CZ80.BasePC - (INT32)&CZ80);\r
+ else {\r
+ z80_reset();\r
+ z80_int();\r
+ }\r
#endif\r
}\r
\r
-void z80_exit()\r
+PICO_INTERNAL void z80_exit(void)\r
{\r
#if defined(_USE_MZ80)\r
mz80shutdown();\r
#endif\r
}\r
\r
-#if defined(__DEBUG_PRINT) || defined(WIN32)\r
-void z80_debug(char *dstr)\r
+#if 1 // defined(__DEBUG_PRINT) || defined(__GP2X__) || defined(__GIZ__)\r
+PICO_INTERNAL void z80_debug(char *dstr)\r
{\r
#if defined(_USE_DRZ80)\r
- sprintf(dstr, "%sZ80 state: PC: %04x SP: %04x\n", dstr, drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);\r
+ sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);\r
+#elif defined(_USE_CZ80)\r
+ sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", CZ80.PC - CZ80.BasePC, CZ80.SP.W);\r
#endif\r
}\r
#endif\r