#include <math.h>\r
\r
#include "ym2612.h"\r
-#include "mix.h"\r
\r
#ifndef EXTERNAL_YM2612\r
#include <stdlib.h>\r
// let it be 1 global to simplify things\r
-static YM2612 ym2612;\r
+YM2612 ym2612;\r
\r
#else\r
extern YM2612 *ym2612_940;\r
\r
#endif\r
\r
+void memset32(int *dest, int c, int count);\r
+\r
\r
#ifndef __GNUC__\r
#pragma warning (disable:4100) // unreferenced formal parameter\r
5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16,\r
/* FD=3 */\r
2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,\r
- 8 , 8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22\r
+ 8 ,8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22\r
};\r
\r
\r
}\r
\r
\r
-INLINE void FM_KEYON(FM_CH *CH , int s )\r
+INLINE void FM_KEYON(int c , int s )\r
{\r
- FM_SLOT *SLOT = &CH->SLOT[s];\r
+ FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];\r
if( !SLOT->key )\r
{\r
SLOT->key = 1;\r
SLOT->phase = 0; /* restart Phase Generator */\r
SLOT->state = EG_ATT; /* phase -> Attack */\r
+ ym2612.slot_mask |= (1<<s) << (c*4);\r
}\r
}\r
\r
-INLINE void FM_KEYOFF(FM_CH *CH , int s )\r
+INLINE void FM_KEYOFF(int c , int s )\r
{\r
- FM_SLOT *SLOT = &CH->SLOT[s];\r
+ FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];\r
if( SLOT->key )\r
{\r
SLOT->key = 0;\r
UINT32 eg_timer;\r
UINT32 eg_timer_add;\r
UINT32 pack; // 4c: stereo, lastchan, disabled, lfo_enabled | pan_r, pan_l, ams[2] | AMmasks[4] | FB[4] | lfo_ampm[16]\r
- UINT32 algo; /* 50 */\r
+ UINT32 algo; /* 50: algo[3], was_update */\r
INT32 op1_out;\r
+#ifdef _MIPS_ARCH_ALLEGREX\r
+ UINT32 pad1[3+8];\r
+#endif\r
} chan_rend_context;\r
\r
\r
{\r
int out = 0;\r
\r
- if (ct->pack&0xf000) out = ((ct->op1_out>>16) + (ct->op1_out<<16>>16)) << ((ct->pack&0xf000)>>12); /* op1_out0 + op1_out1 */\r
+ if (ct->pack&0xf000) out = ((ct->op1_out>>16) + ((ct->op1_out<<16)>>16)) << ((ct->pack&0xf000)>>12); /* op1_out0 + op1_out1 */\r
ct->op1_out <<= 16;\r
ct->op1_out |= (unsigned short)op_calc1(ct->phase1, eg_out, out);\r
} else {\r
\r
switch( ct->CH->ALGO )\r
{\r
-#if 0\r
- case 0: smp = upd_algo0(ct); break;\r
- case 1: smp = upd_algo1(ct); break;\r
- case 2: smp = upd_algo2(ct); break;\r
- case 3: smp = upd_algo3(ct); break;\r
- case 4: smp = upd_algo4(ct); break;\r
- case 5: smp = upd_algo5(ct); break;\r
- case 6: smp = upd_algo6(ct); break;\r
- case 7: smp = upd_algo7(ct); break;\r
-#else\r
case 0:\r
{\r
/* M1---C1---MEM---M2---C2---OUT */\r
}\r
break;\r
}\r
-#endif\r
}\r
/* done calculating channel sample */\r
\r
} else {\r
buffer[scounter] += smp;\r
}\r
+ ct->algo = 8; // algo is only used in asm, here only bit3 is used\r
}\r
\r
/* update phase counters AFTER output calculations */\r
void chan_render_loop(chan_rend_context *ct, int *buffer, unsigned short length);\r
#endif\r
\r
+static chan_rend_context crct;\r
\r
-static void chan_render(int *buffer, int length, FM_CH *CH, UINT32 flags) // flags: stereo, lastchan, disabled, ?, pan_r, pan_l\r
+static void chan_render_prep(void)\r
{\r
- chan_rend_context ct;\r
+ crct.eg_timer_add = ym2612.OPN.eg_timer_add;\r
+ crct.lfo_inc = ym2612.OPN.lfo_inc;\r
+}\r
\r
- ct.CH = CH;\r
- ct.mem = CH->mem_value; /* one sample delay memory */\r
- ct.lfo_cnt = ym2612.OPN.lfo_cnt;\r
- ct.lfo_inc = ym2612.OPN.lfo_inc;\r
+static void chan_render_finish(void)\r
+{\r
+ ym2612.OPN.eg_cnt = crct.eg_cnt;\r
+ ym2612.OPN.eg_timer = crct.eg_timer;\r
+ g_lfo_ampm = crct.pack >> 16; // need_save\r
+ ym2612.OPN.lfo_cnt = crct.lfo_cnt;\r
+}\r
\r
- flags &= 0x37;\r
+static int chan_render(int *buffer, int length, int c, UINT32 flags) // flags: stereo, ?, disabled, ?, pan_r, pan_l\r
+{\r
+ crct.CH = &ym2612.CH[c];\r
+ crct.mem = crct.CH->mem_value; /* one sample delay memory */\r
+ crct.lfo_cnt = ym2612.OPN.lfo_cnt;\r
\r
- if (ct.lfo_inc) {\r
+ flags &= 0x35;\r
+\r
+ if (crct.lfo_inc) {\r
flags |= 8;\r
flags |= g_lfo_ampm << 16;\r
- flags |= CH->AMmasks << 8;\r
- if (CH->ams == 8) // no ams\r
- flags &= ~0xf00;\r
- else flags |= (CH->ams&3)<<6;\r
+ flags |= crct.CH->AMmasks << 8;\r
+ if (crct.CH->ams == 8) // no ams\r
+ flags &= ~0xf00;\r
+ else flags |= (crct.CH->ams&3)<<6;\r
}\r
- flags |= (CH->FB&0xf)<<12; /* feedback shift */\r
- ct.pack = flags;\r
+ flags |= (crct.CH->FB&0xf)<<12; /* feedback shift */\r
+ crct.pack = flags;\r
\r
- ct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */\r
- ct.eg_timer = ym2612.OPN.eg_timer;\r
- ct.eg_timer_add = ym2612.OPN.eg_timer_add;\r
+ crct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */\r
+ crct.eg_timer = ym2612.OPN.eg_timer;\r
\r
/* precalculate phase modulation incr */\r
- ct.phase1 = CH->SLOT[SLOT1].phase;\r
- ct.phase2 = CH->SLOT[SLOT2].phase;\r
- ct.phase3 = CH->SLOT[SLOT3].phase;\r
- ct.phase4 = CH->SLOT[SLOT4].phase;\r
+ crct.phase1 = crct.CH->SLOT[SLOT1].phase;\r
+ crct.phase2 = crct.CH->SLOT[SLOT2].phase;\r
+ crct.phase3 = crct.CH->SLOT[SLOT3].phase;\r
+ crct.phase4 = crct.CH->SLOT[SLOT4].phase;\r
\r
/* current output from EG circuit (without AM from LFO) */\r
- ct.vol_out1 = CH->SLOT[SLOT1].tl + ((UINT32)CH->SLOT[SLOT1].volume);\r
- ct.vol_out2 = CH->SLOT[SLOT2].tl + ((UINT32)CH->SLOT[SLOT2].volume);\r
- ct.vol_out3 = CH->SLOT[SLOT3].tl + ((UINT32)CH->SLOT[SLOT3].volume);\r
- ct.vol_out4 = CH->SLOT[SLOT4].tl + ((UINT32)CH->SLOT[SLOT4].volume);\r
+ crct.vol_out1 = crct.CH->SLOT[SLOT1].tl + ((UINT32)crct.CH->SLOT[SLOT1].volume);\r
+ crct.vol_out2 = crct.CH->SLOT[SLOT2].tl + ((UINT32)crct.CH->SLOT[SLOT2].volume);\r
+ crct.vol_out3 = crct.CH->SLOT[SLOT3].tl + ((UINT32)crct.CH->SLOT[SLOT3].volume);\r
+ crct.vol_out4 = crct.CH->SLOT[SLOT4].tl + ((UINT32)crct.CH->SLOT[SLOT4].volume);\r
\r
- ct.op1_out = CH->op1_out;\r
- ct.algo = CH->ALGO & 7;\r
+ crct.op1_out = crct.CH->op1_out;\r
+ crct.algo = crct.CH->ALGO & 7;\r
\r
- if(CH->pms)\r
+ if(crct.CH->pms)\r
{\r
/* add support for 3 slot mode */\r
- UINT32 block_fnum = CH->block_fnum;\r
+ UINT32 block_fnum = crct.CH->block_fnum;\r
\r
UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8;\r
- INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + CH->pms + ((ct.pack>>16)&0xff) ];\r
+ INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + crct.CH->pms + ((crct.pack>>16)&0xff) ];\r
\r
if (lfo_fn_table_index_offset) /* LFO phase modulation active */\r
{\r
UINT32 fn;\r
int kc,fc;\r
\r
+ blk = block_fnum >> 11;\r
block_fnum = block_fnum*2 + lfo_fn_table_index_offset;\r
\r
- blk = (block_fnum&0x7000) >> 12;\r
fn = block_fnum & 0xfff;\r
\r
/* keyscale code */\r
/* phase increment counter */\r
fc = fn_table[fn]>>(7-blk);\r
\r
- ct.incr1 = ((fc+CH->SLOT[SLOT1].DT[kc])*CH->SLOT[SLOT1].mul) >> 1;\r
- ct.incr2 = ((fc+CH->SLOT[SLOT2].DT[kc])*CH->SLOT[SLOT2].mul) >> 1;\r
- ct.incr3 = ((fc+CH->SLOT[SLOT3].DT[kc])*CH->SLOT[SLOT3].mul) >> 1;\r
- ct.incr4 = ((fc+CH->SLOT[SLOT4].DT[kc])*CH->SLOT[SLOT4].mul) >> 1;\r
+ crct.incr1 = ((fc+crct.CH->SLOT[SLOT1].DT[kc])*crct.CH->SLOT[SLOT1].mul) >> 1;\r
+ crct.incr2 = ((fc+crct.CH->SLOT[SLOT2].DT[kc])*crct.CH->SLOT[SLOT2].mul) >> 1;\r
+ crct.incr3 = ((fc+crct.CH->SLOT[SLOT3].DT[kc])*crct.CH->SLOT[SLOT3].mul) >> 1;\r
+ crct.incr4 = ((fc+crct.CH->SLOT[SLOT4].DT[kc])*crct.CH->SLOT[SLOT4].mul) >> 1;\r
}\r
else /* LFO phase modulation = zero */\r
{\r
- ct.incr1 = CH->SLOT[SLOT1].Incr;\r
- ct.incr2 = CH->SLOT[SLOT2].Incr;\r
- ct.incr3 = CH->SLOT[SLOT3].Incr;\r
- ct.incr4 = CH->SLOT[SLOT4].Incr;\r
+ crct.incr1 = crct.CH->SLOT[SLOT1].Incr;\r
+ crct.incr2 = crct.CH->SLOT[SLOT2].Incr;\r
+ crct.incr3 = crct.CH->SLOT[SLOT3].Incr;\r
+ crct.incr4 = crct.CH->SLOT[SLOT4].Incr;\r
}\r
}\r
else /* no LFO phase modulation */\r
{\r
- ct.incr1 = CH->SLOT[SLOT1].Incr;\r
- ct.incr2 = CH->SLOT[SLOT2].Incr;\r
- ct.incr3 = CH->SLOT[SLOT3].Incr;\r
- ct.incr4 = CH->SLOT[SLOT4].Incr;\r
+ crct.incr1 = crct.CH->SLOT[SLOT1].Incr;\r
+ crct.incr2 = crct.CH->SLOT[SLOT2].Incr;\r
+ crct.incr3 = crct.CH->SLOT[SLOT3].Incr;\r
+ crct.incr4 = crct.CH->SLOT[SLOT4].Incr;\r
}\r
\r
- chan_render_loop(&ct, buffer, length);\r
+ chan_render_loop(&crct, buffer, length);\r
\r
- // write back persistent stuff:\r
- if (flags & 2) { /* last channel */\r
- ym2612.OPN.eg_cnt = ct.eg_cnt;\r
- ym2612.OPN.eg_timer = ct.eg_timer;\r
- g_lfo_ampm = ct.pack >> 16;\r
- ym2612.OPN.lfo_cnt = ct.lfo_cnt;\r
+ crct.CH->op1_out = crct.op1_out;\r
+ crct.CH->mem_value = crct.mem;\r
+ if (crct.CH->SLOT[SLOT1].state | crct.CH->SLOT[SLOT2].state | crct.CH->SLOT[SLOT3].state | crct.CH->SLOT[SLOT4].state)\r
+ {\r
+ crct.CH->SLOT[SLOT1].phase = crct.phase1;\r
+ crct.CH->SLOT[SLOT2].phase = crct.phase2;\r
+ crct.CH->SLOT[SLOT3].phase = crct.phase3;\r
+ crct.CH->SLOT[SLOT4].phase = crct.phase4;\r
}\r
+ else\r
+ ym2612.slot_mask &= ~(0xf << (c*4));\r
\r
- CH->op1_out = ct.op1_out;\r
- CH->SLOT[SLOT1].phase = ct.phase1;\r
- CH->SLOT[SLOT2].phase = ct.phase2;\r
- CH->SLOT[SLOT3].phase = ct.phase3;\r
- CH->SLOT[SLOT4].phase = ct.phase4;\r
- CH->mem_value = ct.mem;\r
+ return (crct.algo & 8) >> 3; // had output\r
}\r
\r
/* update phase increment and envelope generator */\r
INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT, int fc, int kc)\r
{\r
- int ksr;\r
+ int ksr, fdt;\r
\r
/* (frequency) phase increment counter */\r
- SLOT->Incr = ((fc+SLOT->DT[kc])*SLOT->mul) >> 1;\r
+ fdt = fc+SLOT->DT[kc];\r
+ /* detect overflow */\r
+// if (fdt < 0) fdt += fn_table[0x7ff*2] >> (7-blk-1);\r
+ if (fdt < 0) fdt += fn_table[0x7ff*2] >> 2;\r
+ SLOT->Incr = fdt*SLOT->mul >> 1;\r
\r
ksr = kc >> SLOT->KSR;\r
if( SLOT->ksr != ksr )\r
SLOT->ksr = ksr;\r
\r
/* calculate envelope generator rates */\r
- if ((SLOT->ar + SLOT->ksr) < 32+62)\r
+ if ((SLOT->ar + ksr) < 32+62)\r
{\r
- eg_sh = eg_rate_shift [SLOT->ar + SLOT->ksr ];\r
- eg_sel = eg_rate_select[SLOT->ar + SLOT->ksr ];\r
+ eg_sh = eg_rate_shift [SLOT->ar + ksr ];\r
+ eg_sel = eg_rate_select[SLOT->ar + ksr ];\r
}\r
else\r
{\r
\r
SLOT->eg_pack_ar = eg_inc_pack[eg_sel] | (eg_sh<<24);\r
\r
- eg_sh = eg_rate_shift [SLOT->d1r + SLOT->ksr];\r
- eg_sel = eg_rate_select[SLOT->d1r + SLOT->ksr];\r
+ eg_sh = eg_rate_shift [SLOT->d1r + ksr];\r
+ eg_sel = eg_rate_select[SLOT->d1r + ksr];\r
\r
SLOT->eg_pack_d1r = eg_inc_pack[eg_sel] | (eg_sh<<24);\r
\r
- eg_sh = eg_rate_shift [SLOT->d2r + SLOT->ksr];\r
- eg_sel = eg_rate_select[SLOT->d2r + SLOT->ksr];\r
+ eg_sh = eg_rate_shift [SLOT->d2r + ksr];\r
+ eg_sel = eg_rate_select[SLOT->d2r + ksr];\r
\r
SLOT->eg_pack_d2r = eg_inc_pack[eg_sel] | (eg_sh<<24);\r
\r
- eg_sh = eg_rate_shift [SLOT->rr + SLOT->ksr];\r
- eg_sel = eg_rate_select[SLOT->rr + SLOT->ksr];\r
+ eg_sh = eg_rate_shift [SLOT->rr + ksr];\r
+ eg_sel = eg_rate_select[SLOT->rr + ksr];\r
\r
SLOT->eg_pack_rr = eg_inc_pack[eg_sel] | (eg_sh<<24);\r
}\r
}\r
}\r
\r
+INLINE void refresh_fc_eg_chan_sl3(void)\r
+{\r
+ if( ym2612.CH[2].SLOT[SLOT1].Incr==-1)\r
+ {\r
+ refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1], ym2612.OPN.SL3.fc[1], ym2612.OPN.SL3.kcode[1] );\r
+ refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2], ym2612.OPN.SL3.fc[2], ym2612.OPN.SL3.kcode[2] );\r
+ refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3], ym2612.OPN.SL3.fc[0], ym2612.OPN.SL3.kcode[0] );\r
+ refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4], ym2612.CH[2].fc , ym2612.CH[2].kcode );\r
+ }\r
+}\r
+\r
/* initialize time tables */\r
static void init_timetables(const UINT8 *dttable)\r
{\r
}\r
\r
\r
-static void reset_channels(FM_CH *CH, int num)\r
+static void reset_channels(FM_CH *CH)\r
{\r
int c,s;\r
\r
ym2612.OPN.ST.TB = 0;\r
ym2612.OPN.ST.TBC = 0;\r
\r
- for( c = 0 ; c < num ; c++ )\r
+ for( c = 0 ; c < 6 ; c++ )\r
{\r
CH[c].fc = 0;\r
for(s = 0 ; s < 4 ; s++ )\r
CH[c].SLOT[s].state= EG_OFF;\r
CH[c].SLOT[s].volume = MAX_ATT_INDEX;\r
}\r
+ CH[c].mem_value = CH[c].op1_out = 0;\r
}\r
+ ym2612.slot_mask = 0;\r
}\r
\r
/* initialize generic tables */\r
\r
\r
/* CSM Key Controll */\r
+#if 0\r
INLINE void CSMKeyControll(FM_CH *CH)\r
{\r
/* this is wrong, atm */\r
FM_KEYON(CH,SLOT3);\r
FM_KEYON(CH,SLOT4);\r
}\r
+#endif\r
\r
\r
/* prescaler set (and make time tables) */\r
\r
ym2612.OPN.eg_timer_add = (1<<EG_SH) * ym2612.OPN.ST.freqbase;\r
\r
-\r
/* make time tables */\r
init_timetables( dt_tab );\r
\r
set_ar_ksr(CH,SLOT,v);\r
break;\r
\r
- case 0x60: /* bit7 = AM ENABLE, DR */\r
+ case 0x60: /* bit7 = AM ENABLE, DR | depends on ksr */\r
set_dr(SLOT,v);\r
if(v&0x80) CH->AMmasks |= 1<<OPN_SLOT(r);\r
else CH->AMmasks &= ~(1<<OPN_SLOT(r));\r
break;\r
\r
- case 0x70: /* SR */\r
+ case 0x70: /* SR | depends on ksr */\r
set_sr(SLOT,v);\r
break;\r
\r
- case 0x80: /* SL, RR */\r
+ case 0x80: /* SL, RR | depends on ksr */\r
set_sl_rr(SLOT,v);\r
break;\r
\r
\r
case 0xa0:\r
switch( OPN_SLOT(r) ){\r
- case 0: /* 0xa0-0xa2 : FNUM1 */\r
+ case 0: /* 0xa0-0xa2 : FNUM1 | depends on fn_h (below) */\r
{\r
- UINT32 fn = (((UINT32)( (ym2612.OPN.ST.fn_h)&7))<<8) + v;\r
- UINT8 blk = ym2612.OPN.ST.fn_h>>3;\r
+ UINT32 fn = (((UINT32)( (CH->fn_h)&7))<<8) + v;\r
+ UINT8 blk = CH->fn_h>>3;\r
/* keyscale code */\r
CH->kcode = (blk<<2) | opn_fktable[fn >> 7];\r
/* phase increment counter */\r
}\r
break;\r
case 1: /* 0xa4-0xa6 : FNUM2,BLK */\r
- ym2612.OPN.ST.fn_h = v&0x3f;\r
+ CH->fn_h = v&0x3f;\r
ret = 0;\r
break;\r
case 2: /* 0xa8-0xaa : 3CH FNUM1 */\r
ym2612.OPN.SL3.kcode[c]= (blk<<2) | opn_fktable[fn >> 7];\r
/* phase increment counter */\r
ym2612.OPN.SL3.fc[c] = fn_table[fn*2]>>(7-blk);\r
- ym2612.OPN.SL3.block_fnum[c] = fn;\r
+ ym2612.OPN.SL3.block_fnum[c] = (blk<<11) | fn;\r
ym2612.CH[2].SLOT[SLOT1].Incr=-1;\r
}\r
break;\r
/* YM2612 local section */\r
/*******************************************************************************/\r
\r
-int *ym2612_dacen;\r
-INT32 *ym2612_dacout;\r
-\r
-\r
/* Generate samples for YM2612 */\r
int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty)\r
{\r
int pan;\r
+ int active_chs = 0;\r
\r
// if !is_buf_empty, it means it has valid samples to mix with, else it may contain trash\r
if (is_buf_empty) memset32(buffer, 0, length<<stereo);\r
\r
+/*\r
+ {\r
+ int c, s;\r
+ ppp();\r
+ for (c = 0; c < 6; c++) {\r
+ int slr = 0, slm;\r
+ printf("%i: ", c);\r
+ for (s = 0; s < 4; s++) {\r
+ if (ym2612.CH[c].SLOT[s].state != EG_OFF) slr = 1;\r
+ printf(" %i", ym2612.CH[c].SLOT[s].state != EG_OFF);\r
+ }\r
+ slm = (ym2612.slot_mask&(0xf<<(c*4))) ? 1 : 0;\r
+ printf(" | %i", slm);\r
+ printf(" | %i\n", ym2612.CH[c].SLOT[SLOT1].Incr==-1);\r
+ if (slr != slm) exit(1);\r
+ }\r
+ }\r
+*/\r
/* refresh PG and EG */\r
refresh_fc_eg_chan( &ym2612.CH[0] );\r
refresh_fc_eg_chan( &ym2612.CH[1] );\r
if( (ym2612.OPN.ST.mode & 0xc0) )\r
- {\r
/* 3SLOT MODE */\r
- if( ym2612.CH[2].SLOT[SLOT1].Incr==-1)\r
- {\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1], ym2612.OPN.SL3.fc[1], ym2612.OPN.SL3.kcode[1] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2], ym2612.OPN.SL3.fc[2], ym2612.OPN.SL3.kcode[2] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3], ym2612.OPN.SL3.fc[0], ym2612.OPN.SL3.kcode[0] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4], ym2612.CH[2].fc , ym2612.CH[2].kcode );\r
- }\r
- } else refresh_fc_eg_chan( &ym2612.CH[2] );\r
+ refresh_fc_eg_chan_sl3();\r
+ else\r
+ refresh_fc_eg_chan( &ym2612.CH[2] );\r
refresh_fc_eg_chan( &ym2612.CH[3] );\r
refresh_fc_eg_chan( &ym2612.CH[4] );\r
refresh_fc_eg_chan( &ym2612.CH[5] );\r
if (stereo) stereo = 1;\r
\r
/* mix to 32bit dest */\r
- chan_render(buffer, length, &ym2612.CH[0], stereo|((pan&0x003)<<4)); // flags: stereo, lastchan, disabled, ?, pan_r, pan_l\r
- chan_render(buffer, length, &ym2612.CH[1], stereo|((pan&0x00c)<<2));\r
- chan_render(buffer, length, &ym2612.CH[2], stereo|((pan&0x030) ));\r
- chan_render(buffer, length, &ym2612.CH[3], stereo|((pan&0x0c0)>>2));\r
- chan_render(buffer, length, &ym2612.CH[4], stereo|((pan&0x300)>>4));\r
- chan_render(buffer, length, &ym2612.CH[5], stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)|2);\r
-\r
- return 1; // buffer updated\r
+ // flags: stereo, ?, disabled, ?, pan_r, pan_l\r
+ chan_render_prep();\r
+ if (ym2612.slot_mask & 0x00000f) active_chs |= chan_render(buffer, length, 0, stereo|((pan&0x003)<<4)) << 0;\r
+ if (ym2612.slot_mask & 0x0000f0) active_chs |= chan_render(buffer, length, 1, stereo|((pan&0x00c)<<2)) << 1;\r
+ if (ym2612.slot_mask & 0x000f00) active_chs |= chan_render(buffer, length, 2, stereo|((pan&0x030) )) << 2;\r
+ if (ym2612.slot_mask & 0x00f000) active_chs |= chan_render(buffer, length, 3, stereo|((pan&0x0c0)>>2)) << 3;\r
+ if (ym2612.slot_mask & 0x0f0000) active_chs |= chan_render(buffer, length, 4, stereo|((pan&0x300)>>4)) << 4;\r
+ if (ym2612.slot_mask & 0xf00000) active_chs |= chan_render(buffer, length, 5, stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)) << 5;\r
+ chan_render_finish();\r
+\r
+ return active_chs; // 1 if buffer updated\r
}\r
\r
\r
/* initialize YM2612 emulator */\r
void YM2612Init_(int clock, int rate)\r
{\r
- // notaz\r
- ym2612_dacen = &ym2612.dacen;\r
- ym2612_dacout = &ym2612.dacout;\r
-\r
- /* clear everything but the regs */\r
- memset(ym2612.CH, 0, sizeof(ym2612)-sizeof(ym2612.REGS)-4);\r
+ memset(&ym2612, 0, sizeof(ym2612));\r
init_tables();\r
\r
ym2612.OPN.ST.clock = clock;\r
ym2612.OPN.ST.rate = rate;\r
\r
+ OPNSetPres( 6*24 );\r
+\r
/* Extend handler */\r
YM2612ResetChip_();\r
}\r
{\r
int i;\r
\r
- OPNSetPres( 6*24 );\r
+ memset(ym2612.REGS, 0, sizeof(ym2612.REGS));\r
+\r
set_timers( 0x30 ); /* mode 0 , timer reset */\r
+ ym2612.REGS[0x27] = 0x30;\r
\r
ym2612.OPN.eg_timer = 0;\r
ym2612.OPN.eg_cnt = 0;\r
ym2612.OPN.ST.status = 0;\r
\r
- reset_channels( &ym2612.CH[0] , 6 );\r
+ reset_channels( &ym2612.CH[0] );\r
for(i = 0xb6 ; i >= 0xb4 ; i-- )\r
{\r
OPNWriteReg(i ,0xc0);\r
OPNWriteReg(i|0x100,0xc0);\r
+ ym2612.REGS[i ] = 0xc0;\r
+ ym2612.REGS[i|0x100] = 0xc0;\r
}\r
for(i = 0xb2 ; i >= 0x30 ; i-- )\r
{\r
for(i = 0x26 ; i >= 0x20 ; i-- ) OPNWriteReg(i,0);\r
/* DAC mode clear */\r
ym2612.dacen = 0;\r
+ ym2612.addr_A1 = 0;\r
}\r
\r
\r
}\r
\r
addr = ym2612.OPN.ST.address;\r
- ym2612.REGS[addr] = v;\r
\r
switch( addr & 0xf0 )\r
{\r
ym2612.OPN.lfo_inc = 0;\r
}\r
break;\r
+#if 0 // handled elsewhere\r
case 0x24: { // timer A High 8\r
int TAnew = (ym2612.OPN.ST.TA & 0x03)|(((int)v)<<2);\r
if(ym2612.OPN.ST.TA != TAnew) {\r
}\r
ret=0;\r
break;\r
+#endif\r
case 0x27: /* mode, timer control */\r
set_timers( v );\r
ret=0;\r
case 0x28: /* key on / off */\r
{\r
UINT8 c;\r
- FM_CH *CH;\r
\r
c = v & 0x03;\r
if( c == 3 ) { ret=0; break; }\r
if( v&0x04 ) c+=3;\r
- CH = &ym2612.CH[c];\r
- if(v&0x10) FM_KEYON(CH,SLOT1); else FM_KEYOFF(CH,SLOT1);\r
- if(v&0x20) FM_KEYON(CH,SLOT2); else FM_KEYOFF(CH,SLOT2);\r
- if(v&0x40) FM_KEYON(CH,SLOT3); else FM_KEYOFF(CH,SLOT3);\r
- if(v&0x80) FM_KEYON(CH,SLOT4); else FM_KEYOFF(CH,SLOT4);\r
+ if(v&0x10) FM_KEYON(c,SLOT1); else FM_KEYOFF(c,SLOT1);\r
+ if(v&0x20) FM_KEYON(c,SLOT2); else FM_KEYOFF(c,SLOT2);\r
+ if(v&0x40) FM_KEYON(c,SLOT3); else FM_KEYOFF(c,SLOT3);\r
+ if(v&0x80) FM_KEYON(c,SLOT4); else FM_KEYOFF(c,SLOT4);\r
break;\r
}\r
case 0x2a: /* DAC data (YM2612) */\r
}\r
\r
addr = ym2612.OPN.ST.address | 0x100;\r
- ym2612.REGS[addr] = v;\r
\r
ret = OPNWriteReg(addr, v);\r
break;\r
}\r
-/*\r
- if(ret) {\r
- extern int Scanline;\r
- dprintf("ymw [%i]", Scanline);\r
- }\r
-*/\r
+\r
return ret;\r
}\r
\r
+#if 0\r
UINT8 YM2612Read_(void)\r
{\r
return ym2612.OPN.ST.status;\r
}\r
\r
-\r
int YM2612PicoTick_(int n)\r
{\r
int ret = 0;\r
\r
return ret;\r
}\r
-\r
+#endif\r
\r
void YM2612PicoStateLoad_(void)\r
{\r
-#ifndef EXTERNAL_YM2612\r
- int i, old_A1 = ym2612.addr_A1;\r
+ reset_channels( &ym2612.CH[0] );\r
+ ym2612.slot_mask = 0xffffff;\r
+}\r
+\r
+/* rather stupid design because I wanted to fit in unused register "space" */\r
+typedef struct\r
+{\r
+ UINT32 state_phase;\r
+ INT16 volume;\r
+} ym_save_addon_slot;\r
+\r
+typedef struct\r
+{\r
+ UINT32 magic;\r
+ UINT8 address;\r
+ UINT8 status;\r
+ UINT8 addr_A1;\r
+ UINT8 unused;\r
+ int TAT;\r
+ int TBT;\r
+ UINT32 eg_cnt; // 10\r
+ UINT32 eg_timer;\r
+ UINT32 lfo_cnt;\r
+ UINT16 lfo_ampm;\r
+ UINT16 unused2;\r
+ UINT32 keyon_field; // 20\r
+ UINT32 kcode_fc_sl3_3;\r
+ UINT32 reserved[2];\r
+} ym_save_addon;\r
+\r
+typedef struct\r
+{\r
+ UINT16 block_fnum[6];\r
+ UINT16 block_fnum_sl3[3];\r
+ UINT16 reserved[7];\r
+} ym_save_addon2;\r
\r
- reset_channels( &ym2612.CH[0], 6 );\r
\r
- // feed all the registers and update internal state\r
- for(i = 0; i < 0x100; i++) {\r
- YM2612Write_(0, i);\r
- YM2612Write_(1, ym2612.REGS[i]);\r
+void YM2612PicoStateSave2(int tat, int tbt)\r
+{\r
+ ym_save_addon_slot ss;\r
+ ym_save_addon2 sa2;\r
+ ym_save_addon sa;\r
+ unsigned char *ptr;\r
+ int c, s;\r
+\r
+ memset(&sa, 0, sizeof(sa));\r
+ memset(&sa2, 0, sizeof(sa2));\r
+\r
+ // chans 1,2,3\r
+ ptr = &ym2612.REGS[0x0b8];\r
+ for (c = 0; c < 3; c++)\r
+ {\r
+ for (s = 0; s < 4; s++) {\r
+ ss.state_phase = (ym2612.CH[c].SLOT[s].state << 29) | (ym2612.CH[c].SLOT[s].phase >> 3);\r
+ ss.volume = ym2612.CH[c].SLOT[s].volume;\r
+ if (ym2612.CH[c].SLOT[s].key)\r
+ sa.keyon_field |= 1 << (c*4 + s);\r
+ memcpy(ptr, &ss, 6);\r
+ ptr += 6;\r
+ }\r
+ sa2.block_fnum[c] = ym2612.CH[c].block_fnum;\r
}\r
- for(i = 0; i < 0x100; i++) {\r
- YM2612Write_(2, i);\r
- YM2612Write_(3, ym2612.REGS[i|0x100]);\r
+ // chans 4,5,6\r
+ ptr = &ym2612.REGS[0x1b8];\r
+ for (; c < 6; c++)\r
+ {\r
+ for (s = 0; s < 4; s++) {\r
+ ss.state_phase = (ym2612.CH[c].SLOT[s].state << 29) | (ym2612.CH[c].SLOT[s].phase >> 3);\r
+ ss.volume = ym2612.CH[c].SLOT[s].volume;\r
+ if (ym2612.CH[c].SLOT[s].key)\r
+ sa.keyon_field |= 1 << (c*4 + s);\r
+ memcpy(ptr, &ss, 6);\r
+ ptr += 6;\r
+ }\r
+ sa2.block_fnum[c] = ym2612.CH[c].block_fnum;\r
+ }\r
+ for (c = 0; c < 3; c++)\r
+ {\r
+ sa2.block_fnum_sl3[c] = ym2612.OPN.SL3.block_fnum[c];\r
}\r
\r
- ym2612.addr_A1 = old_A1;\r
-#else\r
- reset_channels( &ym2612.CH[0], 6 );\r
-#endif\r
+ memcpy(&ym2612.REGS[0], &sa2, sizeof(sa2)); // 0x20 max\r
+\r
+ // other things\r
+ ptr = &ym2612.REGS[0x100];\r
+ sa.magic = 0x41534d59; // 'YMSA'\r
+ sa.address = ym2612.OPN.ST.address;\r
+ sa.status = ym2612.OPN.ST.status;\r
+ sa.addr_A1 = ym2612.addr_A1;\r
+ sa.TAT = tat;\r
+ sa.TBT = tbt;\r
+ sa.eg_cnt = ym2612.OPN.eg_cnt;\r
+ sa.eg_timer = ym2612.OPN.eg_timer;\r
+ sa.lfo_cnt = ym2612.OPN.lfo_cnt;\r
+ sa.lfo_ampm = g_lfo_ampm;\r
+ memcpy(ptr, &sa, sizeof(sa)); // 0x30 max\r
}\r
\r
+int YM2612PicoStateLoad2(int *tat, int *tbt)\r
+{\r
+ ym_save_addon_slot ss;\r
+ ym_save_addon2 sa2;\r
+ ym_save_addon sa;\r
+ unsigned char *ptr;\r
+ UINT32 fn;\r
+ UINT8 blk;\r
+ int c, s;\r
+\r
+ ptr = &ym2612.REGS[0x100];\r
+ memcpy(&sa, ptr, sizeof(sa)); // 0x30 max\r
+ if (sa.magic != 0x41534d59) return -1;\r
+\r
+ ptr = &ym2612.REGS[0];\r
+ memcpy(&sa2, ptr, sizeof(sa2));\r
+\r
+ ym2612.OPN.ST.address = sa.address;\r
+ ym2612.OPN.ST.status = sa.status;\r
+ ym2612.addr_A1 = sa.addr_A1;\r
+ ym2612.OPN.eg_cnt = sa.eg_cnt;\r
+ ym2612.OPN.eg_timer = sa.eg_timer;\r
+ ym2612.OPN.lfo_cnt = sa.lfo_cnt;\r
+ g_lfo_ampm = sa.lfo_ampm;\r
+ if (tat != NULL) *tat = sa.TAT;\r
+ if (tbt != NULL) *tbt = sa.TBT;\r
+\r
+ // chans 1,2,3\r
+ ptr = &ym2612.REGS[0x0b8];\r
+ for (c = 0; c < 3; c++)\r
+ {\r
+ for (s = 0; s < 4; s++) {\r
+ memcpy(&ss, ptr, 6);\r
+ ym2612.CH[c].SLOT[s].state = ss.state_phase >> 29;\r
+ ym2612.CH[c].SLOT[s].phase = ss.state_phase << 3;\r
+ ym2612.CH[c].SLOT[s].volume = ss.volume;\r
+ ym2612.CH[c].SLOT[s].key = (sa.keyon_field & (1 << (c*4 + s))) ? 1 : 0;\r
+ ym2612.CH[c].SLOT[s].ksr = (UINT8)-1;\r
+ ptr += 6;\r
+ }\r
+ ym2612.CH[c].SLOT[SLOT1].Incr=-1;\r
+ ym2612.CH[c].block_fnum = sa2.block_fnum[c];\r
+ fn = ym2612.CH[c].block_fnum & 0x7ff;\r
+ blk = ym2612.CH[c].block_fnum >> 11;\r
+ ym2612.CH[c].kcode= (blk<<2) | opn_fktable[fn >> 7];\r
+ ym2612.CH[c].fc = fn_table[fn*2]>>(7-blk);\r
+ }\r
+ // chans 4,5,6\r
+ ptr = &ym2612.REGS[0x1b8];\r
+ for (; c < 6; c++)\r
+ {\r
+ for (s = 0; s < 4; s++) {\r
+ memcpy(&ss, ptr, 6);\r
+ ym2612.CH[c].SLOT[s].state = ss.state_phase >> 29;\r
+ ym2612.CH[c].SLOT[s].phase = ss.state_phase << 3;\r
+ ym2612.CH[c].SLOT[s].volume = ss.volume;\r
+ ym2612.CH[c].SLOT[s].key = (sa.keyon_field & (1 << (c*4 + s))) ? 1 : 0;\r
+ ym2612.CH[c].SLOT[s].ksr = (UINT8)-1;\r
+ ptr += 6;\r
+ }\r
+ ym2612.CH[c].SLOT[SLOT1].Incr=-1;\r
+ ym2612.CH[c].block_fnum = sa2.block_fnum[c];\r
+ fn = ym2612.CH[c].block_fnum & 0x7ff;\r
+ blk = ym2612.CH[c].block_fnum >> 11;\r
+ ym2612.CH[c].kcode= (blk<<2) | opn_fktable[fn >> 7];\r
+ ym2612.CH[c].fc = fn_table[fn*2]>>(7-blk);\r
+ }\r
+ for (c = 0; c < 3; c++)\r
+ {\r
+ ym2612.OPN.SL3.block_fnum[c] = sa2.block_fnum_sl3[c];\r
+ fn = ym2612.OPN.SL3.block_fnum[c] & 0x7ff;\r
+ blk = ym2612.OPN.SL3.block_fnum[c] >> 11;\r
+ ym2612.OPN.SL3.kcode[c]= (blk<<2) | opn_fktable[fn >> 7];\r
+ ym2612.OPN.SL3.fc[c] = fn_table[fn*2]>>(7-blk);\r
+ }\r
+\r
+ return 0;\r
+}\r
\r
+#ifndef EXTERNAL_YM2612\r
void *YM2612GetRegs(void)\r
{\r
return ym2612.REGS;\r
}\r
+#endif\r
+\r
notaz.gp2x.de / picodrive.git / blobdiff