}\r
\r
\r
-INLINE void FM_KEYON(FM_CH *CH , int s )\r
+INLINE void FM_KEYON(int c , int s )\r
{\r
- FM_SLOT *SLOT = &CH->SLOT[s];\r
+ FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];\r
if( !SLOT->key )\r
{\r
SLOT->key = 1;\r
SLOT->phase = 0; /* restart Phase Generator */\r
SLOT->state = EG_ATT; /* phase -> Attack */\r
+ ym2612.slot_mask |= (1<<s) << (c*4);\r
}\r
}\r
\r
-INLINE void FM_KEYOFF(FM_CH *CH , int s )\r
+INLINE void FM_KEYOFF(int c , int s )\r
{\r
- FM_SLOT *SLOT = &CH->SLOT[s];\r
+ FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];\r
if( SLOT->key )\r
{\r
SLOT->key = 0;\r
UINT32 pack; // 4c: stereo, lastchan, disabled, lfo_enabled | pan_r, pan_l, ams[2] | AMmasks[4] | FB[4] | lfo_ampm[16]\r
UINT32 algo; /* 50: algo[3], was_update */\r
INT32 op1_out;\r
+#ifdef _MIPS_ARCH_ALLEGREX\r
+ UINT32 pad1[3+8];\r
+#endif\r
} chan_rend_context;\r
\r
\r
\r
switch( ct->CH->ALGO )\r
{\r
-#if 0\r
- case 0: smp = upd_algo0(ct); break;\r
- case 1: smp = upd_algo1(ct); break;\r
- case 2: smp = upd_algo2(ct); break;\r
- case 3: smp = upd_algo3(ct); break;\r
- case 4: smp = upd_algo4(ct); break;\r
- case 5: smp = upd_algo5(ct); break;\r
- case 6: smp = upd_algo6(ct); break;\r
- case 7: smp = upd_algo7(ct); break;\r
-#else\r
case 0:\r
{\r
/* M1---C1---MEM---M2---C2---OUT */\r
}\r
break;\r
}\r
-#endif\r
}\r
/* done calculating channel sample */\r
\r
void chan_render_loop(chan_rend_context *ct, int *buffer, unsigned short length);\r
#endif\r
\r
+static chan_rend_context __attribute__((aligned(64))) crct;\r
\r
-static int chan_render(int *buffer, int length, FM_CH *CH, UINT32 flags) // flags: stereo, lastchan, disabled, ?, pan_r, pan_l\r
+static int chan_render(int *buffer, int length, int c, UINT32 flags) // flags: stereo, ?, disabled, ?, pan_r, pan_l\r
{\r
- chan_rend_context ct;\r
-\r
- ct.CH = CH;\r
- ct.mem = CH->mem_value; /* one sample delay memory */\r
- ct.lfo_cnt = ym2612.OPN.lfo_cnt;\r
- ct.lfo_inc = ym2612.OPN.lfo_inc;\r
+ crct.CH = &ym2612.CH[c];\r
+ crct.mem = crct.CH->mem_value; /* one sample delay memory */\r
+ crct.lfo_cnt = ym2612.OPN.lfo_cnt;\r
+ crct.lfo_inc = ym2612.OPN.lfo_inc;\r
\r
- flags &= 0x37;\r
+ flags &= 0x35;\r
\r
- if (ct.lfo_inc) {\r
+ if (crct.lfo_inc) {\r
flags |= 8;\r
flags |= g_lfo_ampm << 16;\r
- flags |= CH->AMmasks << 8;\r
- if (CH->ams == 8) // no ams\r
- flags &= ~0xf00;\r
- else flags |= (CH->ams&3)<<6;\r
+ flags |= crct.CH->AMmasks << 8;\r
+ if (crct.CH->ams == 8) // no ams\r
+ flags &= ~0xf00;\r
+ else flags |= (crct.CH->ams&3)<<6;\r
}\r
- flags |= (CH->FB&0xf)<<12; /* feedback shift */\r
- ct.pack = flags;\r
+ flags |= (crct.CH->FB&0xf)<<12; /* feedback shift */\r
+ crct.pack = flags;\r
\r
- ct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */\r
- ct.eg_timer = ym2612.OPN.eg_timer;\r
- ct.eg_timer_add = ym2612.OPN.eg_timer_add;\r
+ crct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */\r
+ crct.eg_timer = ym2612.OPN.eg_timer;\r
+ crct.eg_timer_add = ym2612.OPN.eg_timer_add;\r
\r
/* precalculate phase modulation incr */\r
- ct.phase1 = CH->SLOT[SLOT1].phase;\r
- ct.phase2 = CH->SLOT[SLOT2].phase;\r
- ct.phase3 = CH->SLOT[SLOT3].phase;\r
- ct.phase4 = CH->SLOT[SLOT4].phase;\r
+ crct.phase1 = crct.CH->SLOT[SLOT1].phase;\r
+ crct.phase2 = crct.CH->SLOT[SLOT2].phase;\r
+ crct.phase3 = crct.CH->SLOT[SLOT3].phase;\r
+ crct.phase4 = crct.CH->SLOT[SLOT4].phase;\r
\r
/* current output from EG circuit (without AM from LFO) */\r
- ct.vol_out1 = CH->SLOT[SLOT1].tl + ((UINT32)CH->SLOT[SLOT1].volume);\r
- ct.vol_out2 = CH->SLOT[SLOT2].tl + ((UINT32)CH->SLOT[SLOT2].volume);\r
- ct.vol_out3 = CH->SLOT[SLOT3].tl + ((UINT32)CH->SLOT[SLOT3].volume);\r
- ct.vol_out4 = CH->SLOT[SLOT4].tl + ((UINT32)CH->SLOT[SLOT4].volume);\r
+ crct.vol_out1 = crct.CH->SLOT[SLOT1].tl + ((UINT32)crct.CH->SLOT[SLOT1].volume);\r
+ crct.vol_out2 = crct.CH->SLOT[SLOT2].tl + ((UINT32)crct.CH->SLOT[SLOT2].volume);\r
+ crct.vol_out3 = crct.CH->SLOT[SLOT3].tl + ((UINT32)crct.CH->SLOT[SLOT3].volume);\r
+ crct.vol_out4 = crct.CH->SLOT[SLOT4].tl + ((UINT32)crct.CH->SLOT[SLOT4].volume);\r
\r
- ct.op1_out = CH->op1_out;\r
- ct.algo = CH->ALGO & 7;\r
+ crct.op1_out = crct.CH->op1_out;\r
+ crct.algo = crct.CH->ALGO & 7;\r
\r
- if(CH->pms)\r
+ if(crct.CH->pms)\r
{\r
/* add support for 3 slot mode */\r
- UINT32 block_fnum = CH->block_fnum;\r
+ UINT32 block_fnum = crct.CH->block_fnum;\r
\r
UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8;\r
- INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + CH->pms + ((ct.pack>>16)&0xff) ];\r
+ INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + crct.CH->pms + ((crct.pack>>16)&0xff) ];\r
\r
if (lfo_fn_table_index_offset) /* LFO phase modulation active */\r
{\r
/* phase increment counter */\r
fc = fn_table[fn]>>(7-blk);\r
\r
- ct.incr1 = ((fc+CH->SLOT[SLOT1].DT[kc])*CH->SLOT[SLOT1].mul) >> 1;\r
- ct.incr2 = ((fc+CH->SLOT[SLOT2].DT[kc])*CH->SLOT[SLOT2].mul) >> 1;\r
- ct.incr3 = ((fc+CH->SLOT[SLOT3].DT[kc])*CH->SLOT[SLOT3].mul) >> 1;\r
- ct.incr4 = ((fc+CH->SLOT[SLOT4].DT[kc])*CH->SLOT[SLOT4].mul) >> 1;\r
+ crct.incr1 = ((fc+crct.CH->SLOT[SLOT1].DT[kc])*crct.CH->SLOT[SLOT1].mul) >> 1;\r
+ crct.incr2 = ((fc+crct.CH->SLOT[SLOT2].DT[kc])*crct.CH->SLOT[SLOT2].mul) >> 1;\r
+ crct.incr3 = ((fc+crct.CH->SLOT[SLOT3].DT[kc])*crct.CH->SLOT[SLOT3].mul) >> 1;\r
+ crct.incr4 = ((fc+crct.CH->SLOT[SLOT4].DT[kc])*crct.CH->SLOT[SLOT4].mul) >> 1;\r
}\r
else /* LFO phase modulation = zero */\r
{\r
- ct.incr1 = CH->SLOT[SLOT1].Incr;\r
- ct.incr2 = CH->SLOT[SLOT2].Incr;\r
- ct.incr3 = CH->SLOT[SLOT3].Incr;\r
- ct.incr4 = CH->SLOT[SLOT4].Incr;\r
+ crct.incr1 = crct.CH->SLOT[SLOT1].Incr;\r
+ crct.incr2 = crct.CH->SLOT[SLOT2].Incr;\r
+ crct.incr3 = crct.CH->SLOT[SLOT3].Incr;\r
+ crct.incr4 = crct.CH->SLOT[SLOT4].Incr;\r
}\r
}\r
else /* no LFO phase modulation */\r
{\r
- ct.incr1 = CH->SLOT[SLOT1].Incr;\r
- ct.incr2 = CH->SLOT[SLOT2].Incr;\r
- ct.incr3 = CH->SLOT[SLOT3].Incr;\r
- ct.incr4 = CH->SLOT[SLOT4].Incr;\r
+ crct.incr1 = crct.CH->SLOT[SLOT1].Incr;\r
+ crct.incr2 = crct.CH->SLOT[SLOT2].Incr;\r
+ crct.incr3 = crct.CH->SLOT[SLOT3].Incr;\r
+ crct.incr4 = crct.CH->SLOT[SLOT4].Incr;\r
}\r
\r
- chan_render_loop(&ct, buffer, length);\r
+ chan_render_loop(&crct, buffer, length);\r
\r
- // write back persistent stuff:\r
- if (flags & 2) { /* last channel */\r
- ym2612.OPN.eg_cnt = ct.eg_cnt;\r
- ym2612.OPN.eg_timer = ct.eg_timer;\r
- g_lfo_ampm = ct.pack >> 16;\r
- ym2612.OPN.lfo_cnt = ct.lfo_cnt;\r
+ crct.CH->op1_out = crct.op1_out;\r
+ crct.CH->mem_value = crct.mem;\r
+ if (crct.CH->SLOT[SLOT1].state | crct.CH->SLOT[SLOT2].state | crct.CH->SLOT[SLOT3].state | crct.CH->SLOT[SLOT4].state)\r
+ {\r
+ crct.CH->SLOT[SLOT1].phase = crct.phase1;\r
+ crct.CH->SLOT[SLOT2].phase = crct.phase2;\r
+ crct.CH->SLOT[SLOT3].phase = crct.phase3;\r
+ crct.CH->SLOT[SLOT4].phase = crct.phase4;\r
}\r
+ else\r
+ ym2612.slot_mask &= ~(0xf << (c*4));\r
\r
- CH->op1_out = ct.op1_out;\r
- CH->SLOT[SLOT1].phase = ct.phase1;\r
- CH->SLOT[SLOT2].phase = ct.phase2;\r
- CH->SLOT[SLOT3].phase = ct.phase3;\r
- CH->SLOT[SLOT4].phase = ct.phase4;\r
- CH->mem_value = ct.mem;\r
+ // if this the last call, write back persistent stuff:\r
+ if ((ym2612.slot_mask >> ((c+1)*4)) == 0)\r
+ {\r
+ ym2612.OPN.eg_cnt = crct.eg_cnt;\r
+ ym2612.OPN.eg_timer = crct.eg_timer;\r
+ g_lfo_ampm = crct.pack >> 16;\r
+ ym2612.OPN.lfo_cnt = crct.lfo_cnt;\r
+ }\r
\r
- return (ct.algo & 8) >> 3; // had output\r
+ return (crct.algo & 8) >> 3; // had output\r
}\r
\r
/* update phase increment and envelope generator */\r
}\r
\r
\r
-static void reset_channels(FM_CH *CH, int num)\r
+static void reset_channels(FM_CH *CH)\r
{\r
int c,s;\r
\r
ym2612.OPN.ST.TB = 0;\r
ym2612.OPN.ST.TBC = 0;\r
\r
- for( c = 0 ; c < num ; c++ )\r
+ for( c = 0 ; c < 6 ; c++ )\r
{\r
CH[c].fc = 0;\r
for(s = 0 ; s < 4 ; s++ )\r
CH[c].SLOT[s].volume = MAX_ATT_INDEX;\r
}\r
}\r
+ ym2612.slot_mask = 0;\r
}\r
\r
/* initialize generic tables */\r
\r
\r
/* CSM Key Controll */\r
+#if 0\r
INLINE void CSMKeyControll(FM_CH *CH)\r
{\r
/* this is wrong, atm */\r
FM_KEYON(CH,SLOT3);\r
FM_KEYON(CH,SLOT4);\r
}\r
+#endif\r
\r
\r
/* prescaler set (and make time tables) */\r
\r
int *ym2612_dacen;\r
INT32 *ym2612_dacout;\r
+FM_ST *ym2612_st;\r
\r
\r
/* Generate samples for YM2612 */\r
// if !is_buf_empty, it means it has valid samples to mix with, else it may contain trash\r
if (is_buf_empty) memset32(buffer, 0, length<<stereo);\r
\r
+/*\r
+ {\r
+ int c, s;\r
+ ppp();\r
+ for (c = 0; c < 6; c++) {\r
+ int slr = 0, slm;\r
+ printf("%i: ", c);\r
+ for (s = 0; s < 4; s++) {\r
+ if (ym2612.CH[c].SLOT[s].state != EG_OFF) slr = 1;\r
+ printf(" %i", ym2612.CH[c].SLOT[s].state != EG_OFF);\r
+ }\r
+ slm = (ym2612.slot_mask&(0xf<<(c*4))) ? 1 : 0;\r
+ printf(" | %i", slm);\r
+ printf(" | %i\n", ym2612.CH[c].SLOT[SLOT1].Incr==-1);\r
+ if (slr != slm) exit(1);\r
+ }\r
+ }\r
+*/\r
/* refresh PG and EG */\r
refresh_fc_eg_chan( &ym2612.CH[0] );\r
refresh_fc_eg_chan( &ym2612.CH[1] );\r
if (stereo) stereo = 1;\r
\r
/* mix to 32bit dest */\r
- // flags: stereo, lastchan, disabled, ?, pan_r, pan_l\r
- active_chs |= chan_render(buffer, length, &ym2612.CH[0], stereo|((pan&0x003)<<4)) << 0;\r
- active_chs |= chan_render(buffer, length, &ym2612.CH[1], stereo|((pan&0x00c)<<2)) << 1;\r
- active_chs |= chan_render(buffer, length, &ym2612.CH[2], stereo|((pan&0x030) )) << 2;\r
- active_chs |= chan_render(buffer, length, &ym2612.CH[3], stereo|((pan&0x0c0)>>2)) << 3;\r
- active_chs |= chan_render(buffer, length, &ym2612.CH[4], stereo|((pan&0x300)>>4)) << 4;\r
- active_chs |= chan_render(buffer, length, &ym2612.CH[5], stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)|2) << 5;\r
+ // flags: stereo, ?, disabled, ?, pan_r, pan_l\r
+ if (ym2612.slot_mask & 0x00000f) active_chs |= chan_render(buffer, length, 0, stereo|((pan&0x003)<<4)) << 0;\r
+ if (ym2612.slot_mask & 0x0000f0) active_chs |= chan_render(buffer, length, 1, stereo|((pan&0x00c)<<2)) << 1;\r
+ if (ym2612.slot_mask & 0x000f00) active_chs |= chan_render(buffer, length, 2, stereo|((pan&0x030) )) << 2;\r
+ if (ym2612.slot_mask & 0x00f000) active_chs |= chan_render(buffer, length, 3, stereo|((pan&0x0c0)>>2)) << 3;\r
+ if (ym2612.slot_mask & 0x0f0000) active_chs |= chan_render(buffer, length, 4, stereo|((pan&0x300)>>4)) << 4;\r
+ if (ym2612.slot_mask & 0xf00000) active_chs |= chan_render(buffer, length, 5, stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)) << 5;\r
\r
return active_chs; // 1 if buffer updated\r
}\r
// notaz\r
ym2612_dacen = &ym2612.dacen;\r
ym2612_dacout = &ym2612.dacout;\r
+ ym2612_st = &ym2612.OPN.ST;\r
\r
memset(&ym2612, 0, sizeof(ym2612));\r
init_tables();\r
ym2612.OPN.eg_cnt = 0;\r
ym2612.OPN.ST.status = 0;\r
\r
- reset_channels( &ym2612.CH[0] , 6 );\r
+ reset_channels( &ym2612.CH[0] );\r
for(i = 0xb6 ; i >= 0xb4 ; i-- )\r
{\r
OPNWriteReg(i ,0xc0);\r
case 0x28: /* key on / off */\r
{\r
UINT8 c;\r
- FM_CH *CH;\r
\r
c = v & 0x03;\r
if( c == 3 ) { ret=0; break; }\r
if( v&0x04 ) c+=3;\r
- CH = &ym2612.CH[c];\r
- if(v&0x10) FM_KEYON(CH,SLOT1); else FM_KEYOFF(CH,SLOT1);\r
- if(v&0x20) FM_KEYON(CH,SLOT2); else FM_KEYOFF(CH,SLOT2);\r
- if(v&0x40) FM_KEYON(CH,SLOT3); else FM_KEYOFF(CH,SLOT3);\r
- if(v&0x80) FM_KEYON(CH,SLOT4); else FM_KEYOFF(CH,SLOT4);\r
+ if(v&0x10) FM_KEYON(c,SLOT1); else FM_KEYOFF(c,SLOT1);\r
+ if(v&0x20) FM_KEYON(c,SLOT2); else FM_KEYOFF(c,SLOT2);\r
+ if(v&0x40) FM_KEYON(c,SLOT3); else FM_KEYOFF(c,SLOT3);\r
+ if(v&0x80) FM_KEYON(c,SLOT4); else FM_KEYOFF(c,SLOT4);\r
break;\r
}\r
case 0x2a: /* DAC data (YM2612) */\r
return ret;\r
}\r
\r
+#if 0\r
UINT8 YM2612Read_(void)\r
{\r
return ym2612.OPN.ST.status;\r
}\r
\r
-\r
int YM2612PicoTick_(int n)\r
{\r
int ret = 0;\r
\r
return ret;\r
}\r
-\r
+#endif\r
\r
void YM2612PicoStateLoad_(void)\r
{\r
#ifndef EXTERNAL_YM2612\r
int i, real_A1 = ym2612.addr_A1;\r
\r
- reset_channels( &ym2612.CH[0], 6 );\r
+ reset_channels( &ym2612.CH[0] );\r
\r
// feed all the registers and update internal state\r
for(i = 0; i < 0x100; i++) {\r
\r
ym2612.addr_A1 = real_A1;\r
#else\r
- reset_channels( &ym2612.CH[0], 6 );\r
+ reset_channels( &ym2612.CH[0] );\r
#endif\r
}\r
\r
-\r
#ifndef EXTERNAL_YM2612\r
void *YM2612GetRegs(void)\r
{\r
notaz.gp2x.de / picodrive.git / blobdiff