typedef struct\r
{\r
INT32 *DT; /* #0x00 detune :dt_tab[DT] */\r
- UINT8 ar; /* #0x04 attack rate */\r
+ UINT8 ar; /* #0x04 attack rate */\r
UINT8 d1r; /* #0x05 decay rate */\r
UINT8 d2r; /* #0x06 sustain rate */\r
- UINT8 rr; /* #0x07 release rate */\r
+ UINT8 rr; /* #0x07 release rate */\r
UINT32 mul; /* #0x08 multiple :ML_TABLE[ML] */\r
\r
/* Phase Generator */\r
- UINT32 phase; /* #0x0c phase counter */\r
- UINT32 Incr; /* #0x10 phase step */\r
+ UINT32 phase; /* #0x0c phase counter | need_save */\r
+ UINT32 Incr; /* #0x10 phase step | need_save */\r
\r
UINT8 KSR; /* #0x14 key scale rate :3-KSR */\r
UINT8 ksr; /* #0x15 key scale rate :kcode>>(3-KSR) */\r
UINT8 key; /* #0x16 0=last key was KEY OFF, 1=KEY ON */\r
\r
/* Envelope Generator */\r
- UINT8 state; /* #0x17 phase type: EG_OFF=0, EG_REL, EG_SUS, EG_DEC, EG_ATT */\r
- UINT16 tl; /* #0x18 total level: TL << 3 */\r
- INT16 volume; /* #0x1a envelope counter */\r
- UINT32 sl; /* #0x1c sustain level:sl_table[SL] */\r
+ UINT8 state; /* #0x17 phase type: EG_OFF=0, EG_REL, EG_SUS, EG_DEC, EG_ATT | need_save */\r
+ UINT16 tl; /* #0x18 total level: TL << 3 */\r
+ INT16 volume; /* #0x1a envelope counter | need_save */\r
+ UINT32 sl; /* #0x1c sustain level:sl_table[SL] */\r
\r
- UINT32 eg_pack_ar; /* #0x20 (attack state) */\r
+ UINT32 eg_pack_ar; /* #0x20 (attack state) */\r
UINT32 eg_pack_d1r; /* #0x24 (decay state) */\r
UINT32 eg_pack_d2r; /* #0x28 (sustain state) */\r
- UINT32 eg_pack_rr; /* #0x2c (release state) */\r
+ UINT32 eg_pack_rr; /* #0x2c (release state) */\r
} FM_SLOT;\r
\r
\r
FM_SLOT SLOT[4]; /* four SLOTs (operators) */\r
\r
UINT8 ALGO; /* algorithm */\r
- UINT8 FB; /* feedback shift */\r
+ UINT8 FB; /* feedback shift */\r
INT32 op1_out; /* op1 output for feedback */\r
\r
INT32 mem_value; /* delayed sample (MEM) value */\r
UINT8 ams; /* channel AMS */\r
\r
UINT8 kcode; /* key code: */\r
- UINT32 fc; /* fnum,blk:adjusted to sample rate */\r
+ UINT32 fc; /* fnum,blk:adjusted to sample rate */\r
UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r
\r
/* LFO */\r
{\r
int clock; /* master clock (Hz) */\r
int rate; /* sampling rate (Hz) */\r
- double freqbase; /* frequency base */\r
- UINT8 address; /* address register */\r
- UINT8 status; /* status flag */\r
+ double freqbase; /* 08 frequency base */\r
+ UINT8 address; /* 10 address register | need_save */\r
+ UINT8 status; /* 11 status flag | need_save */\r
UINT8 mode; /* mode CSM / 3SLOT */\r
UINT8 fn_h; /* freq latch */\r
int TA; /* timer a */\r
int TAC; /* timer a maxval */\r
- int TAT; /* timer a ticker */\r
+ int TAT; /* timer a ticker | need_save */\r
UINT8 TB; /* timer b */\r
+ UINT8 pad[3];\r
int TBC; /* timer b maxval */\r
- int TBT; /* timer b ticker */\r
+ int TBT; /* timer b ticker | need_save */\r
/* local time tables */\r
INT32 dt_tab[8][32];/* DeTune table */\r
} FM_ST;\r
FM_3SLOT SL3; /* 3 slot mode state */\r
UINT32 pan; /* fm channels output mask (bit 1 = enable) */\r
\r
- UINT32 eg_cnt; /* #0xb38 global envelope generator counter */\r
- UINT32 eg_timer; /* #0xb3c global envelope generator counter works at frequency = chipclock/64/3 */\r
- UINT32 eg_timer_add; /* #0xb40 step of eg_timer */\r
+ UINT32 eg_cnt; /* #0xb38 global envelope generator counter | need_save */\r
+ UINT32 eg_timer; /* #0xb3c global envelope generator counter works at frequency = chipclock/64/3 | need_save */\r
+ UINT32 eg_timer_add; /* #0xb40 step of eg_timer */\r
\r
/* LFO */\r
- UINT32 lfo_cnt;\r
+ UINT32 lfo_cnt; /* need_save */\r
UINT32 lfo_inc;\r
\r
UINT32 lfo_freq[8]; /* LFO FREQ table */\r
/* here's the virtual YM2612 */\r
typedef struct\r
{\r
- UINT8 REGS[0x200]; /* registers (for save states) */\r
- INT32 addr_A1; /* address line A1 */\r
+ UINT8 REGS[0x200]; /* registers (for save states) */\r
+ INT32 addr_A1; /* address line A1 | need_save */\r
\r
FM_CH CH[6]; /* channel state (0x168 bytes each)? */\r
\r
/* dac output (YM2612) */\r
- int dacen;\r
+ int dacen;\r
INT32 dacout;\r
\r
FM_OPN OPN; /* OPN state */\r
+\r
+ UINT32 slot_mask; /* active slot mask (performance hack) */\r
} YM2612;\r
#endif\r
\r
-\r
+#ifndef EXTERNAL_YM2612\r
+extern YM2612 ym2612;\r
+#endif\r
\r
void YM2612Init_(int baseclock, int rate);\r
void YM2612ResetChip_(void);\r
int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty);\r
\r
int YM2612Write_(unsigned int a, unsigned int v);\r
-unsigned char YM2612Read_(void);\r
+//unsigned char YM2612Read_(void);\r
\r
int YM2612PicoTick_(int n);\r
void YM2612PicoStateLoad_(void);\r
\r
void *YM2612GetRegs(void);\r
+void YM2612PicoStateSave2(int tat, int tbt);\r
+int YM2612PicoStateLoad2(int *tat, int *tbt);\r
\r
#ifndef __GP2X__\r
#define YM2612Init YM2612Init_\r
#define YM2612ResetChip YM2612ResetChip_\r
#define YM2612UpdateOne YM2612UpdateOne_\r
-#define YM2612Write YM2612Write_\r
-#define YM2612Read YM2612Read_\r
-#define YM2612PicoTick YM2612PicoTick_\r
#define YM2612PicoStateLoad YM2612PicoStateLoad_\r
#else\r
/* GP2X specific */\r
#define YM2612UpdateOne(buffer,length,stereo,is_buf_empty) \\r
(PicoOpt&0x200) ? YM2612UpdateOne_940(buffer, length, stereo, is_buf_empty) : \\r
YM2612UpdateOne_(buffer, length, stereo, is_buf_empty);\r
-#define YM2612Write(a,v) \\r
- (PicoOpt&0x200) ? YM2612Write_940(a, v) : YM2612Write_(a, v)\r
-#define YM2612Read() \\r
- (PicoOpt&0x200) ? YM2612Read_940() : YM2612Read_()\r
-#define YM2612PicoTick(n) \\r
- (PicoOpt&0x200) ? YM2612PicoTick_940(n) : YM2612PicoTick_(n)\r
#define YM2612PicoStateLoad() { \\r
if (PicoOpt&0x200) YM2612PicoStateLoad_940(); \\r
else YM2612PicoStateLoad_(); \\r
notaz.gp2x.de / picodrive.git / blobdiff