unsigned char irq; // [r7,#0x47] IRQ level\r
unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP)\r
unsigned int vector; // [r7,#0x4c] IRQ vector (temporary)\r
- unsigned int pad1[2];\r
+ unsigned int prev_pc;// [r7,#0x50] set to start address of currently executed opcode + 2 (if enabled in config.h)\r
+ unsigned int unused; // [r7,#0x54] Unused\r
int stopped; // [r7,#0x58] 1 == processor is in stopped state\r
int cycles; // [r7,#0x5c]\r
int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address)\r
void CycloneSetSr(struct Cyclone *pcy, unsigned int sr); // auto-swaps a7<->osp if detects supervisor change\r
unsigned int CycloneGetSr(struct Cyclone *pcy);\r
\r
+// genesis: if 1, switch to normal TAS handlers\r
+void CycloneSetRealTAS(int use_real);\r
+\r
#ifdef __cplusplus\r
} // End of extern "C"\r
#endif\r