r6 : Pointer to Opcode Jump table\r
r7 : Pointer to Cpu Context\r
r8 : Current Opcode\r
- r9 : Flags (NZCV) in highest four bits\r
- (r10 : Temporary source value or Memory Base)\r
+ r10 : Flags (NZCV) in highest four bits\r
(r11 : Temporary register)\r
\r
Flags are mapped onto ARM flags whenever possible, which speeds up the processing of opcode.\r
+r9 is not used intentionally, because AAPCS defines it as "platform register", so it's\r
+reserved in some systems.\r
\r
\r
Thanks to...\r
\r
What's New\r
----------\r
+v0.0099 notaz\r
+ * Cyclone no longer uses r9, because AAPCS defines it as "platform register",\r
+ so it's reserved in some systems.\r
+\r
v0.0088 notaz\r
- Reduced amount of code in opcode handlers by ~23% by doing the following:\r
- Removed duplicate opcode handlers\r