\r
#include "app.h"\r
\r
+int opend_op_changes_cycles, opend_check_interrupt, opend_check_trace;\r
+\r
static unsigned char OpData[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};\r
\r
-static unsigned short CPU_CALL OpRead16(unsigned int a)\r
+static unsigned short OpRead16(unsigned int a)\r
{\r
return (unsigned short)( (OpData[a&15]<<8) | OpData[(a+1)&15] );\r
}\r
if (last_op_count!=arm_op_count)\r
ot("\n");\r
pc_dirty = 1;\r
+ opend_op_changes_cycles = opend_check_interrupt = opend_check_trace = 0;\r
}\r
\r
-void OpEnd(int sea, int tea, int op_changes_cycles, int check_interrupt)\r
+void OpEnd(int sea, int tea)\r
{\r
int did_fetch=0;\r
+ opend_check_trace = opend_check_trace && EMULATE_TRACE;\r
#if MEMHANDLERS_CHANGE_CYCLES\r
if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
{\r
- if (op_changes_cycles)\r
+ if (opend_op_changes_cycles)\r
{\r
ot(" ldr r0,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
#endif\r
if (!did_fetch)\r
ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
+ if (opend_check_trace)\r
+ ot(" ldr r1,[r7,#0x44]\n");\r
ot(" subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);\r
- if (check_interrupt)\r
+ if (opend_check_trace)\r
+ {\r
+ ot(";@ CheckTrace:\n");\r
+ ot(" tst r1,#0x80\n");\r
+ ot(" bne CycloneDoTraceWithChecks\n");\r
+ ot(" cmp r5,#0\n");\r
+ }\r
+ if (opend_check_interrupt)\r
{\r
ot(" blt CycloneEnd\n");\r
ot(";@ CheckInterrupt:\n");\r
- ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");\r
+ if (!opend_check_trace)\r
+ ot(" ldr r1,[r7,#0x44]\n");\r
ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]\r
ot(" ldreq pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
ot(" cmp r0,#6 ;@ irq>6 ?\n");\r