psp gfx scaling/etc stuff

[picodrive.git] / cpu / Cyclone / OpAny.cpp

diff --git a/cpu/Cyclone/OpAny.cpp b/cpu/Cyclone/OpAny.cpp
index 8e12015..6ee08ec 100644 (file)
--- a/cpu/Cyclone/OpAny.cpp
+++ b/cpu/Cyclone/OpAny.cpp
@@ -1,9 +1,11 @@
 \r
 #include "app.h"\r
 \r
+int opend_op_changes_cycles, opend_check_interrupt, opend_check_trace;\r
+\r
 static unsigned char OpData[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};\r
 \r
-static unsigned short CPU_CALL OpRead16(unsigned int a)\r
+static unsigned short OpRead16(unsigned int a)\r
 {\r
   return (unsigned short)( (OpData[a&15]<<8) | OpData[(a+1)&15] );\r
 }\r
@@ -25,35 +27,97 @@ void OpUse(int op,int use)
   ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use);\r
 }\r
 \r
-void OpStart(int op, int sea, int tea)\r
+void OpStart(int op, int sea, int tea, int op_changes_cycles, int supervisor_check)\r
 {\r
+  int last_op_count=arm_op_count;\r
+\r
   Cycles=0;\r
   OpUse(op,op); // This opcode obviously uses this handler\r
   ot("Op%.4x%s\n", op, ms?"":":");\r
-#if (MEMHANDLERS_NEED_PREV_PC || MEMHANDLERS_NEED_CYCLES)\r
-  if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c)) {\r
+\r
+  if (supervisor_check)\r
+  {\r
+    // checks for supervisor bit, if not set, jumps to SuperEnd()\r
+    // also sets r11 to SR high value, SuperChange() uses this\r
+    ot("  ldr r11,[r7,#0x44] ;@ Get SR high\n");\r
+  }\r
+  if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
+  {\r
 #if MEMHANDLERS_NEED_PREV_PC\r
     ot("  str r4,[r7,#0x50] ;@ Save prev PC + 2\n");\r
 #endif\r
 #if MEMHANDLERS_NEED_CYCLES\r
     ot("  str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
 #endif\r
-    ot("\n");\r
   }\r
+  if (supervisor_check)\r
+  {\r
+    ot("  tst r11,#0x20 ;@ Check we are in supervisor mode\n");\r
+    ot("  beq WrongPrivilegeMode ;@ No\n");\r
+  }\r
+  if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c)) {\r
+#if MEMHANDLERS_CHANGE_CYCLES\r
+    if (op_changes_cycles)\r
+      ot("  mov r5,#0\n");\r
 #endif\r
+  }\r
+  if (last_op_count!=arm_op_count)\r
+    ot("\n");\r
   pc_dirty = 1;\r
+  opend_op_changes_cycles = opend_check_interrupt = opend_check_trace = 0;\r
 }\r
 \r
 void OpEnd(int sea, int tea)\r
 {\r
+  int did_fetch=0;\r
+  opend_check_trace = opend_check_trace && EMULATE_TRACE;\r
 #if MEMHANDLERS_CHANGE_CYCLES\r
   if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
-    ot("  ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
+  {\r
+    if (opend_op_changes_cycles)\r
+    {\r
+      ot("  ldr r0,[r7,#0x5c] ;@ Load Cycles\n");\r
+      ot("  ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
+      ot("  add r5,r0,r5\n");\r
+      did_fetch=1;\r
+    }\r
+    else\r
+    {\r
+      ot("  ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
+    }\r
+  }\r
 #endif\r
-  ot("  ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
+  if (!did_fetch)\r
+    ot("  ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
+  if (opend_check_trace)\r
+    ot("  ldr r1,[r7,#0x44]\n");\r
   ot("  subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);\r
-  ot("  ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
-  ot("  b CycloneEnd\n");\r
+  if (opend_check_trace)\r
+  {\r
+    ot(";@ CheckTrace:\n");\r
+    ot("  tst r1,#0x80\n");\r
+    ot("  bne CycloneDoTraceWithChecks\n");\r
+    ot("  cmp r5,#0\n");\r
+  }\r
+  if (opend_check_interrupt)\r
+  {\r
+    ot("  blt CycloneEnd\n");\r
+    ot(";@ CheckInterrupt:\n");\r
+    if (!opend_check_trace)\r
+      ot("  ldr r1,[r7,#0x44]\n");\r
+    ot("  movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as  ldrb r0,[r7,#0x47]\r
+    ot("  ldreq pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
+    ot("  cmp r0,#6 ;@ irq>6 ?\n");\r
+    ot("  andle r1,r1,#7 ;@ Get interrupt mask\n");\r
+    ot("  cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
+    ot("  ldrle pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
+    ot("  b CycloneDoInterruptGoBack\n");\r
+  }\r
+  else\r
+  {\r
+    ot("  ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
+    ot("  b CycloneEnd\n");\r
+  }\r
   ot("\n");\r
 }\r
 \r