--- /dev/null
+\r
+#include "app.h"\r
+\r
+#if USE_CHECKPC_CALLBACK\r
+static void CheckPc()\r
+{\r
+ ot(";@ Check Memory Base+pc (r4)\n");\r
+ ot(" add lr,pc,#4\n");\r
+ ot(" mov r0,r4\n");\r
+ ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ ot(" mov r4,r0\n");\r
+ ot("\n");\r
+}\r
+#endif\r
+\r
+// Push 32-bit value in r1 - trashes r0-r3,r12,lr\r
+void OpPush32()\r
+{\r
+ ot(";@ Push r1 onto stack\n");\r
+ ot(" ldr r0,[r7,#0x3c]\n");\r
+ ot(" sub r0,r0,#4 ;@ Predecrement A7\n");\r
+ ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
+ MemHandler(1,2);\r
+ ot("\n");\r
+}\r
+\r
+// Push SR - trashes r0-r3,r12,lr\r
+void OpPushSr(int high)\r
+{\r
+ ot(";@ Push SR:\n");\r
+ OpFlagsToReg(high);\r
+ ot(" ldr r0,[r7,#0x3c]\n");\r
+ ot(" sub r0,r0,#2 ;@ Predecrement A7\n");\r
+ ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
+ MemHandler(1,1);\r
+ ot("\n");\r
+}\r
+\r
+// Pop SR - trashes r0-r3\r
+static void PopSr(int high)\r
+{\r
+ ot(";@ Pop SR:\n");\r
+ ot(" ldr r0,[r7,#0x3c]\n");\r
+ ot(" add r1,r0,#2 ;@ Postincrement A7\n");\r
+ ot(" str r1,[r7,#0x3c] ;@ Save A7\n");\r
+ MemHandler(0,1);\r
+ ot("\n");\r
+ OpRegToFlags(high);\r
+}\r
+\r
+// Pop PC - assumes r10=Memory Base - trashes r0-r3\r
+static void PopPc()\r
+{\r
+ ot(";@ Pop PC:\n");\r
+ ot(" ldr r0,[r7,#0x3c]\n");\r
+ ot(" add r1,r0,#4 ;@ Postincrement A7\n");\r
+ ot(" str r1,[r7,#0x3c] ;@ Save A7\n");\r
+ MemHandler(0,2);\r
+ ot(" add r4,r0,r10 ;@ r4=Memory Base+PC\n");\r
+ ot("\n");\r
+ CheckPc();\r
+}\r
+\r
+int OpTrap(int op)\r
+{\r
+ int use=0;\r
+\r
+ use=op&~0xf;\r
+ if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
+\r
+ OpStart(op);\r
+ ot(" and r0,r8,#0xf ;@ Get trap number\n");\r
+ ot(" orr r0,r0,#0x20\n");\r
+ ot(" mov r0,r0,asl #2\n");\r
+ ot(" bl Exception\n");\r
+ ot("\n");\r
+\r
+ Cycles=38; OpEnd();\r
+\r
+ return 0;\r
+}\r
+\r
+// --------------------- Opcodes 0x4e50+ ---------------------\r
+int OpLink(int op)\r
+{\r
+ int use=0,reg;\r
+\r
+ use=op&~7;\r
+ reg=op&7;\r
+ if (reg==7) use=op;\r
+ if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
+\r
+ OpStart(op);\r
+\r
+ if(reg!=7) {\r
+ ot(";@ Get An\n");\r
+ EaCalc(10, 7, 8, 2, 1);\r
+ EaRead(10, 1, 8, 2, 7, 1);\r
+ }\r
+\r
+ ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
+ ot(" sub r0,r0,#4 ;@ A7-=4\n");\r
+ ot(" mov r11,r0\n");\r
+ if(reg==7) ot(" mov r1,r0\n");\r
+ ot("\n");\r
+ \r
+ ot(";@ Write An to Stack\n");\r
+ MemHandler(1,2);\r
+\r
+ ot(";@ Save to An\n");\r
+ if(reg!=7)\r
+ EaWrite(10,11, 8, 2, 7, 1);\r
+\r
+ ot(";@ Get offset:\n");\r
+ EaCalc(0,0,0x3c,1);\r
+ EaRead(0,0,0x3c,1,0);\r
+\r
+ ot(" add r11,r11,r0 ;@ Add offset to A7\n");\r
+ ot(" str r11,[r7,#0x3c]\n");\r
+ ot("\n");\r
+\r
+ Cycles=16;\r
+ OpEnd();\r
+ return 0;\r
+}\r
+\r
+// --------------------- Opcodes 0x4e58+ ---------------------\r
+int OpUnlk(int op)\r
+{\r
+ int use=0;\r
+\r
+ use=op&~7;\r
+ if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
+\r
+ OpStart(op);\r
+\r
+ ot(";@ Get An\n");\r
+ EaCalc(10, 7, 8, 2, 1);\r
+ EaRead(10, 0, 8, 2, 7, 1);\r
+\r
+ ot(" add r11,r0,#4 ;@ A7+=4\n");\r
+ ot("\n");\r
+ ot(";@ Pop An from stack:\n");\r
+ MemHandler(0,2);\r
+ ot("\n");\r
+ ot(" str r11,[r7,#0x3c] ;@ Save A7\n");\r
+ ot("\n");\r
+ ot(";@ An = value from stack:\n");\r
+ EaWrite(10, 0, 8, 2, 7, 1);\r
+ \r
+ Cycles=12;\r
+ OpEnd();\r
+ return 0;\r
+}\r
+\r
+// --------------------- Opcodes 0x4e70+ ---------------------\r
+int Op4E70(int op)\r
+{\r
+ int type=0;\r
+\r
+ type=op&7; // 01001110 01110ttt, reset/nop/stop/rte/rtd/rts/trapv/rtr\r
+\r
+ switch (type)\r
+ {\r
+ case 1: // nop\r
+ OpStart(op);\r
+ Cycles=4;\r
+ OpEnd();\r
+ return 0;\r
+\r
+ case 3: // rte\r
+ OpStart(op); Cycles=20;\r
+ SuperCheck(op);\r
+ PopSr(1);\r
+ ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ PopPc();\r
+ SuperChange(op);\r
+ CheckInterrupt(op);\r
+ OpEnd();\r
+ SuperEnd(op);\r
+ return 0;\r
+\r
+ case 5: // rts\r
+ OpStart(op); Cycles=16;\r
+ ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ PopPc();\r
+ OpEnd();\r
+ return 0;\r
+\r
+ case 6: // trapv\r
+ OpStart(op); Cycles=4;\r
+ ot(" tst r9,#0x10000000\n");\r
+ ot(" subne r5,r5,#%i\n",30);\r
+ ot(" movne r0,#0x1c ;@ TRAPV exception\n");\r
+ ot(" blne Exception\n");\r
+ OpEnd();\r
+ return 0;\r
+\r
+ case 7: // rtr\r
+ OpStart(op); Cycles=20;\r
+ PopSr(0);\r
+ ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ PopPc();\r
+ OpEnd();\r
+ return 0;\r
+\r
+ default:\r
+ return 1;\r
+ }\r
+}\r
+\r
+// --------------------- Opcodes 0x4e80+ ---------------------\r
+// Emit a Jsr/Jmp opcode, 01001110 1meeeeee\r
+int OpJsr(int op)\r
+{\r
+ int use=0;\r
+ int sea=0;\r
+\r
+ sea=op&0x003f;\r
+\r
+ // See if we can do this opcode:\r
+ if (EaCanRead(sea,-1)==0) return 1;\r
+\r
+ use=OpBase(op);\r
+ if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
+\r
+ OpStart(op);\r
+\r
+ ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot("\n");\r
+ EaCalc(0,0x003f,sea,0);\r
+\r
+ ot(";@ Jump - Get new PC from r0\n");\r
+ if (op&0x40)\r
+ {\r
+ // Jmp - Get new PC from r0\r
+ ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");\r
+ ot("\n");\r
+ }\r
+ else\r
+ {\r
+ ot(";@ Jsr - Push old PC first\n");\r
+ ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
+ ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");\r
+ ot(" mov r1,r1,lsl #8\n");\r
+ ot(" ldr r0,[r7,#0x3c]\n");\r
+ ot(" mov r1,r1,asr #8\n");\r
+ ot(";@ Push r1 onto stack\n");\r
+ ot(" sub r0,r0,#4 ;@ Predecrement A7\n");\r
+ ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
+ MemHandler(1,2);\r
+ ot("\n");\r
+ }\r
+\r
+#if USE_CHECKPC_CALLBACK\r
+ CheckPc();\r
+#endif\r
+\r
+ Cycles=(op&0x40) ? 4 : 12;\r
+ Cycles+=Ea_add_ns((op&0x40) ? g_jmp_cycle_table : g_jsr_cycle_table, sea);\r
+\r
+ OpEnd();\r
+\r
+ return 0;\r
+}\r
+\r
+// --------------------- Opcodes 0x50c8+ ---------------------\r
+\r
+// ARM version of 68000 condition codes:\r
+static char *Cond[16]=\r
+{\r
+ "", "", "hi","ls","cc","cs","ne","eq",\r
+ "vc","vs","pl","mi","ge","lt","gt","le"\r
+};\r
+\r
+// Emit a Dbra opcode, 0101cccc 11001nnn vv\r
+int OpDbra(int op)\r
+{\r
+ int use=0;\r
+ int cc=0;\r
+\r
+ use=op&~7; // Use same handler\r
+ cc=(op>>8)&15;\r
+ \r
+ if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
+ OpStart(op);\r
+\r
+ if (cc>=2)\r
+ {\r
+ ot(";@ Is the condition true?\n");\r
+ if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");\r
+ ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n");\r
+ ot(";@ If so, don't dbra\n");\r
+ ot(" b%s DbraTrue%.4x\n",Cond[cc],op);\r
+ ot("\n");\r
+ }\r
+\r
+ ot(";@ Decrement Dn.w\n");\r
+ ot(" and r1,r8,#0x0007\n");\r
+ ot(" mov r1,r1,lsl #2\n");\r
+ ot(" ldrsh r0,[r7,r1]\n");\r
+ ot(" sub r0,r0,#1\n");\r
+ ot(" strh r0,[r7,r1]\n");\r
+ ot("\n");\r
+\r
+ ot(";@ Check if Dn.w is -1\n");\r
+ ot(" cmps r0,#-1\n");\r
+ ot(" beq DbraMin1%.4x\n",op);\r
+ ot("\n");\r
+\r
+ ot(";@ Get Branch offset:\n");\r
+ ot(" ldrsh r0,[r4]\n");\r
+ ot(" add r4,r4,r0 ;@ r4 = New PC\n");\r
+ ot("\n");\r
+ Cycles=12-2;\r
+ OpEnd();\r
+ \r
+ ot(";@ Dn.w is -1:\n");\r
+ ot("DbraMin1%.4x%s\n", op, ms?"":":");\r
+ ot(" add r4,r4,#2 ;@ Skip branch offset\n");\r
+ ot("\n");\r
+ Cycles=12+2;\r
+ OpEnd();\r
+\r
+ ot(";@ condition true:\n");\r
+ ot("DbraTrue%.4x%s\n", op, ms?"":":");\r
+ ot(" add r4,r4,#2 ;@ Skip branch offset\n");\r
+ ot("\n");\r
+ Cycles=12;\r
+ OpEnd();\r
+\r
+ return 0;\r
+}\r
+\r
+// --------------------- Opcodes 0x6000+ ---------------------\r
+// Emit a Branch opcode 0110cccc nn (cccc=condition)\r
+int OpBranch(int op)\r
+{\r
+ int size=0,use=0;\r
+ int offset=0;\r
+ int cc=0;\r
+\r
+ offset=(char)(op&0xff);\r
+ cc=(op>>8)&15;\r
+\r
+ // Special offsets:\r
+ if (offset==0) size=1;\r
+ if (offset==-1) size=2;\r
+\r
+ if (size) use=op; // 16-bit or 32-bit\r
+ else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches\r
+\r
+ if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
+ OpStart(op);\r
+\r
+ ot(";@ Get Branch offset:\n");\r
+ if (size) \r
+ {\r
+ EaCalc(0,0,0x3c,size);\r
+ EaRead(0,0,0x3c,size,0);\r
+ }\r
+\r
+ // above code messes cycles\r
+ Cycles=10; // Assume branch taken\r
+\r
+ if (size==0) ot(" mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");\r
+\r
+ if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+\r
+ if (cc>=2)\r
+ {\r
+ ot(";@ Is the condition true?\n");\r
+ if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");\r
+ ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n");\r
+\r
+ if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");\r
+\r
+ ot(" b%s DontBranch%.4x\n",Cond[cc^1],op);\r
+\r
+ ot("\n");\r
+ }\r
+ else\r
+ {\r
+ if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");\r
+ }\r
+\r
+ ot(";@ Branch taken - Add on r0 to PC\n");\r
+\r
+ if (cc==1)\r
+ {\r
+ ot(";@ Bsr - remember old PC\n");\r
+ ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
+ ot(" mov r1,r1, lsl #8\n");\r
+ ot(" mov r1,r1, asr #8\n");\r
+ ot("\n");\r
+ if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);\r
+ ot(" ldr r2,[r7,#0x3c]\n");\r
+ ot(" add r4,r4,r0 ;@ r4 = New PC\n");\r
+ ot(";@ Push r1 onto stack\n");\r
+ ot(" sub r0,r2,#4 ;@ Predecrement A7\n");\r
+ ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
+ MemHandler(1,2);\r
+ ot("\n");\r
+ Cycles=18; // always 18\r
+ }\r
+ else\r
+ {\r
+ if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);\r
+ ot(" add r4,r4,r0 ;@ r4 = New PC\n");\r
+ ot("\n");\r
+ }\r
+\r
+#if USE_CHECKPC_CALLBACK\r
+ if (offset==0 || offset==-1)\r
+ {\r
+ ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");\r
+ CheckPc();\r
+ }\r
+#endif\r
+\r
+ OpEnd();\r
+\r
+ if (cc>=2)\r
+ {\r
+ ot("DontBranch%.4x%s\n", op, ms?"":":");\r
+ Cycles+=(size==1)? 2 : -2; // Branch not taken\r
+ OpEnd();\r
+ }\r
+\r
+ return 0;\r
+}\r
+\r