more accuracy fixes

[picodrive.git] / cpu / Cyclone / OpBranch.cpp

diff --git a/cpu/Cyclone/OpBranch.cpp b/cpu/Cyclone/OpBranch.cpp
index 5d132cf..da76306 100644 (file)
--- a/cpu/Cyclone/OpBranch.cpp
+++ b/cpu/Cyclone/OpBranch.cpp
@@ -11,8 +11,7 @@ static void CheckPc(int reg)
   ot("  ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
   ot("  mov r4,r0\n");\r
 #else\r
-  if (reg != 4)\r
-    ot("  mov r4,r%i\n", reg);\r
+  ot("  bic r4,r%d,#1\n",reg); // we do not emulate address errors\r
 #endif\r
   ot("\n");\r
 }\r
@@ -194,7 +193,7 @@ int Op4E70(int op)
     case 6: // trapv\r
     OpStart(op,0x10); Cycles=4;\r
     ot("  tst r9,#0x10000000\n");\r
-    ot("  subne r5,r5,#%i\n",30);\r
+    ot("  subne r5,r5,#%i\n",34);\r
     ot("  movne r0,#0x1c ;@ TRAPV exception\n");\r
     ot("  blne Exception\n");\r
     OpEnd(0x10);\r
@@ -336,6 +335,7 @@ int OpDbra(int op)
     ot("  addeq r4,r4,#2 ;@ Skip branch offset\n");\r
     ot("  subeq r5,r5,#4 ;@ additional cycles\n");\r
     ot("  addne r4,r4,r0 ;@ r4 = New PC\n");\r
+    ot("  bic r4,r4,#1\n"); // we do not emulate address errors\r
     ot("\n");\r
 #endif\r
     Cycles=12-2;\r
@@ -384,6 +384,7 @@ int OpBranch(int op)
   if (offset==0)  size=1;\r
   if (offset==-1) size=2;\r
 \r
+  if (size==2) size=0; // 000 model does not support long displacement\r
   if (size) use=op; // 16-bit or 32-bit\r
   else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches\r
 \r
@@ -451,6 +452,8 @@ int OpBranch(int op)
     Cycles=18; // always 18\r
   }\r
 \r
+  ot("  add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11);\r
+\r
 #if USE_CHECKPC_CALLBACK && USE_CHECKPC_OFFSETBITS_8\r
   if (offset!=0 && offset!=-1) checkpc=1;\r
 #endif\r
@@ -462,12 +465,11 @@ int OpBranch(int op)
 #endif\r
   if (checkpc)\r
   {\r
-    ot("  add r0,r4,r11%s ;@ r4 = New PC\n",asr_r11);\r
     CheckPc(0);\r
   }\r
   else\r
   {\r
-    ot("  add r4,r4,r11%s ;@ r4 = New PC\n",asr_r11);\r
+    ot("  bic r4,r0,#1\n"); // we do not emulate address errors\r
     ot("\n");\r
   }\r
 \r