if (EaCanWrite(tea)==0) return 1;\r
}\r
\r
- use=OpBase(op);\r
+ use=OpBase(op,size);\r
use&=~0x0e00; // Use same handler for all registers\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
if(size>=2) Cycles+=2;\r
}\r
\r
- EaCalc (0,0x0e00,sea,0);\r
- EaRead (0, 0,sea,0,0x0e00);\r
+ EaCalcReadNoSE(-1,10,sea,0,0x0e00);\r
+\r
+ EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);\r
+\r
if (tea>=0x10)\r
- ot(" and r10,r0,#7 ;@ mem - do mod 8\n");\r
- else ot(" and r10,r0,#31 ;@ reg - do mod 32\n");\r
+ ot(" and r10,r10,#7 ;@ mem - do mod 8\n"); // size always 0\r
+ else ot(" and r10,r10,#31 ;@ reg - do mod 32\n"); // size always 2\r
ot("\n");\r
\r
- EaCalc(11,0x003f,tea,size);\r
- EaRead(11, 0,tea,size,0x003f);\r
ot(" mov r1,#1\n");\r
ot(" tst r0,r1,lsl r10 ;@ Do arithmetic\n");\r
ot(" bicne r9,r9,#0x40000000\n");\r
if (type==2) ot(" bic r1,r0,r1,lsl r10 ;@ Clear bit\n");\r
if (type==3) ot(" orr r1,r0,r1,lsl r10 ;@ Set bit\n");\r
ot("\n");\r
- EaWrite(11, 1,tea,size,0x003f);\r
+ EaWrite(11, 1,tea,size,0x003f,0,0);\r
}\r
OpEnd(tea);\r
\r
if (EaCanWrite(tea)==0) return 1;\r
}\r
\r
- use=OpBase(op);\r
+ use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
OpStart(op,sea,tea);\r
\r
- ot(" mov r10,#1\n");\r
ot("\n");\r
- EaCalc ( 0,0x0000,sea,0);\r
- EaRead ( 0, 0,sea,0,0);\r
+ EaCalcReadNoSE(-1,0,sea,0,0);\r
+ ot(" mov r10,#1\n");\r
ot(" bic r9,r9,#0x40000000 ;@ Blank Z flag\n");\r
if (tea>=0x10)\r
- ot(" and r0,r0,#7 ;@ mem - do mod 8\n");\r
- else ot(" and r0,r0,#0x1F ;@ reg - do mod 32\n");\r
+ ot(" and r0,r0,#7 ;@ mem - do mod 8\n"); // size always 0\r
+ else ot(" and r0,r0,#0x1F ;@ reg - do mod 32\n"); // size always 2\r
ot(" mov r10,r10,lsl r0 ;@ Make bit mask\n");\r
ot("\n");\r
\r
if(size>=2) Cycles+=2;\r
}\r
\r
- EaCalc (11,0x003f,tea,size);\r
- EaRead (11, 0,tea,size,0x003f);\r
+ EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);\r
ot(" tst r0,r10 ;@ Do arithmetic\n");\r
ot(" orreq r9,r9,#0x40000000 ;@ Get Z flag\n");\r
ot("\n");\r
if (type==2) ot(" bic r1,r0,r10 ;@ Clear bit\n");\r
if (type==3) ot(" orr r1,r0,r10 ;@ Set bit\n");\r
ot("\n");\r
- EaWrite(11, 1,tea,size,0x003f);\r
+ EaWrite(11, 1,tea,size,0x003f,0,0);\r
}\r
\r
OpEnd(sea,tea);\r
if (EaCanRead (ea,size)==0||EaAn(ea)) return 1;\r
if (EaCanWrite(ea )==0) return 1;\r
\r
- use=OpBase(op);\r
+ use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
OpStart(op,ea); Cycles=size<2?4:6;\r
#endif\r
}\r
\r
- EaCalc (10,0x003f,ea,size);\r
+ EaCalc (10,0x003f,ea,size,0,0);\r
\r
- if (type!=1) EaRead (10,0,ea,size,0x003f); // Don't need to read for 'clr'\r
+ if (type!=1) EaRead (10,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for a dummy read?)\r
if (type==1) ot("\n");\r
\r
if (type==0)\r
{\r
ot(";@ Negx:\n");\r
GetXBit(1);\r
- if(size!=2) ot(" mov r0,r0,lsl #%i\n",size?16:24);\r
+ if(size!=2) ot(" mov r0,r0,asl #%i\n",size?16:24);\r
ot(" rscs r1,r0,#0 ;@ do arithmetic\n");\r
ot(" orr r3,r9,#0xb0000000 ;@ for old Z\n");\r
OpGetFlags(1,1,0);\r
if (type==2)\r
{\r
ot(";@ Neg:\n");\r
- if(size!=2) ot(" mov r0,r0,lsl #%i\n",size?16:24);\r
+ if(size!=2) ot(" mov r0,r0,asl #%i\n",size?16:24);\r
ot(" rsbs r1,r0,#0\n");\r
OpGetFlags(1,1);\r
if(size!=2) ot(" mov r1,r1,asr #%i\n",size?16:24);\r
if (type==3)\r
{\r
ot(";@ Not:\n");\r
- ot(" mvn r1,r0\n");\r
+ if(size!=2) {\r
+ ot(" mov r0,r0,asl #%i\n",size?16:24);\r
+ ot(" mvn r1,r0,asr #%i\n",size?16:24);\r
+ }\r
+ else\r
+ ot(" mvn r1,r0\n");\r
ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
ot("\n");\r
}\r
\r
- EaWrite(10, 1,ea,size,0x003f);\r
+ EaWrite(10, 1,ea,size,0x003f,0,0);\r
\r
OpEnd(ea);\r
\r
// See if we can do this opcode:\r
if (EaCanWrite(sea)==0||EaAn(sea)) return 1;\r
\r
- use=OpBase(op);\r
+ use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
OpStart(op,sea); Cycles=4;\r
size=(op>>6)&1;\r
shift=32-(8<<size);\r
\r
- use=OpBase(op);\r
+ use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
OpStart(op); Cycles=4;\r
\r
- EaCalc (10,0x0007,ea,size+1);\r
- EaRead (10, 0,ea,size+1,0x0007);\r
+ EaCalc (10,0x0007,ea,size+1,0,0);\r
+ EaRead (10, 0,ea,size+1,0x0007,0,0);\r
\r
ot(" mov r0,r0,asl #%d\n",shift);\r
ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");\r
ot(" mov r1,r0,asr #%d\n",shift);\r
ot("\n");\r
\r
- EaWrite(10, 1,ea,size+1,0x0007);\r
+ EaWrite(10, 1,ea,size+1,0x0007,0,0);\r
\r
OpEnd();\r
return 0;\r
// See if we can do this opcode:\r
if (EaCanWrite(ea)==0) return 1;\r
\r
- use=OpBase(op);\r
+ use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
OpStart(op,ea); Cycles=8;\r
if (ea<8) Cycles=4;\r
\r
- ot(" mov r1,#0\n");\r
+ if (cc)\r
+ ot(" mov r1,#0\n");\r
\r
- if (cc!=1)\r
+ switch (cc)\r
{\r
- ot(";@ Is the condition true?\n");\r
- if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");\r
- ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
- if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");\r
- ot(" mvn%s r1,r1\n",cond[cc]);\r
+ case 0: // T\r
+ ot(" mvn r1,#0\n");\r
+ if (ea<8) Cycles+=2;\r
+ break;\r
+ case 1: // F\r
+ break;\r
+ case 2: // hi\r
+ ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n");\r
+ ot(" mvneq r1,r1\n");\r
+ if (ea<8) ot(" subeq r5,r5,#2 ;@ Extra cycles\n");\r
+ break;\r
+ case 3: // ls\r
+ ot(" tst r9,#0x60000000 ;@ ls: C || Z\n");\r
+ ot(" mvnne r1,r1\n");\r
+ if (ea<8) ot(" subne r5,r5,#2 ;@ Extra cycles\n");\r
+ break;\r
+ default:\r
+ ot(";@ Is the condition true?\n");\r
+ ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ ot(" mvn%s r1,r1\n",cond[cc]);\r
+ if (ea<8) ot(" sub%s r5,r5,#2 ;@ Extra cycles\n",cond[cc]);\r
+ break;\r
}\r
\r
- if (cc!=1 && ea<8) ot(" sub%s r5,r5,#2 ;@ Extra cycles\n",cond[cc]);\r
ot("\n");\r
\r
- EaCalc (0,0x003f, ea,size);\r
- EaWrite(0, 1, ea,size,0x003f);\r
+ EaCalc (0,0x003f, ea,size,0,0);\r
+ EaWrite(0, 1, ea,size,0x003f,0,0);\r
\r
OpEnd(ea);\r
return 0;\r
if (usereg)\r
{\r
ot(";@ Use Dn for count:\n");\r
- ot(" and r2,r8,#7<<9\n");\r
+ ot(" and r2,r8,#0x0e00\n");\r
ot(" ldr r2,[r7,r2,lsr #7]\n");\r
ot(" and r2,r2,#63\n");\r
ot("\n");\r
if (type==0) ot(" movs r0,r0,%s %s\n",dir?"asl":"asr",pct);\r
if (type==1) ot(" movs r0,r0,%s %s\n",dir?"lsl":"lsr",pct);\r
\r
- if (dir==0 && size<2)\r
- {\r
- ot(";@ restore after right shift:\n");\r
- ot(" mov r0,r0,lsl #%d\n",32-(8<<size));\r
- ot("\n");\r
- }\r
-\r
OpGetFlags(0,0);\r
if (usereg) { // store X only if count is not 0\r
ot(" cmp %s,#0 ;@ shifting by 0?\n",pct);\r
ot(" biceq r9,r9,#0x20000000 ;@ if so, clear carry\n");\r
- ot(" movne r1,r9,lsr #28\n");\r
- ot(" strneb r1,[r7,#0x45] ;@ else Save X bit\n");\r
+ ot(" strne r9,[r7,#0x4c] ;@ else Save X bit\n");\r
} else {\r
// count will never be 0 if we use immediate\r
- ot(" mov r1,r9,lsr #28\n");\r
- ot(" strb r1,[r7,#0x45] ;@ Save X bit\n");\r
+ ot(" str r9,[r7,#0x4c] ;@ Save X bit\n");\r
+ }\r
+ ot("\n");\r
+\r
+ if (dir==0 && size<2)\r
+ {\r
+ ot(";@ restore after right shift:\n");\r
+ ot(" movs r0,r0,lsl #%d\n",32-(8<<size));\r
+ if (type)\r
+ ot(" orrmi r9,r9,#0x80000000 ;@ Potentially missed N flag\n");\r
+ ot("\n");\r
}\r
\r
if (type==0 && dir) {\r
ot(" cmpne r3,r1,asr %s\n", pct);\r
ot(" biceq r9,r9,#0x10000000\n");\r
ot(" orrne r9,r9,#0x10000000\n");\r
+ ot("\n");\r
}\r
-\r
- ot("\n");\r
}\r
\r
// --------------------------------------\r
ot(" movs r0,r0,rrx\n");\r
OpGetFlags(0,1);\r
} else {\r
- ot(" ldrb r3,[r7,#0x45]\n");\r
+ ot(" ldr r3,[r7,#0x4c]\n");\r
ot(" movs r0,r0,lsl #1\n");\r
OpGetFlags(0,1);\r
- ot(" tst r3,#2\n");\r
+ ot(" tst r3,#0x20000000\n");\r
ot(" orrne r0,r0,#0x%x\n", 1<<(32-wide));\r
ot(" bicne r9,r9,#0x40000000 ;@ clear Z in case it got there\n");\r
}\r
\r
if (usereg)\r
{\r
- ot(";@ Reduce r2 until <0:\n");\r
- ot("Reduce_%.4x%s\n",op,ms?"":":");\r
- ot(" subs r2,r2,#%d\n",wide+1);\r
- ot(" bpl Reduce_%.4x\n",op);\r
- ot(" adds r2,r2,#%d ;@ Now r2=0-%d\n",wide+1,wide);\r
- ot(" beq norotx%.4x\n",op);\r
+ if (size==2)\r
+ {\r
+ ot(" subs r2,r2,#33\n");\r
+ ot(" addmis r2,r2,#33 ;@ Now r2=0-%d\n",wide);\r
+ }\r
+ else\r
+ {\r
+ ot(";@ Reduce r2 until <0:\n");\r
+ ot("Reduce_%.4x%s\n",op,ms?"":":");\r
+ ot(" subs r2,r2,#%d\n",wide+1);\r
+ ot(" bpl Reduce_%.4x\n",op);\r
+ ot(" adds r2,r2,#%d ;@ Now r2=0-%d\n",wide+1,wide);\r
+ }\r
+ ot(" beq norotx_%.4x\n",op);\r
ot("\n");\r
}\r
\r
\r
if (shift) ot(" mov r0,r0,lsr #%d ;@ Shift down\n",shift);\r
\r
+ ot("\n");\r
+ ot(";@ First get X bit (middle):\n");\r
+ ot(" ldr r3,[r7,#0x4c]\n");\r
+ ot(" rsb r1,r2,#%d\n",wide);\r
+ ot(" and r3,r3,#0x20000000\n");\r
+ ot(" mov r3,r3,lsr #29\n");\r
+ ot(" mov r3,r3,lsl r1\n");\r
+\r
ot(";@ Rotate bits:\n");\r
- ot(" mov r3,r0,lsr r2 ;@ Get right part\n");\r
+ ot(" orr r3,r3,r0,lsr r2 ;@ Orr right part\n");\r
ot(" rsbs r2,r2,#%d ;@ should also clear ARM V\n",wide+1);\r
- ot(" movs r0,r0,lsl r2 ;@ Get left part\n");\r
- ot(" orr r0,r3,r0 ;@ r0=Rotated value\n");\r
-\r
- ot(";@ Insert X bit into r2-1:\n");\r
- ot(" ldrb r3,[r7,#0x45]\n");\r
- ot(" sub r2,r2,#1\n");\r
- ot(" and r3,r3,#2\n");\r
- ot(" mov r3,r3,lsr #1\n");\r
- ot(" orr r0,r0,r3,lsl r2\n");\r
+ ot(" orrs r0,r3,r0,lsl r2 ;@ Orr left part, set flags\n");\r
ot("\n");\r
\r
if (shift) ot(" movs r0,r0,lsl #%d ;@ Shift up and get correct NC flags\n",shift);\r
OpGetFlags(0,!usereg);\r
- if (!shift) {\r
- ot(" tst r0,r0\n");\r
- ot(" bicne r9,r9,#0x40000000 ;@ make sure we didn't mess Z\n");\r
- }\r
if (usereg) { // store X only if count is not 0\r
- ot(" mov r2,r9,lsr #28\n");\r
- ot(" strb r2,[r7,#0x45] ;@ if not 0, Save X bit\n");\r
+ ot(" str r9,[r7,#0x4c] ;@ if not 0, Save X bit\n");\r
ot(" b nozerox%.4x\n",op);\r
- ot("norotx%.4x%s\n",op,ms?"":":");\r
- ot(" ldrb r2,[r7,#0x45]\n");\r
+ ot("norotx_%.4x%s\n",op,ms?"":":");\r
+ ot(" ldr r2,[r7,#0x4c]\n");\r
ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
- ot(" and r2,r2,#2\n");\r
- ot(" orr r9,r9,r2,lsl #28 ;@ C = old_X\n");\r
+ ot(" and r2,r2,#0x20000000\n");\r
+ ot(" orr r9,r9,r2 ;@ C = old_X\n");\r
ot("nozerox%.4x%s\n",op,ms?"":":");\r
}\r
\r
}\r
\r
ot(";@ Rotate register:\n");\r
+ if (!dir) ot(" adds r0,r0,#0 ;@ first clear V and C\n"); // ARM does not clear C if rot count is 0\r
if (count<0)\r
{\r
- if (dir) ot(" rsbs %s,%s,#32\n",pct,pct);\r
+ if (dir) ot(" rsb %s,%s,#32\n",pct,pct);\r
ot(" movs r0,r0,ror %s\n",pct);\r
}\r
else\r
}\r
\r
OpGetFlags(0,0);\r
- if (!dir) ot(" bic r9,r9,#0x10000000 ;@ make suve V is clear\n");\r
if (dir)\r
{\r
+ ot(" bic r9,r9,#0x30000000 ;@ clear CV\n");\r
ot(";@ Get carry bit from bit 0:\n");\r
if (usereg)\r
{\r
else\r
ot(" tst r0,#1\n");\r
ot(" orrne r9,r9,#0x20000000\n");\r
- ot(" biceq r9,r9,#0x20000000\n");\r
- }\r
- else if (usereg)\r
- {\r
- // if we rotate something by 0, ARM doesn't clear C\r
- // so we need to detect that\r
- ot(" cmp %s,#0\n",pct);\r
- ot(" biceq r9,r9,#0x20000000\n");\r
}\r
ot("\n");\r
\r
// Use the same opcode for target registers:\r
use=op&~0x0007;\r
\r
- // As long as count is not 8, use the same opcode for all shift counts::\r
+ // As long as count is not 8, use the same opcode for all shift counts:\r
if (usereg==0 && count!=8 && !(count==1&&type==2)) { use|=0x0e00; count=-1; }\r
if (usereg) { use&=~0x0e00; count=-1; } // Use same opcode for all Dn\r
\r
if (EaCanRead(ea,0)==0) return 1;\r
if (EaCanWrite(ea)==0) return 1;\r
\r
- use=OpBase(op);\r
+ use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
OpStart(op,ea); Cycles=6; // EmitAsr() will add 2\r
// See if we can do this opcode:\r
if (EaCanWrite(ea)==0 || EaAn(ea)) return 1;\r
\r
- use=OpBase(op);\r
+ use=OpBase(op,0);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
if (!gen_special) OpStart(op,ea);\r
notaz.gp2x.de / picodrive.git / blobdiff