void OpFlagsToReg(int high)\r
{\r
ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");\r
- ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");\r
+ ot(" mov r1,r10,lsr #28 ;@ ____NZCV\n");\r
ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");\r
ot(" tst r2,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r1,r1,#3 ;@ ____NZVC\n");\r
\r
// Convert SR/CRR register in r0 to our flags\r
// trashes r0,r1\r
-void OpRegToFlags(int high)\r
+void OpRegToFlags(int high, int srh_reg)\r
{\r
ot(" eor r1,r0,r0,ror #1 ;@ Bit 0=C^V\n");\r
ot(" mov r2,r0,lsl #25\n");\r
ot(" tst r1,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r0,r0,#3 ;@ ___XNZCV\n");\r
ot(" str r2,[r7,#0x4c] ;@ Store X bit\n");\r
- ot(" mov r9,r0,lsl #28 ;@ r9=NZCV...\n");\r
+ ot(" mov r10,r0,lsl #28 ;@ r10=NZCV...\n");\r
\r
if (high)\r
{\r
- ot(" mov r0,r0,ror #8\n");\r
- ot(" and r0,r0,#0xa7 ;@ only take defined bits\n");\r
- ot(" strb r0,[r7,#0x44] ;@ Store SR high\n");\r
+ int mask=EMULATE_TRACE?0xa7:0x27;\r
+ ot(" mov r%i,r0,ror #8\n",srh_reg);\r
+ ot(" and r%i,r%i,#0x%02x ;@ only take defined bits\n",srh_reg,srh_reg,mask);\r
+ ot(" strb r%i,[r7,#0x44] ;@ Store SR high\n",srh_reg);\r
}\r
ot("\n");\r
}\r
\r
-// checks for supervisor bit, if not set, jumps to SuperEnd()\r
-// also sets r11 to SR high value, SuperChange() uses this\r
-void SuperCheck(int op)\r
-{\r
- ot(" ldr r11,[r7,#0x44] ;@ Get SR high\n");\r
- ot(" tst r11,#0x20 ;@ Check we are in supervisor mode\n");\r
- ot(" beq WrongPrivilegeMode ;@ No\n");\r
- ot("\n");\r
-}\r
-\r
void SuperEnd(void)\r
{\r
ot(";@ ----------\n");\r
ot(";@ tried execute privileged instruction in user mode\n");\r
ot("WrongPrivilegeMode%s\n",ms?"":":");\r
+#if EMULATE_ADDRESS_ERRORS_JUMP || EMULATE_ADDRESS_ERRORS_IO\r
+ ot(" ldr r1,[r7,#0x58]\n");\r
ot(" sub r4,r4,#2 ;@ last opcode wasn't executed - go back\n");\r
- ot(" mov r0,#0x20 ;@ privilege violation\n");\r
+ ot(" orr r1,r1,#4 ;@ set activity bit: 'not processing instruction'\n");\r
+ ot(" str r1,[r7,#0x58]\n");\r
+#else\r
+ ot(" sub r4,r4,#2 ;@ last opcode wasn't executed - go back\n");\r
+#endif\r
+ ot(" mov r0,#8 ;@ privilege violation\n");\r
ot(" bl Exception\n");\r
Cycles=34;\r
- OpEnd(0x10);\r
+ OpEnd(0);\r
}\r
\r
// does OSP and A7 swapping if needed\r
// new or old SR (not the one already in [r7,#0x44]) should be passed in r11\r
-// trashes r0,r11\r
-void SuperChange(int op,int load_srh)\r
+// uses srh from srh_reg (loads if < 0), trashes r0,r11\r
+void SuperChange(int op,int srh_reg)\r
{\r
ot(";@ A7 <-> OSP?\n");\r
- if (load_srh)\r
+ if (srh_reg < 0) {\r
ot(" ldr r0,[r7,#0x44] ;@ Get other SR high\n");\r
- ot(" eor r0,r0,r11\n");\r
+ srh_reg=0;\r
+ }\r
+ ot(" eor r0,r%i,r11\n",srh_reg);\r
ot(" tst r0,#0x20\n");\r
ot(" beq no_sp_swap%.4x\n",op);\r
ot(" ;@ swap OSP and A7:\n");\r
\r
OpStart(op,sea,tea); Cycles=4;\r
\r
- EaCalcRead(-1,1,sea,size,0x003f);\r
-\r
if (movea==0)\r
{\r
- ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");\r
- ot(" mrs r9,cpsr ;@ r9=NZCV flags\n");\r
+ EaCalcRead(-1,0,sea,size,0x003f);\r
+ ot(" adds r1,r0,#0 ;@ Defines NZ, clears CV\n");\r
+ ot(" mrs r10,cpsr ;@ r10=NZCV flags\n");\r
ot("\n");\r
}\r
+ else\r
+ {\r
+ EaCalcRead(-1,1,sea,size,0x003f);\r
+ size=2; // movea always expands to 32-bits\r
+ }\r
\r
- if (movea) size=2; // movea always expands to 32-bits\r
-\r
+ eawrite_check_addrerr=1;\r
#if SPLIT_MOVEL_PD\r
- EaCalc (10,0x1e00,tea,size,0,0);\r
if ((tea&0x38)==0x20 && size==2) { // -(An)\r
+ EaCalc (8,0x0e00,tea,size,0,0);\r
ot(" mov r11,r1\n");\r
- ot(" add r0,r10,#2\n");\r
- EaWrite(0, 1,tea,1,0x1e00,0,0);\r
- EaWrite(10, 11,tea,1,0x1e00,1);\r
- } else {\r
- EaWrite(0, 1,tea,size,0x1e00,0,0);\r
+ ot(" add r0,r8,#2\n");\r
+ EaWrite(0, 1,tea,1,0x0e00,0,0);\r
+ EaWrite(8, 11,tea,1,0x0e00,1);\r
}\r
-#else\r
- EaCalc (0,0x1e00,tea,size,0,0);\r
- EaWrite(0, 1,tea,size,0x1e00,0,0);\r
+ else\r
#endif\r
+ {\r
+ EaCalc (0,0x0e00,tea,size,0,0);\r
+ EaWrite(0, 1,tea,size,0x0e00,0,0);\r
+ }\r
\r
#if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES\r
- // this is a bit hacky\r
- if ((tea==0x39||(tea&0x38)==0x10)&&size>=1)\r
+ // this is a bit hacky (device handlers might modify cycles)\r
+ if (tea==0x39||((0x10<=tea&&tea<0x30)&&size>=1))\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
#endif\r
\r
\r
OpStart(op,sea,tea);\r
\r
+ eawrite_check_addrerr=1;\r
EaCalc (1,0x003f,sea,0); // Lea\r
- EaCalc (0,0x1e00,tea,2);\r
- EaWrite(0, 1,tea,2,0x1e00);\r
+ EaCalc (0,0x0e00,tea,2);\r
+ EaWrite(0, 1,tea,2,0x0e00);\r
\r
Cycles=Ea_add_ns(g_lea_cycle_table,sea);\r
\r
use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,ea);\r
+ // 68000 model allows reading whole SR in user mode (but newer models don't)\r
+ OpStart(op,ea,0,0,type==3);\r
Cycles=12;\r
if (type==0) Cycles=(ea>=8)?8:6;\r
\r
- if (type==3) SuperCheck(op); // 68000 model allows reading whole SR in user mode (but newer models don't)\r
-\r
if (type==0 || type==1)\r
{\r
+ eawrite_check_addrerr=1;\r
OpFlagsToReg(type==0);\r
EaCalc (0,0x003f,ea,size,0,0);\r
EaWrite(0, 1,ea,size,0x003f,0,0);\r
if (type==2 || type==3)\r
{\r
EaCalcReadNoSE(-1,0,ea,size,0x003f);\r
- OpRegToFlags(type==3);\r
+ OpRegToFlags(type==3,1);\r
if (type==3) {\r
- SuperChange(op,0);\r
- CheckInterrupt(op);\r
+ SuperChange(op,1);\r
+ opend_check_interrupt = 1;\r
+ opend_check_trace = 1;\r
+ OpEnd(ea);\r
+ return 0;\r
}\r
}\r
\r
{\r
int type=0,ea=0;\r
int use=0,size=0;\r
+ int sr_mask=EMULATE_TRACE?0xa7:0x27;\r
\r
type=(op>>9)&5; if (type==4) return 1;\r
size=(op>>6)&1; // ccr or sr?\r
use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,ea); Cycles=16;\r
+ OpStart(op,ea,0,0,size!=0); Cycles=16;\r
\r
- if (size) SuperCheck(op);\r
+ EaCalcRead(-1,0,ea,size,0x003f);\r
\r
- EaCalc(10,0x003f,ea,size);\r
- EaRead(10, 10,ea,size,0x003f);\r
+ ot(" eor r1,r0,r0,ror #1 ;@ Bit 0=C^V\n");\r
+ ot(" tst r1,#1 ;@ 1 if C!=V\n");\r
+ ot(" eorne r0,r0,#3 ;@ ___XNZCV\n");\r
+ ot(" ldr r2,[r7,#0x4c] ;@ Load old X bit\n");\r
+\r
+ // note: old srh is already in r11 (done by OpStart)\r
+ if (type==0) {\r
+ ot(" orr r10,r10,r0,lsl #28\n");\r
+ ot(" orr r2,r2,r0,lsl #25 ;@ X bit\n");\r
+ if (size!=0) {\r
+ ot(" orr r1,r11,r0,lsr #8\n");\r
+ ot(" and r1,r1,#0x%02x ;@ mask-out unused bits\n",sr_mask);\r
+ }\r
+ }\r
+ if (type==1) {\r
+ ot(" and r10,r10,r0,lsl #28\n");\r
+ ot(" and r2,r2,r0,lsl #25 ;@ X bit\n");\r
+ if (size!=0)\r
+ ot(" and r1,r11,r0,lsr #8\n");\r
+ }\r
+ if (type==5) {\r
+ ot(" eor r10,r10,r0,lsl #28\n");\r
+ ot(" eor r2,r2,r0,lsl #25 ;@ X bit\n");\r
+ if (size!=0) {\r
+ ot(" eor r1,r11,r0,lsr #8\n");\r
+ ot(" and r1,r1,#0x%02x ;@ mask-out unused bits\n",sr_mask);\r
+ }\r
+ }\r
\r
- OpFlagsToReg(size);\r
- if (type==0) ot(" orr r0,r1,r10\n");\r
- if (type==1) ot(" and r0,r1,r10\n");\r
- if (type==5) ot(" eor r0,r1,r10\n");\r
- OpRegToFlags(size);\r
- if (size) {\r
- SuperChange(op,0);\r
- CheckInterrupt(op);\r
+ ot(" str r2,[r7,#0x4c] ;@ Save X bit\n");\r
+ if (size!=0)\r
+ ot(" strb r1,[r7,#0x44]\n");\r
+ ot("\n");\r
+\r
+ // we can't enter supervisor mode, nor unmask irqs just by using OR\r
+ if (size!=0 && type!=0) {\r
+ SuperChange(op,1);\r
+ ot("\n");\r
+ opend_check_interrupt = 1;\r
}\r
+ // also can't set trace bit with AND\r
+ if (size!=0 && type!=1)\r
+ opend_check_trace = 1;\r
\r
OpEnd(ea);\r
\r
\r
OpStart(op,ea);\r
\r
- ot(" ldr r10,[r7,#0x3c]\n");\r
+ ot(" ldr r11,[r7,#0x3c]\n");\r
EaCalc (1,0x003f, ea,0);\r
ot("\n");\r
- ot(" sub r0,r10,#4 ;@ Predecrement A7\n");\r
+ ot(" sub r0,r11,#4 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
ot("\n");\r
MemHandler(1,2); // Write 32-bit\r
use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,ea);\r
+ OpStart(op,ea,0,1);\r
\r
ot(" ldrh r11,[r4],#2 ;@ r11=register mask\n");\r
-\r
- ot(";@ r10=Register Index*4:\n");\r
- if (decr) ot(" mov r10,#0x40 ;@ order reversed for -(An)\n");\r
- else ot(" mov r10,#-4\n");\r
- \r
ot("\n");\r
ot(";@ Get the address into r6:\n");\r
EaCalc(6,0x003f,cea,size);\r
\r
+#if !MEMHANDLERS_NEED_PREV_PC\r
+ // must save PC, need a spare register\r
+ ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
+#endif\r
+\r
+ ot(";@ r4=Register Index*4:\n");\r
+ if (decr) ot(" mov r4,#0x40 ;@ order reversed for -(An)\n");\r
+ else ot(" mov r4,#-4\n");\r
+ \r
ot("\n");\r
ot(" tst r11,r11\n"); // sanity check\r
ot(" beq NoRegs%.4x\n",op);\r
\r
+#if EMULATE_ADDRESS_ERRORS_IO\r
+ ot("\n");\r
+ ot(" tst r6,#1 ;@ address error?\n");\r
+ ot(" movne r0,r6\n");\r
+ ot(" bne ExceptionAddressError_%c_data\n",dir?'r':'w');\r
+#endif\r
+\r
ot("\n");\r
ot("Movemloop%.4x%s\n",op, ms?"":":");\r
- ot(" add r10,r10,#%d ;@ r10=Next Register\n",decr?-4:4);\r
+ ot(" add r4,r4,#%d ;@ r4=Next Register\n",decr?-4:4);\r
ot(" movs r11,r11,lsr #1\n");\r
ot(" bcc Movemloop%.4x\n",op);\r
ot("\n");\r
if (dir)\r
{\r
ot(" ;@ Copy memory to register:\n",1<<size);\r
+ earead_check_addrerr=0; // already checked\r
EaRead (6,0,ea,size,0x003f);\r
- ot(" str r0,[r7,r10] ;@ Save value into Dn/An\n");\r
+ ot(" str r0,[r7,r4] ;@ Save value into Dn/An\n");\r
}\r
else\r
{\r
ot(" ;@ Copy register to memory:\n",1<<size);\r
- ot(" ldr r1,[r7,r10] ;@ Load value from Dn/An\n");\r
- EaWrite(6,1,ea,size,0x003f);\r
+ ot(" ldr r1,[r7,r4] ;@ Load value from Dn/An\n");\r
+#if SPLIT_MOVEL_PD\r
+ if (decr && size==2) { // -(An)\r
+ ot(" add r0,r6,#2\n");\r
+ EaWrite(0,1,ea,1,0x003f,0,0);\r
+ ot(" ldr r1,[r7,r4] ;@ Load value from Dn/An\n");\r
+ ot(" mov r0,r6\n");\r
+ EaWrite(0,1,ea,1,0x003f,1);\r
+ }\r
+ else\r
+#endif\r
+ {\r
+ EaWrite(6,1,ea,size,0x003f);\r
+ }\r
}\r
\r
if (decr==0) ot(" add r6,r6,#%d ;@ Post-increment address\n",1<<size);\r
}\r
\r
ot("NoRegs%.4x%s\n",op, ms?"":":");\r
- ot(" ldr r6,=CycloneJumpTab ;@ restore Opcode Jump table\n");\r
+ ot(" ldr r4,[r7,#0x40]\n");\r
+ ot(" ldr r6,[r7,#0x54] ;@ restore Opcode Jump table\n");\r
ot("\n");\r
\r
if(dir) { // er\r
\r
Cycles+=Ea_add_ns(g_movem_cycle_table,ea);\r
\r
+ opend_op_changes_cycles = 1;\r
OpEnd(ea);\r
- ltorg();\r
ot("\n");\r
\r
return 0;\r
\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op); Cycles=4;\r
-\r
- SuperCheck(op);\r
+ OpStart(op,0,0,0,1); Cycles=4;\r
\r
if (dir)\r
{\r
+ eawrite_check_addrerr=1;\r
ot(" ldr r1,[r7,#0x48] ;@ Get from USP\n\n");\r
EaCalc (0,0x000f,8,2,1);\r
EaWrite(0, 1,8,2,0x000f,1);\r
ot(" movs r0,r8,asl #24\n");\r
ot(" and r1,r8,#0x0e00\n");\r
ot(" mov r0,r0,asr #24 ;@ Sign extended Quick value\n");\r
- ot(" mrs r9,cpsr ;@ r9=NZ flags\n");\r
+ ot(" mrs r10,cpsr ;@ r10=NZ flags\n");\r
ot(" str r0,[r7,r1,lsr #7] ;@ Store into Dn\n");\r
ot("\n");\r
\r
\r
OpStart(op); Cycles=6;\r
\r
- ot(" and r10,r8,#0x0e00 ;@ Find T register\n");\r
- ot(" and r11,r8,#0x000f ;@ Find S register\n");\r
- if (type==0x48) ot(" orr r10,r10,#0x1000 ;@ T is an address register\n");\r
+ ot(" and r2,r8,#0x0e00 ;@ Find T register\n");\r
+ ot(" and r3,r8,#0x000f ;@ Find S register\n");\r
+ if (type==0x48) ot(" orr r2,r2,#0x1000 ;@ T is an address register\n");\r
ot("\n");\r
- ot(" ldr r0,[r7,r10,lsr #7] ;@ Get T\n");\r
- ot(" ldr r1,[r7,r11,lsl #2] ;@ Get S\n");\r
+ ot(" ldr r0,[r7,r2,lsr #7] ;@ Get T\n");\r
+ ot(" ldr r1,[r7,r3,lsl #2] ;@ Get S\n");\r
ot("\n");\r
- ot(" str r0,[r7,r11,lsl #2] ;@ T->S\n");\r
- ot(" str r1,[r7,r10,lsr #7] ;@ S->T\n"); \r
+ ot(" str r0,[r7,r3,lsl #2] ;@ T->S\n");\r
+ ot(" str r1,[r7,r2,lsr #7] ;@ S->T\n"); \r
ot("\n");\r
\r
OpEnd();\r
\r
// Get EA\r
ea = (op&0x0007)|0x28;\r
- rea= op&0x0e00;\r
+ rea= (op&0x0e00)>>9;\r
dir = (op>>7)&1;\r
\r
// Find size extension\r
\r
OpStart(op,ea);\r
\r
- if(dir) { // reg to mem\r
- EaCalcReadNoSE(-1,11,rea,size,0x1e00);\r
+ if(dir) // reg to mem\r
+ {\r
+ EaCalcReadNoSE(-1,11,rea,size,0x0e00);\r
\r
- EaCalc(10,0x000f,ea,size);\r
+ EaCalc(8,0x000f,ea,size);\r
if(size==2) { // if operand is long\r
ot(" mov r1,r11,lsr #24 ;@ first byte\n");\r
- EaWrite(10,1,ea,0,0x000f); // store first byte\r
- ot(" add r0,r10,#%i\n",(aadd+=2));\r
+ EaWrite(8,1,ea,0,0x000f); // store first byte\r
+ ot(" add r0,r8,#%i\n",(aadd+=2));\r
ot(" mov r1,r11,lsr #16 ;@ second byte\n");\r
EaWrite(0,1,ea,0,0x000f); // store second byte\r
- ot(" add r0,r10,#%i\n",(aadd+=2));\r
+ ot(" add r0,r8,#%i\n",(aadd+=2));\r
} else {\r
- ot(" mov r0,r10\n");\r
+ ot(" mov r0,r8\n");\r
}\r
ot(" mov r1,r11,lsr #8 ;@ first or third byte\n");\r
EaWrite(0,1,ea,0,0x000f);\r
- ot(" add r0,r10,#%i\n",(aadd+=2));\r
+ ot(" add r0,r8,#%i\n",(aadd+=2));\r
ot(" and r1,r11,#0xff\n");\r
EaWrite(0,1,ea,0,0x000f);\r
- } else { // mem to reg\r
- EaCalc(10,0x000f,ea,size,1);\r
- EaRead(10,11,ea,0,0x000f,1); // read first byte\r
- ot(" add r0,r10,#2\n");\r
+ }\r
+ else // mem to reg\r
+ {\r
+ EaCalc(6,0x000f,ea,size,1);\r
+ EaRead(6,11,ea,0,0x000f,1); // read first byte\r
+ ot(" add r0,r6,#2\n");\r
EaRead(0,1,ea,0,0x000f,1); // read second byte\r
if(size==2) { // if operand is long\r
ot(" orr r11,r11,r1,lsr #8 ;@ second byte\n");\r
- ot(" add r0,r10,#4\n");\r
+ ot(" add r0,r6,#4\n");\r
EaRead(0,1,ea,0,0x000f,1);\r
ot(" orr r11,r11,r1,lsr #16 ;@ third byte\n");\r
- ot(" add r0,r10,#6\n");\r
+ ot(" add r0,r6,#6\n");\r
EaRead(0,1,ea,0,0x000f,1);\r
ot(" orr r1,r11,r1,lsr #24 ;@ fourth byte\n");\r
} else {\r
ot(" orr r1,r11,r1,lsr #8 ;@ second byte\n");\r
}\r
// store the result\r
- EaCalc(11,0x0e00,rea,size,1); // reg number -> r11\r
- EaWrite(11,1,rea,size,0x0e00,1);\r
+ EaCalc(0,0x0e00,rea,size,1);\r
+ EaWrite(0,1,rea,size,0x0e00,1);\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
}\r
\r
Cycles=(size==2)?24:16;\r
{\r
int type=(op>>1)&1; // stop/reset\r
\r
- OpStart(op);\r
-\r
- SuperCheck(op);\r
+ OpStart(op,0,0,0,1);\r
\r
if(type) {\r
// copy immediate to SR, stop the CPU and eat all remaining cycles.\r
\r
ot("\n");\r
\r
- ot(" mov r0,#1\n");\r
- ot(" str r0,[r7,#0x58] ;@ stopped\n");\r
+ ot(" ldr r0,[r7,#0x58]\n");\r
+ ot(" mov r5,#0 ;@ eat cycles\n");\r
+ ot(" orr r0,r0,#1 ;@ stopped\n");\r
+ ot(" str r0,[r7,#0x58]\n");\r
ot("\n");\r
\r
- ot(" mov r5,#0 ;@ eat cycles\n");\r
Cycles = 4;\r
ot("\n");\r
}\r
Cycles = 132;\r
#if USE_RESET_CALLBACK\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot(" ldr r11,[r7,#0x90] ;@ ResetCallback\n");\r
ot(" tst r11,r11\n");\r
ot(" movne lr,pc\n");\r
ot(" bxne r11 ;@ call ResetCallback if it is defined\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot("\n");\r
#endif\r
}\r
notaz.gp2x.de / picodrive.git / blobdiff