\r
if (movea) size=2; // movea always expands to 32-bits\r
\r
- EaCalc (0,0x0e00,tea,size);\r
+ EaCalc (0,0x0e00,tea,size,0,0);\r
#if SPLIT_MOVEL_PD\r
if ((tea&0x38)==0x20 && size==2) { // -(An)\r
ot(" mov r10,r0\n");\r
ot(" mov r11,r1\n");\r
ot(" add r0,r0,#2\n");\r
- EaWrite(0, 1,tea,1,0x0e00);\r
+ EaWrite(0, 1,tea,1,0x0e00,0,0);\r
EaWrite(10, 11,tea,1,0x0e00,1);\r
} else {\r
- EaWrite(0, 1,tea,size,0x0e00);\r
+ EaWrite(0, 1,tea,size,0x0e00,0,0);\r
}\r
#else\r
- EaWrite(0, 1,tea,size,0x0e00);\r
+ EaWrite(0, 1,tea,size,0x0e00,0,0);\r
#endif\r
\r
#if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES\r
if (type==0 || type==1)\r
{\r
OpFlagsToReg(type==0);\r
- EaCalc (0,0x003f,ea,size);\r
- EaWrite(0, 1,ea,size,0x003f);\r
+ EaCalc (0,0x003f,ea,size,0,0);\r
+ EaWrite(0, 1,ea,size,0x003f,0,0);\r
}\r
\r
if (type==2 || type==3)\r
{\r
- EaCalc(0,0x003f,ea,size);\r
- EaRead(0, 0,ea,size,0x003f);\r
+ EaCalc(0,0x003f,ea,size,0,0);\r
+ EaRead(0, 0,ea,size,0x003f,0,0);\r
OpRegToFlags(type==3);\r
if (type==3) {\r
SuperChange(op);\r
\r
if (size) SuperCheck(op);\r
\r
- EaCalc(0,0x003f,ea,size);\r
- EaRead(0, 10,ea,size,0x003f);\r
+ EaCalc(10,0x003f,ea,size);\r
+ EaRead(10, 10,ea,size,0x003f);\r
\r
OpFlagsToReg(size);\r
if (type==0) ot(" orr r0,r1,r10\n");\r
\r
OpStart(op,ea);\r
\r
- ot(" stmdb sp!,{r9} ;@ Push r9\n"); // can't just use r12 or lr here, because memhandlers touch them\r
ot(" ldrh r11,[r4],#2 ;@ r11=register mask\n");\r
\r
- ot("\n");\r
- ot(";@ Get the address into r9:\n");\r
- EaCalc(9,0x003f,cea,size);\r
-\r
ot(";@ r10=Register Index*4:\n");\r
- if (decr) ot(" mov r10,#0x3c ;@ order reversed for -(An)\n");\r
- else ot(" mov r10,#0\n");\r
+ if (decr) ot(" mov r10,#0x40 ;@ order reversed for -(An)\n");\r
+ else ot(" mov r10,#-4\n");\r
\r
ot("\n");\r
- ot("MoreReg%.4x%s\n",op, ms?"":":");\r
+ ot(";@ Get the address into r6:\n");\r
+ EaCalc(6,0x003f,cea,size);\r
\r
- ot(" tst r11,#1\n");\r
- ot(" beq SkipReg%.4x\n",op);\r
ot("\n");\r
+ ot(" tst r11,r11\n"); // sanity check\r
+ ot(" beq NoRegs%.4x\n",op);\r
\r
- if (decr) ot(" sub r9,r9,#%d ;@ Pre-decrement address\n",1<<size);\r
+ ot("\n");\r
+ ot("Movemloop%.4x%s\n",op, ms?"":":");\r
+ ot(" add r10,r10,#%d ;@ r10=Next Register\n",decr?-4:4);\r
+ ot(" movs r11,r11,lsr #1\n");\r
+ ot(" bcc Movemloop%.4x\n",op);\r
+ ot("\n");\r
+\r
+ if (decr) ot(" sub r6,r6,#%d ;@ Pre-decrement address\n",1<<size);\r
\r
if (dir)\r
{\r
ot(" ;@ Copy memory to register:\n",1<<size);\r
- EaRead (9,0,ea,size,0x003f);\r
+ EaRead (6,0,ea,size,0x003f);\r
ot(" str r0,[r7,r10] ;@ Save value into Dn/An\n");\r
}\r
else\r
{\r
ot(" ;@ Copy register to memory:\n",1<<size);\r
ot(" ldr r1,[r7,r10] ;@ Load value from Dn/An\n");\r
- EaWrite(9,1,ea,size,0x003f);\r
+ EaWrite(6,1,ea,size,0x003f);\r
}\r
\r
- if (decr==0) ot(" add r9,r9,#%d ;@ Post-increment address\n",1<<size);\r
+ if (decr==0) ot(" add r6,r6,#%d ;@ Post-increment address\n",1<<size);\r
\r
ot(" sub r5,r5,#%d ;@ Take some cycles\n",2<<size);\r
- ot("\n");\r
- ot("SkipReg%.4x%s\n",op, ms?"":":");\r
- ot(" movs r11,r11,lsr #1;@ Shift mask:\n");\r
- ot(" add r10,r10,#%d ;@ r10=Next Register\n",decr?-4:4);\r
- ot(" bne MoreReg%.4x\n",op);\r
+ ot(" tst r11,r11\n");\r
+ ot(" bne Movemloop%.4x\n",op);\r
ot("\n");\r
\r
if (change)\r
{\r
ot(";@ Write back address:\n");\r
EaCalc (0,0x0007,8|(ea&7),2);\r
- EaWrite(0, 9,8|(ea&7),2,0x0007);\r
+ EaWrite(0, 6,8|(ea&7),2,0x0007);\r
}\r
\r
- ot(" ldmia sp!,{r9} ;@ Pop r9\n");\r
+ ot("NoRegs%.4x%s\n",op, ms?"":":");\r
+ ot(" ldr r6,=CycloneJumpTab ;@ restore Opcode Jump table\n");\r
ot("\n");\r
\r
if(dir) { // er\r
Cycles+=Ea_add_ns(g_movem_cycle_table,ea);\r
\r
OpEnd(ea);\r
+ ot("\n");\r
+ ltorg();\r
\r
return 0;\r
}\r