32x: drc: new smc handling, some bugfixes + refactoring

[picodrive.git] / cpu / drc / emit_arm.c

diff --git a/cpu/drc/emit_arm.c b/cpu/drc/emit_arm.c
index d12db86..06483ea 100644 (file)
--- a/cpu/drc/emit_arm.c
+++ b/cpu/drc/emit_arm.c
@@ -332,8 +332,8 @@ static int emith_xbranch(int cond, void *target, int is_call)
        tcache_ptr += sizeof(u32)
 
 #define JMP_EMIT(cond, ptr) { \
-       int val = (u32 *)tcache_ptr - (u32 *)(ptr) - 2; \
-       EOP_C_B_PTR(ptr, cond, 0, val & 0xffffff); \
+       u32 val_ = (u32 *)tcache_ptr - (u32 *)(ptr) - 2; \
+       EOP_C_B_PTR(ptr, cond, 0, val_ & 0xffffff); \
 }
 
 #define EMITH_JMP_START(cond) { \
@@ -630,9 +630,6 @@ static int emith_xbranch(int cond, void *target, int is_call)
        EOP_MOV_REG_ASR(d,d,32 - (bits)); \
 }
 
-#define host_arg2reg(rd, arg) \
-       rd = arg
-
 // upto 4 args
 #define emith_pass_arg_r(arg, reg) \
        EOP_MOV_REG_SIMPLE(arg, reg)
@@ -658,6 +655,11 @@ static int emith_xbranch(int cond, void *target, int is_call)
        *ptr_ = (*ptr_ & 0xff000000) | (val_ & 0x00ffffff); \
 } while (0)
 
+#define emith_jump_at(ptr, target) { \
+       u32 val_ = (u32 *)(target) - (u32 *)(ptr) - 2; \
+       EOP_C_B_PTR(ptr, A_COND_AL, 0, val_ & 0xffffff); \
+}
+
 #define emith_jump_reg_c(cond, r) \
        EOP_C_BX(cond, r)
 
@@ -690,6 +692,18 @@ static int emith_xbranch(int cond, void *target, int is_call)
 #define emith_ret_to_ctx(offs) \
        emith_ctx_write(14, offs)
 
+#define emith_push_ret() \
+       EOP_STMFD_SP(A_R14M)
+
+#define emith_pop_and_ret() \
+       EOP_LDMFD_SP(A_R15M)
+
+#define host_instructions_updated(base, end) \
+       cache_flush_d_inval_i(base, end)
+
+#define host_arg2reg(rd, arg) \
+       rd = arg
+
 /* SH2 drc specific */
 #define emith_sh2_drc_entry() \
        EOP_STMFD_SP(A_R4M|A_R5M|A_R6M|A_R7M|A_R8M|A_R9M|A_R10M|A_R11M|A_R14M)