emith_add_r_imm(r, imm); \
}
-#define emith_or_r_imm_c(cond, r, imm) { \
- (void)(cond); \
- emith_or_r_imm(r, imm); \
-}
-
-#define emith_eor_r_imm_c(cond, r, imm) { \
- (void)(cond); \
- emith_eor_r_imm(r, imm); \
-}
-
#define emith_sub_r_imm_c(cond, r, imm) { \
(void)(cond); \
emith_sub_r_imm(r, imm); \
}
-#define emith_bic_r_imm_c(cond, r, imm) { \
- (void)(cond); \
- emith_bic_r_imm(r, imm); \
-}
+#define emith_or_r_imm_c(cond, r, imm) \
+ emith_or_r_imm(r, imm)
+#define emith_eor_r_imm_c(cond, r, imm) \
+ emith_eor_r_imm(r, imm)
+#define emith_bic_r_imm_c(cond, r, imm) \
+ emith_bic_r_imm(r, imm)
+#define emith_ror_c(cond, d, s, cnt) \
+ emith_ror(d, s, cnt)
+
+#define emith_read_r_r_offs_c(cond, r, rs, offs) \
+ emith_read_r_r_offs(r, rs, offs)
+#define emith_write_r_r_offs_c(cond, r, rs, offs) \
+ emith_write_r_r_offs(r, rs, offs)
+#define emith_read8_r_r_offs_c(cond, r, rs, offs) \
+ emith_read8_r_r_offs(r, rs, offs)
+#define emith_write8_r_r_offs_c(cond, r, rs, offs) \
+ emith_write8_r_r_offs(r, rs, offs)
+#define emith_read16_r_r_offs_c(cond, r, rs, offs) \
+ emith_read16_r_r_offs(r, rs, offs)
+#define emith_write16_r_r_offs_c(cond, r, rs, offs) \
+ emith_write16_r_r_offs(r, rs, offs)
+#define emith_jump_reg_c(cond, r) \
+ emith_jump_reg(r)
+#define emith_jump_ctx_c(cond, offs) \
+ emith_jump_ctx(offs)
+#define emith_ret_c(cond) \
+ emith_ret()
// _r_r_imm
+#define emith_add_r_r_imm(d, s, imm) { \
+ if (d != s) \
+ emith_move_r_r(d, s); \
+ emith_add_r_imm(d, imm); \
+}
+
#define emith_and_r_r_imm(d, s, imm) { \
if (d != s) \
emith_move_r_r(d, s); \
#define emith_push(r) \
EMIT_OP(0x50 + (r))
+#define emith_push_imm(imm) { \
+ EMIT_OP(0x68); \
+ EMIT(imm, u32); \
+}
+
#define emith_pop(r) \
EMIT_OP(0x58 + (r))
#define emith_rolcf emith_rolc
#define emith_rorcf emith_rorc
-// XXX: offs is 8bit only
-#define emith_ctx_read(r, offs) do { \
- EMIT_OP_MODRM(0x8b, 1, r, xBP); \
- EMIT(offs, u8); /* mov tmp, [ebp+#offs] */ \
+#define emith_deref_op(op, r, rs, offs) do { \
+ /* mov r <-> [ebp+#offs] */ \
+ if ((offs) >= 0x80) { \
+ EMIT_OP_MODRM(op, 2, r, rs); \
+ EMIT(offs, u32); \
+ } else { \
+ EMIT_OP_MODRM(op, 1, r, rs); \
+ EMIT(offs, u8); \
+ } \
} while (0)
+#define emith_read_r_r_offs(r, rs, offs) \
+ emith_deref_op(0x8b, r, rs, offs)
+
+#define emith_write_r_r_offs(r, rs, offs) \
+ emith_deref_op(0x89, r, rs, offs)
+
+#define emith_read8_r_r_offs(r, rs, offs) \
+ emith_deref_op(0x8a, r, rs, offs)
+
+#define emith_write8_r_r_offs(r, rs, offs) \
+ emith_deref_op(0x88, r, rs, offs)
+
+#define emith_read16_r_r_offs(r, rs, offs) { \
+ EMIT(0x66, u8); /* operand override */ \
+ emith_read_r_r_offs(r, rs, offs); \
+}
+
+#define emith_write16_r_r_offs(r, rs, offs) { \
+ EMIT(0x66, u8); \
+ emith_write16_r_r_offs(r, rs, offs) \
+}
+
+#define emith_ctx_read(r, offs) \
+ emith_read_r_r_offs(r, CONTEXT_REG, offs)
+
+#define emith_ctx_write(r, offs) \
+ emith_write_r_r_offs(r, CONTEXT_REG, offs)
+
#define emith_ctx_read_multiple(r, offs, cnt, tmpr) do { \
int r_ = r, offs_ = offs, cnt_ = cnt; \
for (; cnt_ > 0; r_++, offs_ += 4, cnt_--) \
emith_ctx_read(r_, offs_); \
} while (0)
-#define emith_ctx_write(r, offs) do { \
- EMIT_OP_MODRM(0x89, 1, r, xBP); \
- EMIT(offs, u8); /* mov [ebp+#offs], tmp */ \
-} while (0)
-
#define emith_ctx_write_multiple(r, offs, cnt, tmpr) do { \
int r_ = r, offs_ = offs, cnt_ = cnt; \
for (; cnt_ > 0; r_++, offs_ += 4, cnt_--) \
emith_ctx_write(r_, offs_); \
} while (0)
+// assumes EBX is free
+#define emith_ret_to_ctx(offs) { \
+ emith_pop(xBX); \
+ emith_ctx_write(xBX, offs); \
+}
+
#define emith_jump(ptr) { \
u32 disp = (u32)(ptr) - ((u32)tcache_ptr + 5); \
EMIT_OP(0xe9); \
#define emith_call_cond(cond, ptr) \
emith_call(ptr)
+#define emith_call_reg(r) \
+ EMIT_OP_MODRM(0xff, 3, 2, r)
+
+#define emith_call_ctx(offs) { \
+ EMIT_OP_MODRM(0xff, 2, 2, CONTEXT_REG); \
+ EMIT(offs, u32); \
+}
+
+#define emith_ret() \
+ EMIT_OP(0xc3)
+
#define emith_jump_reg(r) \
EMIT_OP_MODRM(0xff, 3, 4, r)
+#define emith_jump_ctx(offs) { \
+ EMIT_OP_MODRM(0xff, 2, 4, CONTEXT_REG); \
+ EMIT(offs, u32); \
+}
+
#define EMITH_JMP_START(cond) { \
u8 *cond_ptr; \
JMP8_POS(cond_ptr)
JMP8_EMIT(cond, cond_ptr); \
}
+#define EMITH_JMP3_START(cond) { \
+ u8 *cond_ptr, *else_ptr; \
+ JMP8_POS(cond_ptr)
+
+#define EMITH_JMP3_MID(cond) \
+ JMP8_POS(else_ptr); \
+ JMP8_EMIT(cond, cond_ptr);
+
+#define EMITH_JMP3_END() \
+ JMP8_EMIT_NC(else_ptr); \
+}
+
// "simple" jump (no more then a few insns)
+// ARM will use conditional instructions here
#define EMITH_SJMP_START EMITH_JMP_START
#define EMITH_SJMP_END EMITH_JMP_END
+#define EMITH_SJMP3_START EMITH_JMP3_START
+#define EMITH_SJMP3_MID EMITH_JMP3_MID
+#define EMITH_SJMP3_END EMITH_JMP3_END
+
#define host_arg2reg(rd, arg) \
switch (arg) { \
case 0: rd = xAX; break; \
emith_pop(xSI); \
emith_pop(xBP); \
emith_pop(xBX); \
- EMIT_OP(0xc3); /* ret */\
+ emith_ret(); \
+}
+
+// assumes EBX is free temporary
+#define emith_sh2_wcall(a, tab, ret_ptr) { \
+ int arg2_; \
+ host_arg2reg(arg2_, 2); \
+ emith_lsr(xBX, a, SH2_WRITE_SHIFT); \
+ EMIT_OP_MODRM(0x8b, 0, xBX, 4); \
+ EMIT_SIB(2, xBX, tab); /* mov ebx, [tab + ebx * 4] */ \
+ emith_ctx_read(arg2_, offsetof(SH2, is_slave)); \
+ emith_push_imm((long)(ret_ptr)); \
+ emith_jump_reg(xBX); \
}
#define emith_sh2_dtbf_loop() { \