32x: drc: dynamicregister allocator

[picodrive.git] / cpu / drc / emit_x86.c

diff --git a/cpu/drc/emit_x86.c b/cpu/drc/emit_x86.c
index e2eef38..71b9a40 100644 (file)
--- a/cpu/drc/emit_x86.c
+++ b/cpu/drc/emit_x86.c
@@ -1,30 +1,15 @@
 #include <stdarg.h>
 
-#if (DRC_DEBUG & 1)
-#define COUNT_OP \
-       host_insn_count++
-#else
-#define COUNT_OP
-#endif
-
-// TODO: move
-static int reg_map_g2h[] = {
-       -1, -1, -1, -1,
-       -1, -1, -1, -1,
-       -1, -1, -1, -1,
-       -1, -1, -1, -1,
-       -1, -1, -1, -1,
-       -1, -1, -1, -1,
-};
-
 enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
+#define CONTEXT_REG xBP
+
 #define EMIT_PTR(ptr, val, type) \
        *(type *)(ptr) = val
 
 #define EMIT(val, type) { \
        EMIT_PTR(tcache_ptr, val, type); \
-       tcache_ptr = (char *)tcache_ptr + sizeof(type); \
+       tcache_ptr += sizeof(type); \
 }
 
 #define EMIT_OP(op) { \
@@ -60,32 +45,15 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 // XXX: offs is 8bit only
 #define emith_ctx_read(r, offs) { \
-       EMIT_OP_MODRM(0x8b, 1, r, 5); \
+       EMIT_OP_MODRM(0x8b, 1, r, xBP); \
        EMIT(offs, u8);         /* mov tmp, [ebp+#offs] */ \
 }
 
 #define emith_ctx_write(r, offs) { \
-       EMIT_OP_MODRM(0x89, 1, r, 5); \
+       EMIT_OP_MODRM(0x89, 1, r, xBP); \
        EMIT(offs, u8);         /* mov [ebp+#offs], tmp */ \
 }
 
-#define emith_ctx_sub(val, offs) { \
-       EMIT_OP_MODRM(0x81, 1, 5, 5); \
-       EMIT(offs, u8); \
-       EMIT(val, u32);         /* sub [ebp+#offs], dword val */ \
-}
-
-#define emith_test_t() { \
-       if (reg_map_g2h[SHR_SR] == -1) { \
-               EMIT_OP_MODRM(0xf6, 1, 0, 5); \
-               EMIT(SHR_SR * 4, u8); \
-               EMIT(0x01, u8); /* test [ebp+SHR_SR], byte 1 */ \
-       } else { \
-               EMIT_OP_MODRM(0xf7, 3, 0, reg_map_g2h[SHR_SR]); \
-               EMIT(0x01, u16); /* test <reg>, word 1 */ \
-       } \
-}
-
 #define emith_jump(ptr) { \
        u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \
        EMIT_OP(0xe9); \
@@ -98,33 +66,42 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
        EMIT(disp, u32); \
 }
 
-#define EMIT_CONDITIONAL(code, is_nonzero) { \
-       char *ptr = tcache_ptr; \
-       tcache_ptr = (char *)tcache_ptr + 2; \
+#define EMITH_CONDITIONAL(code, is_nonzero) { \
+       u8 *ptr = tcache_ptr; \
+       tcache_ptr = tcache_ptr + 2; \
        code; \
        EMIT_PTR(ptr, ((is_nonzero) ? 0x75 : 0x74), u8); \
-       EMIT_PTR(ptr + 1, ((char *)tcache_ptr - (ptr + 2)), u8); \
+       EMIT_PTR(ptr + 1, (tcache_ptr - (ptr + 2)), u8); \
 }
 
-static void emith_pass_arg(int count, ...)
-{
-       va_list vl;
-       int i;
-
-       va_start(vl, count);
+#define arg2reg(rd, arg) \
+       switch (arg) { \
+       case 0: rd = xAX; break; \
+       case 1: rd = xDX; break; \
+       case 2: rd = xCX; break; \
+       }
 
-       for (i = 0; i < count; i++) {
-               long av = va_arg(vl, long);
-               int r = 7;
+#define emith_pass_arg_r(arg, reg) { \
+       int rd = 7; \
+       arg2reg(rd, arg); \
+       emith_move_r_r(rd, reg); \
+}
 
-               switch (i) {
-               case 0: r = xAX; break;
-               case 1: r = xDX; break;
-               case 2: r = xCX; break;
-               }
-               emith_move_r_imm(r, av);
-       }
+#define emith_pass_arg_imm(arg, imm) { \
+       int rd = 7; \
+       arg2reg(rd, arg); \
+       emith_move_r_imm(rd, imm); \
+}
 
-       va_end(vl);
+/* SH2 drc specific */
+#define emith_test_t() { \
+       if (reg_map_g2h[SHR_SR] == -1) { \
+               EMIT_OP_MODRM(0xf6, 1, 0, 5); \
+               EMIT(SHR_SR * 4, u8); \
+               EMIT(0x01, u8); /* test [ebp+SHR_SR], byte 1 */ \
+       } else { \
+               EMIT_OP_MODRM(0xf7, 3, 0, reg_map_g2h[SHR_SR]); \
+               EMIT(0x01, u16); /* test <reg>, word 1 */ \
+       } \
 }