drc: split disassembly to separate pass

[picodrive.git] / cpu / drc / emit_x86.c

diff --git a/cpu/drc/emit_x86.c b/cpu/drc/emit_x86.c
index 2257359..f14430b 100644 (file)
--- a/cpu/drc/emit_x86.c
+++ b/cpu/drc/emit_x86.c
@@ -1,4 +1,10 @@
 /*
+ * Basic macros to emit x86 instructions and some utils
+ * Copyright (C) 2008,2009,2010 notaz
+ *
+ * This work is licensed under the terms of MAME license.
+ * See COPYING file in the top-level directory.
+ *
  * note:
  *  temp registers must be eax-edx due to use of SETcc and r/w 8/16.
  * note about silly things like emith_eor_r_r_r:
@@ -63,10 +69,10 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 #define EMIT_SIB(scale,index,base) \
        EMIT(((scale)<<6) | ((index)<<3) | (base), u8)
 
-#define EMIT_OP_MODRM(op,mod,r,rm) { \
+#define EMIT_OP_MODRM(op,mod,r,rm) do { \
        EMIT_OP(op); \
        EMIT_MODRM(mod, r, rm); \
-}
+} while (0)
 
 #define JMP8_POS(ptr) \
        ptr = tcache_ptr; \
@@ -139,6 +145,17 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 }
 
 // _r_r_r
+#define emith_add_r_r_r(d, s1, s2) { \
+       if (d == s1) { \
+               emith_add_r_r(d, s2); \
+       } else if (d == s2) { \
+               emith_add_r_r(d, s1); \
+       } else { \
+               emith_move_r_r(d, s1); \
+               emith_add_r_r(d, s2); \
+       } \
+}
+
 #define emith_eor_r_r_r(d, s1, s2) { \
        if (d == s1) { \
                emith_eor_r_r(d, s2); \
@@ -418,48 +435,43 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 
 #define is_abcdx(r) (xAX <= (r) && (r) <= xDX)
 
-#define emith_read_op_8_16(op, r, rs, offs) do { \
+#define emith_read_r_r_offs(r, rs, offs) \
+       emith_deref_op(0x8b, r, rs, offs)
+
+#define emith_write_r_r_offs(r, rs, offs) \
+       emith_deref_op(0x89, r, rs, offs)
+
+// note: don't use prefixes on this
+#define emith_read8_r_r_offs(r, rs, offs) do { \
        int r_ = r; \
        if (!is_abcdx(r)) \
                r_ = rcache_get_tmp(); \
-       emith_deref_op(op, r_, rs, offs); \
+       emith_deref_op(0x8a, r_, rs, offs); \
        if ((r) != r_) { \
                emith_move_r_r(r, r_); \
                rcache_free_tmp(r_); \
        } \
 } while (0)
 
-#define emith_write_op_8_16(op, r, rs, offs) do { \
+#define emith_write8_r_r_offs(r, rs, offs) do {\
        int r_ = r; \
        if (!is_abcdx(r)) { \
                r_ = rcache_get_tmp(); \
                emith_move_r_r(r_, r); \
        } \
-       emith_deref_op(op, r_, rs, offs); \
+       emith_deref_op(0x88, r_, rs, offs); \
        if ((r) != r_) \
                rcache_free_tmp(r_); \
 } while (0)
 
-#define emith_read_r_r_offs(r, rs, offs) \
-       emith_deref_op(0x8b, r, rs, offs)
-
-#define emith_write_r_r_offs(r, rs, offs) \
-       emith_deref_op(0x89, r, rs, offs)
-
-#define emith_read8_r_r_offs(r, rs, offs) \
-       emith_read_op_8_16(0x8a, r, rs, offs)
-
-#define emith_write8_r_r_offs(r, rs, offs) \
-       emith_write_op_8_16(0x88, r, rs, offs)
-
 #define emith_read16_r_r_offs(r, rs, offs) { \
        EMIT(0x66, u8); /* operand override */ \
-       emith_read_op_8_16(0x8b, r, rs, offs); \
+       emith_read_r_r_offs(r, rs, offs); \
 }
 
 #define emith_write16_r_r_offs(r, rs, offs) { \
        EMIT(0x66, u8); \
-       emith_read_op_8_16(0x89, r, rs, offs); \
+       emith_write_r_r_offs(r, rs, offs); \
 }
 
 #define emith_ctx_read(r, offs) \
@@ -617,14 +629,13 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
 }
 
 // assumes EBX is free temporary
-#define emith_sh2_wcall(a, tab, ret_ptr) { \
+#define emith_sh2_wcall(a, tab) { \
        int arg2_; \
        host_arg2reg(arg2_, 2); \
        emith_lsr(xBX, a, SH2_WRITE_SHIFT); \
        EMIT_OP_MODRM(0x8b, 0, xBX, 4); \
        EMIT_SIB(2, xBX, tab); /* mov ebx, [tab + ebx * 4] */ \
        emith_ctx_read(arg2_, offsetof(SH2, is_slave)); \
-       emith_push_imm((long)(ret_ptr)); \
        emith_jump_reg(xBX); \
 }