psp bugfixes, refactoring, stuff

[picodrive.git] / cpu / fame / famec_opcodes.h

diff --git a/cpu/fame/famec_opcodes.h b/cpu/fame/famec_opcodes.h
index a9cc991..eeb3c2b 100644 (file)
--- a/cpu/fame/famec_opcodes.h
+++ b/cpu/fame/famec_opcodes.h
@@ -1953,7 +1953,7 @@ OPCODE(0x0A7C)
                u32 newPC = (u32)(PC) - BasePC;
                SET_PC(newPC-2);
                execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
-               RET(4)
+               RET(0)
        }
 RET(20)
 }
@@ -5213,7 +5213,11 @@ OPCODE(0x0108)
        READ_BYTE_F(adr + 2, src)
        DREGu16((Opcode >> 9) & 7) = (res << 8) | src;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
 RET(24)
+#endif
 }
 
 // MOVEPLaD
@@ -5237,7 +5241,11 @@ OPCODE(0x0148)
        READ_BYTE_F(adr, src)
        DREG((Opcode >> 9) & 7) = res | src;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(24)
+#else
 RET(32)
+#endif
 }
 
 // MOVEPWDa
@@ -5253,7 +5261,11 @@ OPCODE(0x0188)
        WRITE_BYTE_F(adr + 0, res >> 8)
        WRITE_BYTE_F(adr + 2, res >> 0)
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
 RET(24)
+#endif
 }
 
 // MOVEPLDa
@@ -5274,7 +5286,11 @@ OPCODE(0x01C8)
        adr += 2;
        WRITE_BYTE_F(adr, res >> 0)
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(24)
+#else
 RET(32)
+#endif
 }
 
 // MOVEB
@@ -5460,6 +5476,7 @@ OPCODE(0x1F00)
 RET(8)
 }
 
+#if 0
 // MOVEB
 OPCODE(0x1008)
 {
@@ -5692,6 +5709,7 @@ OPCODE(0x1F08)
 */
 RET(8)
 }
+#endif
 
 // MOVEB
 OPCODE(0x1010)
@@ -8167,7 +8185,7 @@ OPCODE(0x2100)
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
        PRE_IO
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(12)
 }
@@ -8279,7 +8297,7 @@ OPCODE(0x2F00)
        adr = AREG(7) - 4;
        AREG(7) = adr;
        PRE_IO
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(12)
 }
@@ -8350,7 +8368,7 @@ OPCODE(0x2108)
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
        PRE_IO
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(12)
 }
@@ -8462,7 +8480,7 @@ OPCODE(0x2F08)
        adr = AREG(7) - 4;
        AREG(7) = adr;
        PRE_IO
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(12)
 }
@@ -8539,7 +8557,7 @@ OPCODE(0x2110)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(20)
 }
@@ -8657,7 +8675,7 @@ OPCODE(0x2F10)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(20)
 }
@@ -8738,7 +8756,7 @@ OPCODE(0x2118)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(20)
 }
@@ -8862,7 +8880,7 @@ OPCODE(0x2F18)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(20)
 }
@@ -8943,7 +8961,7 @@ OPCODE(0x2120)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(22)
 }
@@ -9067,7 +9085,7 @@ OPCODE(0x2F20)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(22)
 }
@@ -9148,7 +9166,7 @@ OPCODE(0x2128)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(24)
 }
@@ -9272,7 +9290,7 @@ OPCODE(0x2F28)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(24)
 }
@@ -9353,7 +9371,7 @@ OPCODE(0x2130)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(26)
 }
@@ -9477,7 +9495,7 @@ OPCODE(0x2F30)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(26)
 }
@@ -9554,7 +9572,7 @@ OPCODE(0x2138)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(24)
 }
@@ -9672,7 +9690,7 @@ OPCODE(0x2F38)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(24)
 }
@@ -9749,7 +9767,7 @@ OPCODE(0x2139)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(28)
 }
@@ -9867,7 +9885,7 @@ OPCODE(0x2F39)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(28)
 }
@@ -9948,7 +9966,7 @@ OPCODE(0x213A)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(24)
 }
@@ -10072,7 +10090,7 @@ OPCODE(0x2F3A)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(24)
 }
@@ -10153,7 +10171,7 @@ OPCODE(0x213B)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(26)
 }
@@ -10277,7 +10295,7 @@ OPCODE(0x2F3B)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(26)
 }
@@ -10348,7 +10366,7 @@ OPCODE(0x213C)
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
        PRE_IO
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(20)
 }
@@ -10460,7 +10478,7 @@ OPCODE(0x2F3C)
        adr = AREG(7) - 4;
        AREG(7) = adr;
        PRE_IO
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(20)
 }
@@ -10541,7 +10559,7 @@ OPCODE(0x211F)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(20)
 }
@@ -10665,7 +10683,7 @@ OPCODE(0x2F1F)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(20)
 }
@@ -10746,7 +10764,7 @@ OPCODE(0x2127)
        flag_N = res >> 24;
        adr = AREG((Opcode >> 9) & 7) - 4;
        AREG((Opcode >> 9) & 7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(22)
 }
@@ -10870,7 +10888,7 @@ OPCODE(0x2F27)
        flag_N = res >> 24;
        adr = AREG(7) - 4;
        AREG(7) = adr;
-       WRITE_LONG_F(adr, res)
+       WRITE_LONG_DEC_F(adr, res)
        POST_IO
 RET(22)
 }
@@ -18458,7 +18476,7 @@ OPCODE(0x4AFC)
        u32 oldPC=GET_PC;
        SET_PC(oldPC-2)
        execute_exception(M68K_ILLEGAL_INSTRUCTION_EX);
-RET(4)
+RET(0)
 }
 
 // ILLEGAL A000-AFFF
@@ -18467,7 +18485,7 @@ OPCODE(0xA000)
        u32 oldPC=GET_PC;
        SET_PC(oldPC-2)
        execute_exception(M68K_1010_EX);
-RET(4)
+RET(0)
 }
 
 // ILLEGAL F000-FFFF
@@ -18476,7 +18494,7 @@ OPCODE(0xF000)
        u32 oldPC=GET_PC;
        SET_PC(oldPC-2)
        execute_exception(M68K_1111_EX);
-RET(4)
+RET(0) // 4 already taken by exc. handler
 }
 
 // MOVEMaR
@@ -19183,7 +19201,7 @@ OPCODE(0x4E72)
                AREG(7) = ASP;
                ASP = res;
        }
-       m68kcontext.execinfo |= M68K_HALTED;
+       m68kcontext.execinfo |= FM68K_HALTED;
        m68kcontext.io_cycle_counter = 0;
 RET(4)
 }
@@ -19213,7 +19231,7 @@ OPCODE(0x4E73)
                ASP = res;
        }
        POST_IO
-       m68kcontext.execinfo &= ~(M68K_EMULATE_GROUP_0|M68K_EMULATE_TRACE|M68K_DO_TRACE);
+       m68kcontext.execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE);
        CHECK_INT_TO_JUMP(20)
 RET(20)
 }
@@ -23892,7 +23910,7 @@ OPCODE(0x5048)
        dst = AREGu32((Opcode >> 0) & 7);
        res = dst + src;
        AREG((Opcode >> 0) & 7) = res;
-#ifdef USE_CYCLONE_TIMING_ // breaks Project-X
+#ifdef USE_CYCLONE_TIMING
 RET(4)
 #else
 RET(8)
@@ -27595,7 +27613,7 @@ OPCODE(0x81C0)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81C0;
 #endif
                RET(10)
        }
@@ -27607,7 +27625,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81C0;
 #endif
        RET(50)
        }
@@ -27621,7 +27639,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81C0;
 #endif
        RET(80)
                }
@@ -27633,7 +27651,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81C0: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(108)
 }
@@ -27651,7 +27669,7 @@ OPCODE(0x81D0)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81D0;
 #endif
                RET(14)
        }
@@ -27663,7 +27681,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81D0;
 #endif
        RET(54)
        }
@@ -27677,7 +27695,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81D0;
 #endif
        RET(84)
                }
@@ -27689,7 +27707,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81D0: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(112)
 }
@@ -27708,7 +27726,7 @@ OPCODE(0x81D8)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81D8;
 #endif
                RET(14)
        }
@@ -27720,7 +27738,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81D8;
 #endif
        RET(54)
        }
@@ -27734,7 +27752,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81D8;
 #endif
        RET(84)
                }
@@ -27746,7 +27764,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81D8: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(112)
 }
@@ -27765,7 +27783,7 @@ OPCODE(0x81E0)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E0;
 #endif
                RET(16)
        }
@@ -27777,7 +27795,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E0;
 #endif
        RET(56)
        }
@@ -27791,7 +27809,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E0;
 #endif
        RET(86)
                }
@@ -27803,7 +27821,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81E0: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(114)
 }
@@ -27822,7 +27840,7 @@ OPCODE(0x81E8)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E8;
 #endif
                RET(18)
        }
@@ -27834,7 +27852,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E8;
 #endif
        RET(58)
        }
@@ -27848,7 +27866,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E8;
 #endif
        RET(88)
                }
@@ -27860,7 +27878,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81E8: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(116)
 }
@@ -27879,7 +27897,7 @@ OPCODE(0x81F0)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F0;
 #endif
                RET(20)
        }
@@ -27891,7 +27909,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F0;
 #endif
        RET(60)
        }
@@ -27905,7 +27923,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F0;
 #endif
        RET(90)
                }
@@ -27917,7 +27935,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81F0: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(118)
 }
@@ -27935,7 +27953,7 @@ OPCODE(0x81F8)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F8;
 #endif
                RET(18)
        }
@@ -27947,7 +27965,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F8;
 #endif
        RET(58)
        }
@@ -27961,7 +27979,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F8;
 #endif
        RET(88)
                }
@@ -27973,7 +27991,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81F8: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(116)
 }
@@ -27991,7 +28009,7 @@ OPCODE(0x81F9)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F9;
 #endif
                RET(22)
        }
@@ -28003,7 +28021,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F9;
 #endif
        RET(62)
        }
@@ -28017,7 +28035,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81F9;
 #endif
        RET(92)
                }
@@ -28029,7 +28047,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81F9: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(120)
 }
@@ -28048,7 +28066,7 @@ OPCODE(0x81FA)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FA;
 #endif
                RET(18)
        }
@@ -28060,7 +28078,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FA;
 #endif
        RET(58)
        }
@@ -28074,7 +28092,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FA;
 #endif
        RET(88)
                }
@@ -28086,7 +28104,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81FA: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(116)
 }
@@ -28105,7 +28123,7 @@ OPCODE(0x81FB)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FB;
 #endif
                RET(20)
        }
@@ -28117,7 +28135,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FB;
 #endif
        RET(60)
        }
@@ -28131,7 +28149,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FB;
 #endif
        RET(90)
                }
@@ -28143,7 +28161,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81FB: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(118)
 }
@@ -28159,7 +28177,7 @@ OPCODE(0x81FC)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FC;
 #endif
                RET(14)
        }
@@ -28171,7 +28189,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FC;
 #endif
        RET(54)
        }
@@ -28185,7 +28203,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81FC;
 #endif
        RET(84)
                }
@@ -28197,7 +28215,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81FC: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(112)
 }
@@ -28216,7 +28234,7 @@ OPCODE(0x81DF)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81DF;
 #endif
                RET(14)
        }
@@ -28228,7 +28246,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81DF;
 #endif
        RET(54)
        }
@@ -28242,7 +28260,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81DF;
 #endif
        RET(84)
                }
@@ -28254,7 +28272,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81DF: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(112)
 }
@@ -28273,7 +28291,7 @@ OPCODE(0x81E7)
        {
                execute_exception(M68K_ZERO_DIVIDE_EX);
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E7;
 #endif
                RET(16)
        }
@@ -28285,7 +28303,7 @@ goto end;
                res = 0;
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E7;
 #endif
        RET(56)
        }
@@ -28299,7 +28317,7 @@ goto end;
                {
                        flag_V = M68K_SR_V;
 #ifdef USE_CYCLONE_TIMING_DIV
-goto end;
+goto end81E7;
 #endif
        RET(86)
                }
@@ -28311,7 +28329,7 @@ goto end;
        DREGu32((Opcode >> 9) & 7) = res;
        }
 #ifdef USE_CYCLONE_TIMING_DIV
-end:   m68kcontext.io_cycle_counter -= 50;
+end81E7: m68kcontext.io_cycle_counter -= 50;
 #endif
 RET(114)
 }
@@ -28333,6 +28351,7 @@ RET(4)
 }
 
 // SUBaD
+#if 0
 OPCODE(0x9008)
 {
        u32 adr, res;
@@ -28352,6 +28371,7 @@ OPCODE(0x9008)
 */
 RET(4)
 }
+#endif
 
 // SUBaD
 OPCODE(0x9010)
@@ -30026,7 +30046,11 @@ OPCODE(0x90D0)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
 RET(10)
+#endif
 }
 
 // SUBA
@@ -30043,7 +30067,11 @@ OPCODE(0x90D8)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
 RET(10)
+#endif
 }
 
 // SUBA
@@ -30060,7 +30088,11 @@ OPCODE(0x90E0)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
 RET(12)
+#endif
 }
 
 // SUBA
@@ -30077,7 +30109,11 @@ OPCODE(0x90E8)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
 RET(14)
+#endif
 }
 
 // SUBA
@@ -30094,7 +30130,11 @@ OPCODE(0x90F0)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
 RET(16)
+#endif
 }
 
 // SUBA
@@ -30110,7 +30150,11 @@ OPCODE(0x90F8)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
 RET(14)
+#endif
 }
 
 // SUBA
@@ -30126,7 +30170,11 @@ OPCODE(0x90F9)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(20)
+#else
 RET(18)
+#endif
 }
 
 // SUBA
@@ -30143,7 +30191,11 @@ OPCODE(0x90FA)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
 RET(14)
+#endif
 }
 
 // SUBA
@@ -30160,7 +30212,11 @@ OPCODE(0x90FB)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
 RET(16)
+#endif
 }
 
 // SUBA
@@ -30190,7 +30246,11 @@ OPCODE(0x90DF)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
 RET(10)
+#endif
 }
 
 // SUBA
@@ -30207,7 +30267,11 @@ OPCODE(0x90E7)
        res = dst - src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
 RET(12)
+#endif
 }
 
 // SUBA
@@ -30461,6 +30525,7 @@ RET(4)
 }
 
 // CMP
+#if 0
 OPCODE(0xB008)
 {
        u32 adr, res;
@@ -30479,6 +30544,7 @@ OPCODE(0xB008)
 */
 RET(4)
 }
+#endif
 
 // CMP
 OPCODE(0xB010)
@@ -34756,6 +34822,7 @@ RET(4)
 }
 
 // ADDaD
+#if 0
 OPCODE(0xD008)
 {
        u32 adr, res;
@@ -34775,6 +34842,7 @@ OPCODE(0xD008)
 */
 RET(4)
 }
+#endif
 
 // ADDaD
 OPCODE(0xD010)
@@ -36449,7 +36517,11 @@ OPCODE(0xD0D0)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
 RET(10)
+#endif
 }
 
 // ADDA
@@ -36466,7 +36538,11 @@ OPCODE(0xD0D8)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
 RET(10)
+#endif
 }
 
 // ADDA
@@ -36483,7 +36559,11 @@ OPCODE(0xD0E0)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
 RET(12)
+#endif
 }
 
 // ADDA
@@ -36500,7 +36580,11 @@ OPCODE(0xD0E8)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
 RET(14)
+#endif
 }
 
 // ADDA
@@ -36517,7 +36601,11 @@ OPCODE(0xD0F0)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
 RET(16)
+#endif
 }
 
 // ADDA
@@ -36533,7 +36621,11 @@ OPCODE(0xD0F8)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
 RET(14)
+#endif
 }
 
 // ADDA
@@ -36549,7 +36641,11 @@ OPCODE(0xD0F9)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(20)
+#else
 RET(18)
+#endif
 }
 
 // ADDA
@@ -36566,7 +36662,11 @@ OPCODE(0xD0FA)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
 RET(14)
+#endif
 }
 
 // ADDA
@@ -36583,7 +36683,11 @@ OPCODE(0xD0FB)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
 RET(16)
+#endif
 }
 
 // ADDA
@@ -36613,7 +36717,11 @@ OPCODE(0xD0DF)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
 RET(10)
+#endif
 }
 
 // ADDA
@@ -36630,7 +36738,11 @@ OPCODE(0xD0E7)
        res = dst + src;
        AREG((Opcode >> 9) & 7) = res;
        POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
 RET(12)
+#endif
 }
 
 // ADDA