/*
* SH2 recompiler
- * (C) notaz, 2009,2010
+ * (C) notaz, 2009,2010,2013
*
* This work is licensed under the terms of MAME license.
* See COPYING file in the top-level directory.
* failure, followed by full tcache invalidation for that region
* - jumps between blocks are tracked for SMC handling (in block_links[]),
* except jumps between different tcaches
- * - non-main block entries are called subblocks, as they have same tracking
- * structures that main blocks have.
*
* implemented:
* - static register allocation
#define LINK_BRANCHES 1
// limits (per block)
-#define BLOCK_CYCLE_LIMIT 100
-#define MAX_BLOCK_SIZE (BLOCK_CYCLE_LIMIT * 6 * 6)
+#define MAX_BLOCK_SIZE (BLOCK_INSN_LIMIT * 6 * 6)
// max literal offset from the block end
#define MAX_LITERAL_OFFSET 32*2
-#define MAX_LITERALS (BLOCK_CYCLE_LIMIT / 4)
+#define MAX_LITERALS (BLOCK_INSN_LIMIT / 4)
#define MAX_LOCAL_BRANCHES 32
-// debug stuff {
+///
+#define FETCH_OP(pc) \
+ dr_pc_base[(pc) / 2]
+
+#define FETCH32(a) \
+ ((dr_pc_base[(a) / 2] << 16) | dr_pc_base[(a) / 2 + 1])
+
+#ifdef DRC_SH2
+
+// debug stuff
+// 1 - warnings/errors
+// 2 - block info/smc
+// 4 - asm
+// 8 - runtime block entry log
+// {
#ifndef DRC_DEBUG
#define DRC_DEBUG 0
#endif
}
#include "mame/sh2dasm.h"
-#include <platform/linux/host_dasm.h>
+#include <platform/libpicofe/linux/host_dasm.h>
static int insns_compiled, hash_collisions, host_insn_count;
#define COUNT_OP \
host_insn_count++
// and can be discarded early
// XXX: need to tune sizes
static const int tcache_sizes[TCACHE_BUFFERS] = {
- DRC_TCACHE_SIZE * 6 / 8, // ROM, DRAM
+ DRC_TCACHE_SIZE * 6 / 8, // ROM (rarely used), DRAM
DRC_TCACHE_SIZE / 8, // BIOS, data array in master sh2
DRC_TCACHE_SIZE / 8, // ... slave
};
// ptr for code emiters
static u8 *tcache_ptr;
-typedef struct block_desc_ {
- u32 addr; // SH2 PC address
+#define MAX_BLOCK_ENTRIES (BLOCK_INSN_LIMIT / 8)
+
+struct block_entry {
+ u32 pc;
void *tcache_ptr; // translated block for above PC
- struct block_desc_ *next; // next block with the same PC hash
+ struct block_entry *next; // next block in hash_table with same pc hash
+#if (DRC_DEBUG & 2)
+ struct block_desc *block;
+#endif
+};
+
+struct block_desc {
+ u32 addr; // block start SH2 PC address
+ u32 end_addr; // address after last op or literal
#if (DRC_DEBUG & 2)
int refcount;
#endif
-} block_desc;
+ int entry_count;
+ struct block_entry entryp[MAX_BLOCK_ENTRIES];
+};
-typedef struct block_link_ {
+struct block_link {
u32 target_pc;
void *jump; // insn address
// struct block_link_ *next;
-} block_link;
+};
static const int block_max_counts[TCACHE_BUFFERS] = {
4*1024,
256,
256,
};
-static block_desc *block_tables[TCACHE_BUFFERS];
-static block_link *block_links[TCACHE_BUFFERS];
+static struct block_desc *block_tables[TCACHE_BUFFERS];
static int block_counts[TCACHE_BUFFERS];
+
+static const int block_link_max_counts[TCACHE_BUFFERS] = {
+ 4*1024,
+ 256,
+ 256,
+};
+static struct block_link *block_links[TCACHE_BUFFERS];
static int block_link_counts[TCACHE_BUFFERS];
+// used for invalidation
+static const int ram_sizes[TCACHE_BUFFERS] = {
+ 0x40000,
+ 0x1000,
+ 0x1000,
+};
+#define ADDR_TO_BLOCK_PAGE 0x100
+
+struct block_list {
+ struct block_desc *block;
+ struct block_list *next;
+};
+
+// array of pointers to block_lists for RAM and 2 data arrays
+// each array has len: sizeof(mem) / ADDR_TO_BLOCK_PAGE
+static struct block_list **inval_lookup[TCACHE_BUFFERS];
+
+static const int hash_table_sizes[TCACHE_BUFFERS] = {
+ 0x1000,
+ 0x100,
+ 0x100,
+};
+static struct block_entry **hash_tables[TCACHE_BUFFERS];
+
+#define HASH_FUNC(hash_tab, addr, mask) \
+ (hash_tab)[(((addr) >> 20) ^ ((addr) >> 2)) & (mask)]
+
// host register tracking
enum {
HR_FREE,
// note: reg_temp[] must have at least the amount of
// registers used by handlers in worst case (currently 4)
-#ifdef ARM
+#ifdef __arm__
#include "../drc/emit_arm.c"
static const int reg_map_g2h[] = {
4, 5, 6, 7,
8, -1, -1, -1,
-1, -1, -1, -1,
- -1, -1, -1, 9,
- -1, -1, -1, 10,
- -1, -1, -1, -1,
+ -1, -1, -1, 9, // r12 .. sp
+ -1, -1, -1, 10, // SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
+ -1, -1, -1, -1, // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
};
static temp_reg_t reg_temp[] = {
#define Q_SHIFT 8
#define M_SHIFT 9
-// ROM hash table
-#define MAX_HASH_ENTRIES 1024
-#define HASH_MASK (MAX_HASH_ENTRIES - 1)
-static void **hash_table;
-
-#define HASH_FUNC(hash_tab, addr) \
- ((block_desc **)(hash_tab))[(addr) & HASH_MASK]
-
static void REGPARM(1) (*sh2_drc_entry)(SH2 *sh2);
static void (*sh2_drc_dispatcher)(void);
static void (*sh2_drc_exit)(void);
static void REGPARM(2) (*sh2_drc_write16_slot)(u32 a, u32 d);
static int REGPARM(3) (*sh2_drc_write32)(u32 a, u32 d, SH2 *sh2);
-extern void REGPARM(2) sh2_do_op(SH2 *sh2, int opcode);
-
// address space stuff
-static void *dr_get_pc_base(u32 pc, int is_slave)
-{
- void *ret = NULL;
- u32 mask = 0;
-
- if ((pc & ~0x7ff) == 0) {
- // BIOS
- ret = is_slave ? Pico32xMem->sh2_rom_s : Pico32xMem->sh2_rom_m;
- mask = 0x7ff;
- }
- else if ((pc & 0xfffff000) == 0xc0000000) {
- // data array
- ret = Pico32xMem->data_array[is_slave];
- mask = 0xfff;
- }
- else if ((pc & 0xc6000000) == 0x06000000) {
- // SDRAM
- ret = Pico32xMem->sdram;
- mask = 0x03ffff;
- }
- else if ((pc & 0xc6000000) == 0x02000000) {
- // ROM
- ret = Pico.rom;
- mask = 0x3fffff;
- }
-
- if (ret == NULL)
- return (void *)-1; // NULL is valid value
-
- return (char *)ret - (pc & ~mask);
-}
-
static int dr_ctx_get_mem_ptr(u32 a, u32 *mask)
{
int poffs = -1;
return poffs;
}
-static block_desc *dr_get_bd(u32 pc, int is_slave, int *tcache_id)
+static struct block_entry *dr_get_entry(u32 pc, int is_slave, int *tcache_id)
{
- *tcache_id = 0;
+ struct block_entry *be;
+ u32 tcid = 0, mask;
- // we have full block id tables for data_array and RAM
- // BIOS goes to data_array table too
- if ((pc & 0xe0000000) == 0xc0000000 || (pc & ~0xfff) == 0) {
- int blkid = Pico32xMem->drcblk_da[is_slave][(pc & 0xfff) >> SH2_DRCBLK_DA_SHIFT];
- *tcache_id = 1 + is_slave;
- if (blkid & 1)
- return &block_tables[*tcache_id][blkid >> 1];
- }
- // RAM
- else if ((pc & 0xc6000000) == 0x06000000) {
- int blkid = Pico32xMem->drcblk_ram[(pc & 0x3ffff) >> SH2_DRCBLK_RAM_SHIFT];
- if (blkid & 1)
- return &block_tables[0][blkid >> 1];
- }
- // ROM
- else if ((pc & 0xc6000000) == 0x02000000) {
- block_desc *bd = HASH_FUNC(hash_table, pc);
+ // data arrays have their own caches
+ if ((pc & 0xe0000000) == 0xc0000000 || (pc & ~0xfff) == 0)
+ tcid = 1 + is_slave;
- for (; bd != NULL; bd = bd->next)
- if (bd->addr == pc)
- return bd;
- }
+ *tcache_id = tcid;
+
+ mask = hash_table_sizes[tcid] - 1;
+ be = HASH_FUNC(hash_tables[tcid], pc, mask);
+ for (; be != NULL; be = be->next)
+ if (be->pc == pc)
+ return be;
return NULL;
}
// ---------------------------------------------------------------
// block management
+static void add_to_block_list(struct block_list **blist, struct block_desc *block)
+{
+ struct block_list *added = malloc(sizeof(*added));
+ if (!added) {
+ elprintf(EL_ANOMALY, "drc OOM (1)");
+ return;
+ }
+ added->block = block;
+ added->next = *blist;
+ *blist = added;
+}
+
+static void rm_from_block_list(struct block_list **blist, struct block_desc *block)
+{
+ struct block_list *prev = NULL, *current = *blist;
+ for (; current != NULL; prev = current, current = current->next) {
+ if (current->block == block) {
+ if (prev == NULL)
+ *blist = current->next;
+ else
+ prev->next = current->next;
+ free(current);
+ return;
+ }
+ }
+ dbg(1, "can't rm block %p (%08x-%08x)",
+ block, block->addr, block->end_addr);
+}
+
+static void rm_block_list(struct block_list **blist)
+{
+ struct block_list *tmp, *current = *blist;
+ while (current != NULL) {
+ tmp = current;
+ current = current->next;
+ free(tmp);
+ }
+ *blist = NULL;
+}
+
static void REGPARM(1) flush_tcache(int tcid)
{
+ int i;
+
dbg(1, "tcache #%d flush! (%d/%d, bds %d/%d)", tcid,
tcache_ptrs[tcid] - tcache_bases[tcid], tcache_sizes[tcid],
block_counts[tcid], block_max_counts[tcid]);
block_counts[tcid] = 0;
block_link_counts[tcid] = 0;
+ memset(hash_tables[tcid], 0, sizeof(*hash_tables[0]) * hash_table_sizes[tcid]);
tcache_ptrs[tcid] = tcache_bases[tcid];
- if (tcid == 0) { // ROM, RAM
- memset(hash_table, 0, sizeof(hash_table[0]) * MAX_HASH_ENTRIES);
- memset(Pico32xMem->drcblk_ram, 0, sizeof(Pico32xMem->drcblk_ram));
+ if (Pico32xMem != NULL) {
+ if (tcid == 0) // ROM, RAM
+ memset(Pico32xMem->drcblk_ram, 0,
+ sizeof(Pico32xMem->drcblk_ram));
+ else
+ memset(Pico32xMem->drcblk_da[tcid - 1], 0,
+ sizeof(Pico32xMem->drcblk_da[0]));
}
- else
- memset(Pico32xMem->drcblk_da[tcid - 1], 0, sizeof(Pico32xMem->drcblk_da[0]));
#if (DRC_DEBUG & 4)
tcache_dsm_ptrs[tcid] = tcache_bases[tcid];
#endif
+
+ for (i = 0; i < ram_sizes[tcid] / ADDR_TO_BLOCK_PAGE; i++)
+ rm_block_list(&inval_lookup[tcid][i]);
}
#if LINK_BRANCHES
// add block links (tracked branches)
static int dr_add_block_link(u32 target_pc, void *jump, int tcache_id)
{
- block_link *bl = block_links[tcache_id];
+ struct block_link *bl = block_links[tcache_id];
int cnt = block_link_counts[tcache_id];
- if (cnt >= block_max_counts[tcache_id] * 2) {
+ if (cnt >= block_link_max_counts[tcache_id]) {
dbg(1, "bl overflow for tcache %d\n", tcache_id);
return -1;
}
}
#endif
-static block_desc *dr_add_block(u32 addr, int is_slave, int *blk_id)
+static void add_to_hashlist(struct block_entry *be, int tcache_id)
+{
+ u32 tcmask = hash_table_sizes[tcache_id] - 1;
+
+ be->next = HASH_FUNC(hash_tables[tcache_id], be->pc, tcmask);
+ HASH_FUNC(hash_tables[tcache_id], be->pc, tcmask) = be;
+
+#if (DRC_DEBUG & 2)
+ if (be->next != NULL) {
+ printf(" %08x: hash collision with %08x\n",
+ be->pc, be->next->pc);
+ hash_collisions++;
+ }
+#endif
+}
+
+static void rm_from_hashlist(struct block_entry *be, int tcache_id)
{
- block_desc *bd;
+ u32 tcmask = hash_table_sizes[tcache_id] - 1;
+ struct block_entry *cur, *prev;
+
+ cur = HASH_FUNC(hash_tables[tcache_id], be->pc, tcmask);
+ if (cur == NULL)
+ goto missing;
+
+ if (be == cur) { // first
+ HASH_FUNC(hash_tables[tcache_id], be->pc, tcmask) = be->next;
+ return;
+ }
+
+ for (prev = cur, cur = cur->next; cur != NULL; cur = cur->next) {
+ if (cur == be) {
+ prev->next = cur->next;
+ return;
+ }
+ }
+
+missing:
+ dbg(1, "rm_from_hashlist: be %p %08x missing?", be, be->pc);
+}
+
+static struct block_desc *dr_add_block(u32 addr, u32 end_addr, int is_slave, int *blk_id)
+{
+ struct block_entry *be;
+ struct block_desc *bd;
int tcache_id;
int *bcount;
- bd = dr_get_bd(addr, is_slave, &tcache_id);
- if (bd != NULL) {
- dbg(2, "block override for %08x", addr);
- bd->tcache_ptr = tcache_ptr;
- *blk_id = bd - block_tables[tcache_id];
- return bd;
- }
+ // do a lookup to get tcache_id and override check
+ be = dr_get_entry(addr, is_slave, &tcache_id);
+ if (be != NULL)
+ dbg(1, "block override for %08x", addr);
bcount = &block_counts[tcache_id];
if (*bcount >= block_max_counts[tcache_id]) {
dbg(1, "bd overflow for tcache %d", tcache_id);
return NULL;
}
- if (*bcount == 0)
- (*bcount)++; // not using descriptor 0
bd = &block_tables[tcache_id][*bcount];
bd->addr = addr;
- bd->tcache_ptr = tcache_ptr;
- *blk_id = *bcount;
- (*bcount)++;
+ bd->end_addr = end_addr;
- if ((addr & 0xc6000000) == 0x02000000) { // ROM
- bd->next = HASH_FUNC(hash_table, addr);
- HASH_FUNC(hash_table, addr) = bd;
+ bd->entry_count = 1;
+ bd->entryp[0].pc = addr;
+ bd->entryp[0].tcache_ptr = tcache_ptr;
#if (DRC_DEBUG & 2)
- if (bd->next != NULL) {
- printf(" hash collision with %08x\n", bd->next->addr);
- hash_collisions++;
- }
+ bd->entryp[0].block = bd;
+ bd->refcount = 0;
#endif
- }
+ add_to_hashlist(&bd->entryp[0], tcache_id);
+
+ *blk_id = *bcount;
+ (*bcount)++;
return bd;
}
static void REGPARM(3) *dr_lookup_block(u32 pc, int is_slave, int *tcache_id)
{
- block_desc *bd = NULL;
+ struct block_entry *be = NULL;
void *block = NULL;
- bd = dr_get_bd(pc, is_slave, tcache_id);
- if (bd != NULL)
- block = bd->tcache_ptr;
+ be = dr_get_entry(pc, is_slave, tcache_id);
+ if (be != NULL)
+ block = be->tcache_ptr;
#if (DRC_DEBUG & 2)
- if (bd != NULL)
- bd->refcount++;
+ if (be != NULL)
+ be->block->refcount++;
#endif
return block;
}
+static void *dr_failure(void)
+{
+ lprintf("recompilation failed\n");
+ exit(1);
+}
+
static void *dr_prepare_ext_branch(u32 pc, SH2 *sh2, int tcache_id)
{
#if LINK_BRANCHES
static void dr_link_blocks(void *target, u32 pc, int tcache_id)
{
-#if LINK_BRANCHES
- block_link *bl = block_links[tcache_id];
+#if 0 // FIXME: invalidated blocks must not be in block_links
+//LINK_BRANCHES
+ struct block_link *bl = block_links[tcache_id];
int cnt = block_link_counts[tcache_id];
int i;
}
}
rcache_invalidate();
+
+ if (reg_map_g2h[SHR_SR] != -1)
+ emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4);
+
// assuming arg0 and retval reg matches
return rcache_get_tmp_arg(0);
}
{
int ctxr;
host_arg2reg(ctxr, 2);
+ if (reg_map_g2h[SHR_SR] != -1)
+ emith_ctx_write(reg_map_g2h[SHR_SR], SHR_SR * 4);
+
switch (size) {
case 0: // 8
// XXX: consider inlining sh2_drc_write8
emith_call(sh2_drc_write32);
break;
}
+
+ if (reg_map_g2h[SHR_SR] != -1)
+ emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4);
rcache_invalidate();
}
static void emit_block_entry(void)
{
- int arg0, arg1, arg2;
+ int arg0;
host_arg2reg(arg0, 0);
+
+#if (DRC_DEBUG & 8) || defined(PDB)
+ int arg1, arg2;
host_arg2reg(arg1, 1);
host_arg2reg(arg2, 2);
-#if (DRC_DEBUG & 8) || defined(PDB)
emit_do_static_regs(1, arg2);
emith_move_r_r(arg1, CONTEXT_REG);
emith_move_r_r(arg2, rcache_get_reg(SHR_SR, RC_GR_READ));
goto default_; \
}
-#define FETCH_OP(pc) \
- dr_pc_base[(pc) / 2]
-
-#define FETCH32(a) \
- ((dr_pc_base[(a) / 2] << 16) | dr_pc_base[(a) / 2 + 1])
-
#define GET_Fx() \
((op >> 4) & 0x0f)
if (GET_Fx() >= n) \
goto default_
-// op_flags: data from 1st pass
-#define OP_FLAGS(pc) op_flags[((pc) - base_pc) / 2]
-#define OF_DELAY_OP (1 << 0)
+static void *dr_get_pc_base(u32 pc, int is_slave);
static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
{
// XXX: maybe use structs instead?
u32 branch_target_pc[MAX_LOCAL_BRANCHES];
void *branch_target_ptr[MAX_LOCAL_BRANCHES];
- int branch_target_blkid[MAX_LOCAL_BRANCHES];
int branch_target_count = 0;
void *branch_patch_ptr[MAX_LOCAL_BRANCHES];
u32 branch_patch_pc[MAX_LOCAL_BRANCHES];
int literal_addr_count = 0;
int pending_branch_cond = -1;
int pending_branch_pc = 0;
- u8 op_flags[BLOCK_CYCLE_LIMIT + 1];
+ u8 op_flags[BLOCK_INSN_LIMIT];
struct {
u32 delayed_op:2;
u32 test_irq:1;
// PC of current, first, last, last_target_blk SH2 insn
u32 pc, base_pc, end_pc, out_pc;
- void *block_entry;
- block_desc *this_block;
+ void *block_entry_ptr;
+ struct block_desc *block;
u16 *dr_pc_base;
int blkid_main = 0;
int skip_op = 0;
u32 tmp, tmp2;
int cycles;
+ int i, v;
int op;
- int i;
base_pc = sh2->pc;
}
tcache_ptr = tcache_ptrs[tcache_id];
- this_block = dr_add_block(base_pc, sh2->is_slave, &blkid_main);
- if (this_block == NULL)
- return NULL;
// predict tcache overflow
tmp = tcache_ptr - tcache_bases[tcache_id];
return NULL;
}
- block_entry = tcache_ptr;
- dbg(2, "== %csh2 block #%d,%d %08x -> %p", sh2->is_slave ? 's' : 'm',
- tcache_id, blkid_main, base_pc, block_entry);
+ // 1st pass: scan forward for local branches
+ scan_block(base_pc, sh2->is_slave, op_flags, &end_pc);
+
+ block = dr_add_block(base_pc, end_pc + MAX_LITERAL_OFFSET, // XXX
+ sh2->is_slave, &blkid_main);
+ if (block == NULL)
+ return NULL;
+
+ block_entry_ptr = tcache_ptr;
+ dbg(2, "== %csh2 block #%d,%d %08x-%08x -> %p", sh2->is_slave ? 's' : 'm',
+ tcache_id, blkid_main, base_pc, end_pc, block_entry_ptr);
dr_link_blocks(tcache_ptr, base_pc, tcache_id);
- // 1st pass: scan forward for local branches
- memset(op_flags, 0, sizeof(op_flags));
- for (cycles = 0, pc = base_pc; cycles < BLOCK_CYCLE_LIMIT; cycles++, pc += 2) {
- op = FETCH_OP(pc);
- if ((op & 0xf000) == 0xa000 || (op & 0xf000) == 0xb000) { // BRA, BSR
- signed int offs = ((signed int)(op << 20) >> 19);
- pc += 2;
- OP_FLAGS(pc) |= OF_DELAY_OP;
- ADD_TO_ARRAY(branch_target_pc, branch_target_count, pc + offs + 2,);
- break;
- }
- if ((op & 0xf000) == 0) {
- op &= 0xff;
- if (op == 0x1b) // SLEEP
- break;
- if (op == 0x23 || op == 0x03 || op == 0x0b || op == 0x2b) { // BRAF, BSRF, RTS, RTE
- pc += 2;
- OP_FLAGS(pc) |= OF_DELAY_OP;
- break;
- }
+ // collect branch_targets that don't land on delay slots
+ for (pc = base_pc; pc < end_pc; pc += 2) {
+ if (!(OP_FLAGS(pc) & OF_BTARGET))
+ continue;
+ if (OP_FLAGS(pc) & OF_DELAY_OP) {
+ OP_FLAGS(pc) &= ~OF_BTARGET;
continue;
}
- if ((op & 0xf0df) == 0x400b) { // JMP, JSR
- pc += 2;
- OP_FLAGS(pc) |= OF_DELAY_OP;
- break;
- }
- if ((op & 0xf900) == 0x8900) { // BT(S), BF(S)
- signed int offs = ((signed int)(op << 24) >> 23);
- if (op & 0x0400)
- OP_FLAGS(pc + 2) |= OF_DELAY_OP;
- ADD_TO_ARRAY(branch_target_pc, branch_target_count, pc + offs + 4, break);
- }
- if ((op & 0xff00) == 0xc300) // TRAPA
- break;
+ ADD_TO_ARRAY(branch_target_pc, branch_target_count, pc, break);
}
- end_pc = pc;
-
- // clean branch_targets that are not really local,
- // and that land on delay slots
- for (i = 0, tmp = 0; i < branch_target_count; i++) {
- pc = branch_target_pc[i];
- if (base_pc <= pc && pc <= end_pc && !(OP_FLAGS(pc) & OF_DELAY_OP))
- branch_target_pc[tmp++] = branch_target_pc[i];
+ if (branch_target_count > 0) {
+ memset(branch_target_ptr, 0, sizeof(branch_target_ptr[0]) * branch_target_count);
}
- branch_target_count = tmp;
- memset(branch_target_ptr, 0, sizeof(branch_target_ptr[0]) * branch_target_count);
- memset(branch_target_blkid, 0, sizeof(branch_target_blkid[0]) * branch_target_count);
// -------------------------------------------------
// 2nd pass: actual compilation
op = FETCH_OP(pc);
- i = find_in_array(branch_target_pc, branch_target_count, pc);
- if (i >= 0 || pc == base_pc)
+ if ((OP_FLAGS(pc) & OF_BTARGET) || pc == base_pc)
{
+ i = find_in_array(branch_target_pc, branch_target_count, pc);
if (pc != base_pc)
{
- /* make "subblock" - just a mid-block entry */
- block_desc *subblock;
+ // make block entry
sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
FLUSH_CYCLES(sr);
rcache_flush();
do_host_disasm(tcache_id);
- dbg(2, "-- %csh2 subblock #%d,%d %08x -> %p", sh2->is_slave ? 's' : 'm',
- tcache_id, branch_target_blkid[i], pc, tcache_ptr);
+ v = block->entry_count;
+ if (v < ARRAY_SIZE(block->entryp)) {
+ block->entryp[v].pc = pc;
+ block->entryp[v].tcache_ptr = tcache_ptr;
+#if (DRC_DEBUG & 2)
+ block->entryp[v].block = block;
+#endif
+ add_to_hashlist(&block->entryp[v], tcache_id);
+ block->entry_count++;
- subblock = dr_add_block(pc, sh2->is_slave, &branch_target_blkid[i]);
- if (subblock == NULL)
- return NULL;
+ dbg(2, "-- %csh2 block #%d,%d entry %08x -> %p", sh2->is_slave ? 's' : 'm',
+ tcache_id, blkid_main, pc, tcache_ptr);
- // since we made a block entry, link any other blocks that jump to current pc
- dr_link_blocks(tcache_ptr, pc, tcache_id);
+ // since we made a block entry, link any other blocks that jump to current pc
+ dr_link_blocks(tcache_ptr, pc, tcache_id);
+ }
+ else {
+ dbg(1, "too many entryp for block #%d,%d pc=%08x",
+ tcache_id, blkid_main, pc);
+ }
}
if (i >= 0)
branch_target_ptr[i] = tcache_ptr;
#if (DRC_DEBUG & 2)
insns_compiled++;
+#endif
#if (DRC_DEBUG & 4)
DasmSH2(sh2dasm_buff, pc, op);
- printf("%08x %04x %s\n", pc, op, sh2dasm_buff);
+ printf("%c%08x %04x %s\n", (OP_FLAGS(pc) & OF_BTARGET) ? '*' : ' ',
+ pc, op, sh2dasm_buff);
#endif
+#ifdef DRC_CMP
+ //if (out_pc != 0 && out_pc != (u32)-1)
+ // emit_move_r_imm32(SHR_PC, out_pc);
+ //else
+ if (!drcf.delayed_op) {
+ emit_move_r_imm32(SHR_PC, pc);
+ sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
+ FLUSH_CYCLES(sr);
+ // rcache_clean(); // FIXME
+ rcache_flush();
+ emit_do_static_regs(1, 0);
+ emith_pass_arg_r(0, CONTEXT_REG);
+ emith_call(do_sh2_cmp);
+ }
#endif
pc += 2;
EMITH_JMP_END(DCOND_EQ);
rcache_free_tmp(tmp);
- cycles += 3;
+ cycles += 2;
goto end_op;
}
goto default_;
emith_clear_msb(tmp2, tmp3, 16);
emith_mul(tmp, tmp, tmp2);
rcache_free_tmp(tmp2);
-// FIXME: causes timing issues in Doom?
-// cycles++;
goto end_op;
}
goto default_;
tmp3 = rcache_get_reg(SHR_MACL, RC_GR_WRITE);
tmp4 = rcache_get_reg(SHR_MACH, RC_GR_WRITE);
emith_mul_u64(tmp3, tmp4, tmp, tmp2);
+ cycles++;
goto end_op;
case 0x08: // SUB Rm,Rn 0011nnnnmmmm1000
case 0x0c: // ADD Rm,Rn 0011nnnnmmmm1100
tmp3 = rcache_get_reg(SHR_MACL, RC_GR_WRITE);
tmp4 = rcache_get_reg(SHR_MACH, RC_GR_WRITE);
emith_mul_s64(tmp3, tmp4, tmp, tmp2);
+ cycles++;
goto end_op;
}
goto default_;
sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
if (drcf.delayed_op)
DELAY_SAVE_T(sr);
+#ifndef DRC_CMP
if (FETCH_OP(pc) == 0x8bfd) { // BF #-2
if (gconst_get(GET_Rn(), &tmp)) {
// XXX: limit burned cycles
emith_sh2_dtbf_loop();
goto end_op;
}
+#endif
tmp = rcache_get_reg(GET_Rn(), RC_GR_RMW);
emith_bic_r_imm(sr, T);
emith_subf_r_imm(tmp, 1);
break;
case 0x03: // STC.L SR,@–Rn 0100nnnn00000011
tmp = SHR_SR;
+ cycles++;
break;
case 0x13: // STC.L GBR,@–Rn 0100nnnn00010011
tmp = SHR_GBR;
+ cycles++;
break;
case 0x23: // STC.L VBR,@–Rn 0100nnnn00100011
tmp = SHR_VBR;
+ cycles++;
break;
default:
goto default_;
break;
case 0x07: // LDC.L @Rm+,SR 0100mmmm00000111
tmp = SHR_SR;
+ cycles += 2;
break;
case 0x17: // LDC.L @Rm+,GBR 0100mmmm00010111
tmp = SHR_GBR;
+ cycles += 2;
break;
case 0x27: // LDC.L @Rm+,VBR 0100mmmm00100111
tmp = SHR_VBR;
+ cycles += 2;
break;
default:
goto default_;
case 0x0d00: // BT/S label 10001101dddddddd
case 0x0f00: // BF/S label 10001111dddddddd
DELAYED_OP;
- cycles--;
// fallthrough
case 0x0900: // BT label 10001001dddddddd
case 0x0b00: // BF label 10001011dddddddd
pending_branch_cond = (op & 0x0200) ? DCOND_EQ : DCOND_NE;
i = ((signed int)(op << 24) >> 23);
pending_branch_pc = pc + i + 2;
- cycles += 2;
goto end_op;
}
goto default_;
default_:
elprintf(EL_ANOMALY, "%csh2 drc: unhandled op %04x @ %08x",
sh2->is_slave ? 's' : 'm', op, pc - 2);
-#ifdef DRC_DEBUG_INTERP
- emit_move_r_imm32(SHR_PC, pc - 2);
- rcache_flush();
- emith_pass_arg_r(0, CONTEXT_REG);
- emith_pass_arg_imm(1, op);
- emith_call(sh2_do_op);
-#endif
break;
}
if (pending_branch_cond != -1 && drcf.delayed_op != 2)
{
u32 target_pc = pending_branch_pc;
+ int ctaken = drcf.delayed_op ? 1 : 2;
void *target;
sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
- // handle cycles
FLUSH_CYCLES(sr);
- rcache_clean();
if (drcf.use_saved_t)
emith_tst_r_imm(sr, T_save);
else
emith_tst_r_imm(sr, T);
+ // handle cycles
+ emith_sub_r_imm_c(pending_branch_cond, sr, ctaken<<12);
+ rcache_clean();
+
#if LINK_BRANCHES
if (find_in_array(branch_target_pc, branch_target_count, target_pc) >= 0) {
// local branch
// mark memory blocks as containing compiled code
// override any overlay blocks as they become unreachable anyway
- if (tcache_id != 0 || (this_block->addr & 0xc7fc0000) == 0x06000000)
+ if (tcache_id != 0 || (block->addr & 0xc7fc0000) == 0x06000000)
{
u16 *drc_ram_blk = NULL;
- u32 mask = 0, shift = 0;
+ u32 addr, mask = 0, shift = 0;
if (tcache_id != 0) {
// data array, BIOS
shift = SH2_DRCBLK_DA_SHIFT;
mask = 0xfff;
}
- else if ((this_block->addr & 0xc7fc0000) == 0x06000000) {
+ else if ((block->addr & 0xc7fc0000) == 0x06000000) {
// SDRAM
drc_ram_blk = Pico32xMem->drcblk_ram;
shift = SH2_DRCBLK_RAM_SHIFT;
mask = 0x3ffff;
}
- drc_ram_blk[(base_pc >> shift) & mask] = (blkid_main << 1) | 1;
- for (pc = base_pc + 2; pc < end_pc; pc += 2)
- drc_ram_blk[(pc >> shift) & mask] = blkid_main << 1;
-
- // mark subblocks
- for (i = 0; i < branch_target_count; i++)
- if (branch_target_blkid[i] != 0)
- drc_ram_blk[(branch_target_pc[i] >> shift) & mask] =
- (branch_target_blkid[i] << 1) | 1;
+ // mark recompiled insns
+ drc_ram_blk[(base_pc & mask) >> shift] = 1;
+ for (pc = base_pc; pc < end_pc; pc += 2)
+ drc_ram_blk[(pc & mask) >> shift] = 1;
// mark literals
for (i = 0; i < literal_addr_count; i++) {
tmp = literal_addr[i];
- drc_ram_blk[(tmp >> shift) & mask] = blkid_main << 1;
- if (!(tmp & 3)) // assume long
- drc_ram_blk[((tmp + 2) >> shift) & mask] = blkid_main << 1;
+ drc_ram_blk[(tmp & mask) >> shift] = 1;
+ }
+
+ // add to invalidation lookup lists
+ addr = base_pc & ~(ADDR_TO_BLOCK_PAGE - 1);
+ for (; addr < end_pc + MAX_LITERAL_OFFSET; addr += ADDR_TO_BLOCK_PAGE) {
+ i = (addr & mask) / ADDR_TO_BLOCK_PAGE;
+ add_to_block_list(&inval_lookup[tcache_id][i], block);
}
}
tcache_ptrs[tcache_id] = tcache_ptr;
- host_instructions_updated(block_entry, tcache_ptr);
+ host_instructions_updated(block_entry_ptr, tcache_ptr);
do_host_disasm(tcache_id);
dbg(2, " block #%d,%d tcache %d/%d, insns %d -> %d %.3f",
- tcache_id, block_counts[tcache_id],
+ tcache_id, blkid_main,
tcache_ptr - tcache_bases[tcache_id], tcache_sizes[tcache_id],
- insns_compiled, host_insn_count, (double)host_insn_count / insns_compiled);
+ insns_compiled, host_insn_count, (float)host_insn_count / insns_compiled);
if ((sh2->pc & 0xc6000000) == 0x02000000) // ROM
dbg(2, " hash collisions %d/%d", hash_collisions, block_counts[tcache_id]);
/*
printf("~~~\n");
- tcache_dsm_ptrs[tcache_id] = block_entry;
+ tcache_dsm_ptrs[tcache_id] = block_entry_ptr;
do_host_disasm(tcache_id);
printf("~~~\n");
*/
fflush(stdout);
#endif
- return block_entry;
+ return block_entry_ptr;
}
static void sh2_generate_utils(void)
emith_call(sh2_translate);
emit_block_entry();
// XXX: can't translate, fail
- emith_call(exit);
+ emith_call(dr_failure);
// sh2_drc_test_irq(void)
// assumes it's called from main function (may jump to dispatcher)
#endif
}
-static void *sh2_smc_rm_block_entry(block_desc *bd, int tcache_id)
+static void sh2_smc_rm_block_entry(struct block_desc *bd, int tcache_id, u32 ram_mask)
{
void *tmp;
+ u32 i, addr;
- // XXX: kill links somehow?
- dbg(2, " killing entry %08x, blkid %d", bd->addr, bd - block_tables[tcache_id]);
- if (bd->addr == 0 || bd->tcache_ptr == NULL) {
+ dbg(2, " killing entry %08x-%08x, blkid %d,%d",
+ bd->addr, bd->end_addr, tcache_id, bd - block_tables[tcache_id]);
+ if (bd->addr == 0 || bd->entry_count == 0) {
dbg(1, " killing dead block!? %08x", bd->addr);
- return bd->tcache_ptr;
+ return;
}
- // since we never reuse space of dead blocks,
- // insert jump to dispatcher for blocks that are linked to this point
- //emith_jump_at(bd->tcache_ptr, sh2_drc_dispatcher);
+ // remove from inval_lookup
+ addr = bd->addr & ~(ADDR_TO_BLOCK_PAGE - 1);
+ for (; addr < bd->end_addr; addr += ADDR_TO_BLOCK_PAGE) {
+ i = (addr & ram_mask) / ADDR_TO_BLOCK_PAGE;
+ rm_from_block_list(&inval_lookup[tcache_id][i], bd);
+ }
- // attempt to handle self-modifying blocks by exiting at nearest known PC
tmp = tcache_ptr;
- tcache_ptr = bd->tcache_ptr;
- emit_move_r_imm32(SHR_PC, bd->addr);
- rcache_flush();
- emith_jump(sh2_drc_dispatcher);
- tcache_ptr = tmp;
- bd->addr = 0;
- return bd->tcache_ptr;
-}
-
-static void sh2_smc_rm_block(u32 a, u16 *drc_ram_blk, int tcache_id, u32 shift, u32 mask)
-{
- //block_link *bl = block_links[tcache_id];
- //int bl_count = block_link_counts[tcache_id];
- block_desc *btab = block_tables[tcache_id];
- u16 *p = drc_ram_blk + ((a & mask) >> shift);
- u16 *pmax = drc_ram_blk + (mask >> shift);
- void *tcache_min, *tcache_max;
- int zeros;
- u16 *pt;
-
- // Figure out what the main block is, as subblocks also have the flag set.
- // This relies on sub having single entry. It's possible that innocent
- // block might be hit, but that's not such a big deal.
- if ((p[0] >> 1) != (p[1] >> 1)) {
- for (; p > drc_ram_blk; p--)
- if (p[-1] == 0 || (p[-1] >> 1) == (*p >> 1))
- break;
- }
- pt = p;
+ // remove from hash table
+ // XXX: maybe kill links somehow instead?
+ for (i = 0; i < bd->entry_count; i++) {
+ rm_from_hashlist(&bd->entryp[i], tcache_id);
- for (; p > drc_ram_blk; p--)
- if ((*p & 1))
- break;
+ // since we never reuse tcache space of dead blocks,
+ // insert jump to dispatcher for blocks that are linked to this
+ tcache_ptr = bd->entryp[i].tcache_ptr;
+ emit_move_r_imm32(SHR_PC, bd->addr);
+ rcache_flush();
+ emith_jump(sh2_drc_dispatcher);
- if (!(*p & 1)) {
- dbg(1, "smc rm: missing block start for %08x?", a);
- p = pt;
+ host_instructions_updated(bd->entryp[i].tcache_ptr, tcache_ptr);
}
- if (*p == 0)
- return;
+ tcache_ptr = tmp;
- tcache_min = tcache_max = sh2_smc_rm_block_entry(&btab[*p >> 1], tcache_id);
- *p = 0;
+ bd->addr = bd->end_addr = 0;
+ bd->entry_count = 0;
+}
- for (p++, zeros = 0; p < pmax && zeros < MAX_LITERAL_OFFSET / 2; p++) {
- int id = *p >> 1;
- if (id == 0) {
- // there can be holes because games sometimes keep variables
- // directly in literal pool and we don't inline them to avoid recompile
- // (Star Wars Arcade)
- zeros++;
+static void sh2_smc_rm_block(u32 a, u16 *drc_ram_blk, int tcache_id, u32 shift, u32 mask)
+{
+ struct block_list **blist = NULL, *entry;
+ u32 from = ~0, to = 0;
+ struct block_desc *block;
+
+ blist = &inval_lookup[tcache_id][(a & mask) / ADDR_TO_BLOCK_PAGE];
+ entry = *blist;
+ while (entry != NULL) {
+ block = entry->block;
+ if (block->addr <= a && a < block->end_addr) {
+ if (block->addr < from)
+ from = block->addr;
+ if (block->end_addr > to)
+ to = block->end_addr;
+
+ sh2_smc_rm_block_entry(block, tcache_id, mask);
+
+ // entry lost, restart search
+ entry = *blist;
continue;
}
- if (*p & 1) {
- if (id == (p[1] >> 1))
- // hit other block
- break;
- tcache_max = sh2_smc_rm_block_entry(&btab[id], tcache_id);
- }
- *p = 0;
+ entry = entry->next;
}
- host_instructions_updated(tcache_min, (void *)((char *)tcache_max + 4*4 + 4));
+ // clear entry points
+ if (from < to) {
+ u16 *p = drc_ram_blk + ((from & mask) >> shift);
+ memset(p, 0, (to - from) >> (shift - 1));
+ }
}
void sh2_drc_wcheck_ram(unsigned int a, int val, int cpuid)
1 + cpuid, SH2_DRCBLK_DA_SHIFT, 0xfff);
}
-void sh2_execute(SH2 *sh2c, int cycles)
+int sh2_execute(SH2 *sh2c, int cycles)
{
int ret_cycles;
- sh2 = sh2c; // XXX
- sh2c->cycles_aim += cycles;
- cycles = sh2c->cycles_aim - sh2c->cycles_done;
+ sh2c->cycles_timeslice = cycles;
// cycles are kept in SHR_SR unused bits (upper 20)
- // bit19 contains T saved for delay slot
+ // bit11 contains T saved for delay slot
// others are usual SH2 flags
sh2c->sr &= 0x3f3;
sh2c->sr |= cycles << 12;
if (ret_cycles > 0)
dbg(1, "warning: drc returned with cycles: %d", ret_cycles);
- sh2c->cycles_done += cycles - ret_cycles;
+ return sh2c->cycles_timeslice - ret_cycles;
}
#if (DRC_DEBUG & 2)
total += block_tables[b][i].refcount;
for (c = 0; c < 10; c++) {
- block_desc *blk, *maxb = NULL;
+ struct block_desc *blk, *maxb = NULL;
int max = 0;
for (b = 0; b < ARRAY_SIZE(block_tables); b++) {
for (i = 0; i < block_counts[b]; i++) {
if (block_tables[i] == NULL)
goto fail;
// max 2 block links (exits) per block
- block_links[i] = calloc(block_max_counts[i] * 2, sizeof(*block_links[0]));
+ block_links[i] = calloc(block_link_max_counts[i], sizeof(*block_links[0]));
if (block_links[i] == NULL)
goto fail;
+
+ inval_lookup[i] = calloc(ram_sizes[i] / ADDR_TO_BLOCK_PAGE,
+ sizeof(inval_lookup[0]));
+ if (inval_lookup[i] == NULL)
+ goto fail;
+
+ hash_tables[i] = calloc(hash_table_sizes[i], sizeof(*hash_tables[0]));
+ if (hash_tables[i] == NULL)
+ goto fail;
}
memset(block_counts, 0, sizeof(block_counts));
memset(block_link_counts, 0, sizeof(block_link_counts));
#endif
}
- if (hash_table == NULL) {
- hash_table = calloc(sizeof(hash_table[0]), MAX_HASH_ENTRIES);
- if (hash_table == NULL)
- goto fail;
- }
-
return 0;
fail:
{
int i;
- if (block_tables[0] != NULL) {
- block_stats();
+ if (block_tables[0] == NULL)
+ return;
- for (i = 0; i < TCACHE_BUFFERS; i++) {
+ sh2_drc_flush_all();
+
+ for (i = 0; i < TCACHE_BUFFERS; i++) {
#if (DRC_DEBUG & 4)
- printf("~~~ tcache %d\n", i);
- tcache_dsm_ptrs[i] = tcache_bases[i];
- tcache_ptr = tcache_ptrs[i];
- do_host_disasm(i);
+ printf("~~~ tcache %d\n", i);
+ tcache_dsm_ptrs[i] = tcache_bases[i];
+ tcache_ptr = tcache_ptrs[i];
+ do_host_disasm(i);
#endif
- if (block_tables[i] != NULL)
- free(block_tables[i]);
- block_tables[i] = NULL;
- if (block_links[i] == NULL)
- free(block_links[i]);
- block_links[i] = NULL;
+ if (block_tables[i] != NULL)
+ free(block_tables[i]);
+ block_tables[i] = NULL;
+ if (block_links[i] == NULL)
+ free(block_links[i]);
+ block_links[i] = NULL;
+
+ if (inval_lookup[i] == NULL)
+ free(inval_lookup[i]);
+ inval_lookup[i] = NULL;
+
+ if (hash_tables[i] != NULL) {
+ free(hash_tables[i]);
+ hash_tables[i] = NULL;
}
+ }
+
+ drc_cmn_cleanup();
+}
+
+#endif /* DRC_SH2 */
+
+static void *dr_get_pc_base(u32 pc, int is_slave)
+{
+ void *ret = NULL;
+ u32 mask = 0;
- drc_cmn_cleanup();
+ if ((pc & ~0x7ff) == 0) {
+ // BIOS
+ ret = is_slave ? Pico32xMem->sh2_rom_s : Pico32xMem->sh2_rom_m;
+ mask = 0x7ff;
+ }
+ else if ((pc & 0xfffff000) == 0xc0000000) {
+ // data array
+ ret = Pico32xMem->data_array[is_slave];
+ mask = 0xfff;
}
+ else if ((pc & 0xc6000000) == 0x06000000) {
+ // SDRAM
+ ret = Pico32xMem->sdram;
+ mask = 0x03ffff;
+ }
+ else if ((pc & 0xc6000000) == 0x02000000) {
+ // ROM
+ ret = Pico.rom;
+ mask = 0x3fffff;
+ }
+
+ if (ret == NULL)
+ return (void *)-1; // NULL is valid value
- if (hash_table != NULL) {
- free(hash_table);
- hash_table = NULL;
+ return (char *)ret - (pc & ~mask);
+}
+
+void scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc)
+{
+ u16 *dr_pc_base;
+ u32 pc, target, op;
+ int cycles;
+
+ memset(op_flags, 0, BLOCK_INSN_LIMIT);
+
+ dr_pc_base = dr_get_pc_base(base_pc, is_slave);
+
+ for (cycles = 0, pc = base_pc; cycles < BLOCK_INSN_LIMIT-1; cycles++, pc += 2) {
+ op = FETCH_OP(pc);
+ if ((op & 0xf000) == 0xa000 || (op & 0xf000) == 0xb000) { // BRA, BSR
+ signed int offs = ((signed int)(op << 20) >> 19);
+ pc += 2;
+ OP_FLAGS(pc) |= OF_DELAY_OP;
+ target = pc + offs + 2;
+ if (base_pc <= target && target < base_pc + BLOCK_INSN_LIMIT * 2)
+ OP_FLAGS(target) |= OF_BTARGET;
+ break;
+ }
+ if ((op & 0xf000) == 0) {
+ op &= 0xff;
+ if (op == 0x1b) // SLEEP
+ break;
+ // BRAF, BSRF, RTS, RTE
+ if (op == 0x23 || op == 0x03 || op == 0x0b || op == 0x2b) {
+ pc += 2;
+ OP_FLAGS(pc) |= OF_DELAY_OP;
+ break;
+ }
+ continue;
+ }
+ if ((op & 0xf0df) == 0x400b) { // JMP, JSR
+ pc += 2;
+ OP_FLAGS(pc) |= OF_DELAY_OP;
+ break;
+ }
+ if ((op & 0xf900) == 0x8900) { // BT(S), BF(S)
+ signed int offs = ((signed int)(op << 24) >> 23);
+ if (op & 0x0400)
+ OP_FLAGS(pc + 2) |= OF_DELAY_OP;
+ target = pc + offs + 4;
+ if (base_pc <= target && target < base_pc + BLOCK_INSN_LIMIT * 2)
+ OP_FLAGS(target) |= OF_BTARGET;
+ }
+ if ((op & 0xff00) == 0xc300) // TRAPA
+ break;
}
+ *end_pc = pc;
}
-// vim:shiftwidth=2:expandtab
+// vim:shiftwidth=2:ts=2:expandtab
notaz.gp2x.de / picodrive.git / blobdiff