rm dupe file

[picodrive.git] / cpu / sh2 / compiler.c

diff --git a/cpu/sh2/compiler.c b/cpu/sh2/compiler.c
index a79f510..d1a07af 100644 (file)
--- a/cpu/sh2/compiler.c
+++ b/cpu/sh2/compiler.c
@@ -61,7 +61,7 @@
 }
 
 #include "mame/sh2dasm.h"
-#include <platform/linux/host_dasm.h>
+#include <platform/libpicofe/linux/host_dasm.h>
 static int insns_compiled, hash_collisions, host_insn_count;
 #define COUNT_OP \
        host_insn_count++
@@ -159,16 +159,16 @@ typedef struct {
 
 // note: reg_temp[] must have at least the amount of
 // registers used by handlers in worst case (currently 4)
-#ifdef ARM
+#ifdef __arm__
 #include "../drc/emit_arm.c"
 
 static const int reg_map_g2h[] = {
    4,  5,  6,  7,
    8, -1, -1, -1,
   -1, -1, -1, -1,
-  -1, -1, -1,  9,
-  -1, -1, -1, 10,
-  -1, -1, -1, -1,
+  -1, -1, -1,  9, // r12 .. sp
+  -1, -1, -1, 10, // SHR_PC,  SHR_PPC, SHR_PR,   SHR_SR,
+  -1, -1, -1, -1, // SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
 };
 
 static temp_reg_t reg_temp[] = {
@@ -431,6 +431,12 @@ static void REGPARM(3) *dr_lookup_block(u32 pc, int is_slave, int *tcache_id)
   return block;
 }
 
+static void *dr_failure(void)
+{
+  lprintf("recompilation failed\n");
+  exit(1);
+}
+
 static void *dr_prepare_ext_branch(u32 pc, SH2 *sh2, int tcache_id)
 {
 #if LINK_BRANCHES
@@ -977,6 +983,10 @@ static int emit_memhandler_read_(int size, int ram_check)
     }
   }
   rcache_invalidate();
+
+  if (reg_map_g2h[SHR_SR] != -1)
+    emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4);
+
   // assuming arg0 and retval reg matches
   return rcache_get_tmp_arg(0);
 }
@@ -1034,6 +1044,9 @@ static void emit_memhandler_write(int size, u32 pc, int delay)
 {
   int ctxr;
   host_arg2reg(ctxr, 2);
+  if (reg_map_g2h[SHR_SR] != -1)
+    emith_ctx_write(reg_map_g2h[SHR_SR], SHR_SR * 4);
+
   switch (size) {
   case 0: // 8
     // XXX: consider inlining sh2_drc_write8
@@ -1059,6 +1072,9 @@ static void emit_memhandler_write(int size, u32 pc, int delay)
     emith_call(sh2_drc_write32);
     break;
   }
+
+  if (reg_map_g2h[SHR_SR] != -1)
+    emith_ctx_read(reg_map_g2h[SHR_SR], SHR_SR * 4);
   rcache_invalidate();
 }
 
@@ -1126,13 +1142,15 @@ static void emit_do_static_regs(int is_write, int tmpr)
 
 static void emit_block_entry(void)
 {
-  int arg0, arg1, arg2;
+  int arg0;
 
   host_arg2reg(arg0, 0);
+
+#if (DRC_DEBUG & 8) || defined(PDB)
+  int arg1, arg2;
   host_arg2reg(arg1, 1);
   host_arg2reg(arg2, 2);
 
-#if (DRC_DEBUG & 8) || defined(PDB)
   emit_do_static_regs(1, arg2);
   emith_move_r_r(arg1, CONTEXT_REG);
   emith_move_r_r(arg2, rcache_get_reg(SHR_SR, RC_GR_READ));
@@ -1296,10 +1314,16 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
     pc = branch_target_pc[i];
     if (base_pc <= pc && pc <= end_pc && !(OP_FLAGS(pc) & OF_DELAY_OP))
       branch_target_pc[tmp++] = branch_target_pc[i];
+
+    if (i == branch_target_count - 1) // workaround gcc 4.5.2 bug?
+      break;
   }
+
   branch_target_count = tmp;
-  memset(branch_target_ptr, 0, sizeof(branch_target_ptr[0]) * branch_target_count);
-  memset(branch_target_blkid, 0, sizeof(branch_target_blkid[0]) * branch_target_count);
+  if (branch_target_count > 0) {
+    memset(branch_target_ptr, 0, sizeof(branch_target_ptr[0]) * branch_target_count);
+    memset(branch_target_blkid, 0, sizeof(branch_target_blkid[0]) * branch_target_count);
+  }
 
   // -------------------------------------------------
   // 2nd pass: actual compilation
@@ -2702,7 +2726,7 @@ static void sh2_generate_utils(void)
   emith_call(sh2_translate);
   emit_block_entry();
   // XXX: can't translate, fail
-  emith_call(exit);
+  emith_call(dr_failure);
 
   // sh2_drc_test_irq(void)
   // assumes it's called from main function (may jump to dispatcher)
@@ -2964,16 +2988,15 @@ void sh2_drc_wcheck_da(unsigned int a, int val, int cpuid)
     1 + cpuid, SH2_DRCBLK_DA_SHIFT, 0xfff);
 }
 
-void sh2_execute(SH2 *sh2c, int cycles)
+int sh2_execute(SH2 *sh2c, int cycles)
 {
   int ret_cycles;
   sh2 = sh2c; // XXX
 
-  sh2c->cycles_aim += cycles;
-  cycles = sh2c->cycles_aim - sh2c->cycles_done;
+  sh2c->cycles_timeslice = cycles;
 
   // cycles are kept in SHR_SR unused bits (upper 20)
-  // bit19 contains T saved for delay slot
+  // bit11 contains T saved for delay slot
   // others are usual SH2 flags
   sh2c->sr &= 0x3f3;
   sh2c->sr |= cycles << 12;
@@ -2984,7 +3007,7 @@ void sh2_execute(SH2 *sh2c, int cycles)
   if (ret_cycles > 0)
     dbg(1, "warning: drc returned with cycles: %d", ret_cycles);
 
-  sh2c->cycles_done += cycles - ret_cycles;
+  return sh2c->cycles_timeslice - ret_cycles;
 }
 
 #if (DRC_DEBUG & 2)