#define LINK_BRANCHES 1
// limits (per block)
-#define MAX_BLOCK_SIZE (BLOCK_CYCLE_LIMIT * 6 * 6)
+#define MAX_BLOCK_SIZE (BLOCK_INSN_LIMIT * 6 * 6)
// max literal offset from the block end
#define MAX_LITERAL_OFFSET 32*2
-#define MAX_LITERALS (BLOCK_CYCLE_LIMIT / 4)
+#define MAX_LITERALS (BLOCK_INSN_LIMIT / 4)
#define MAX_LOCAL_BRANCHES 32
///
#ifdef DRC_SH2
// debug stuff
-// 1 - ?
-// 2 - ?
-// 4 - log asm
+// 1 - warnings/errors
+// 2 - block info/smc
+// 4 - asm
+// 8 - runtime entries
// {
#ifndef DRC_DEBUG
#define DRC_DEBUG 0
// and can be discarded early
// XXX: need to tune sizes
static const int tcache_sizes[TCACHE_BUFFERS] = {
- DRC_TCACHE_SIZE * 6 / 8, // ROM, DRAM
+ DRC_TCACHE_SIZE * 6 / 8, // ROM (rarely used), DRAM
DRC_TCACHE_SIZE / 8, // BIOS, data array in master sh2
DRC_TCACHE_SIZE / 8, // ... slave
};
// ptr for code emiters
static u8 *tcache_ptr;
-typedef struct block_desc_ {
+struct block_desc {
u32 addr; // SH2 PC address
+ u32 end_addr; // address after last op
void *tcache_ptr; // translated block for above PC
- struct block_desc_ *next; // next block with the same PC hash
+ struct block_desc *next; // next block with the same PC hash
#if (DRC_DEBUG & 2)
int refcount;
#endif
-} block_desc;
+};
-typedef struct block_link_ {
+struct block_link {
u32 target_pc;
void *jump; // insn address
// struct block_link_ *next;
-} block_link;
+};
static const int block_max_counts[TCACHE_BUFFERS] = {
4*1024,
256,
256,
};
-static block_desc *block_tables[TCACHE_BUFFERS];
-static block_link *block_links[TCACHE_BUFFERS];
+static struct block_desc *block_tables[TCACHE_BUFFERS];
+static struct block_link *block_links[TCACHE_BUFFERS];
static int block_counts[TCACHE_BUFFERS];
static int block_link_counts[TCACHE_BUFFERS];
+// used for invalidation
+static const int ram_sizes[TCACHE_BUFFERS] = {
+ 0x40000,
+ 0x1000,
+ 0x1000,
+};
+#define ADDR_TO_BLOCK_PAGE 0x100
+
+struct block_list {
+ struct block_desc *block;
+ struct block_list *next;
+};
+
+// array of pointers to block_lists for RAM and 2 data arrays
+// each array has len: sizeof(mem) / ADDR_TO_BLOCK_PAGE
+static struct block_list **inval_lookup[TCACHE_BUFFERS];
+
// host register tracking
enum {
HR_FREE,
// ROM hash table
#define MAX_HASH_ENTRIES 1024
#define HASH_MASK (MAX_HASH_ENTRIES - 1)
-static void **hash_table;
+static struct block_desc **hash_table;
#define HASH_FUNC(hash_tab, addr) \
- ((block_desc **)(hash_tab))[(addr) & HASH_MASK]
+ (hash_tab)[(addr) & HASH_MASK]
static void REGPARM(1) (*sh2_drc_entry)(SH2 *sh2);
static void (*sh2_drc_dispatcher)(void);
return poffs;
}
-static block_desc *dr_get_bd(u32 pc, int is_slave, int *tcache_id)
+static struct block_desc *dr_get_bd(u32 pc, int is_slave, int *tcache_id)
{
*tcache_id = 0;
}
// ROM
else if ((pc & 0xc6000000) == 0x02000000) {
- block_desc *bd = HASH_FUNC(hash_table, pc);
+ struct block_desc *bd = HASH_FUNC(hash_table, pc);
for (; bd != NULL; bd = bd->next)
if (bd->addr == pc)
// ---------------------------------------------------------------
// block management
+static void add_to_block_list(struct block_list **blist, struct block_desc *block)
+{
+ struct block_list *added = malloc(sizeof(*added));
+ if (!added) {
+ elprintf(EL_ANOMALY, "drc OOM (1)");
+ return;
+ }
+ added->block = block;
+ added->next = *blist;
+ *blist = added;
+}
+
+static void rm_from_block_list(struct block_list **blist, struct block_desc *block)
+{
+ struct block_list *prev = NULL, *current = *blist;
+ for (; current != NULL; prev = current, current = current->next) {
+ if (current->block == block) {
+ if (prev == NULL)
+ *blist = current->next;
+ else
+ prev->next = current->next;
+ free(current);
+ return;
+ }
+ }
+ dbg(1, "can't rm block %p (%08x-%08x)",
+ block, block->addr, block->end_addr);
+}
+
+static void rm_block_list(struct block_list **blist)
+{
+ struct block_list *tmp, *current = *blist;
+ while (current != NULL) {
+ tmp = current;
+ current = current->next;
+ free(tmp);
+ }
+ *blist = NULL;
+}
+
static void REGPARM(1) flush_tcache(int tcid)
{
+ int i;
+
dbg(1, "tcache #%d flush! (%d/%d, bds %d/%d)", tcid,
tcache_ptrs[tcid] - tcache_bases[tcid], tcache_sizes[tcid],
block_counts[tcid], block_max_counts[tcid]);
#if (DRC_DEBUG & 4)
tcache_dsm_ptrs[tcid] = tcache_bases[tcid];
#endif
+
+ for (i = 0; i < ram_sizes[tcid] / ADDR_TO_BLOCK_PAGE; i++)
+ rm_block_list(&inval_lookup[tcid][i]);
}
#if LINK_BRANCHES
// add block links (tracked branches)
static int dr_add_block_link(u32 target_pc, void *jump, int tcache_id)
{
- block_link *bl = block_links[tcache_id];
+ struct block_link *bl = block_links[tcache_id];
int cnt = block_link_counts[tcache_id];
if (cnt >= block_max_counts[tcache_id] * 2) {
}
#endif
-static block_desc *dr_add_block(u32 addr, int is_slave, int *blk_id)
+static struct block_desc *dr_add_block(u32 addr, u32 end_addr, int is_slave, int *blk_id)
{
- block_desc *bd;
+ struct block_desc *bd;
int tcache_id;
int *bcount;
if (bd != NULL) {
dbg(2, "block override for %08x", addr);
bd->tcache_ptr = tcache_ptr;
+ bd->end_addr = end_addr;
*blk_id = bd - block_tables[tcache_id];
return bd;
}
bd = &block_tables[tcache_id][*bcount];
bd->addr = addr;
+ bd->end_addr = end_addr;
bd->tcache_ptr = tcache_ptr;
*blk_id = *bcount;
(*bcount)++;
static void REGPARM(3) *dr_lookup_block(u32 pc, int is_slave, int *tcache_id)
{
- block_desc *bd = NULL;
+ struct block_desc *bd = NULL;
void *block = NULL;
bd = dr_get_bd(pc, is_slave, tcache_id);
static void dr_link_blocks(void *target, u32 pc, int tcache_id)
{
#if LINK_BRANCHES
- block_link *bl = block_links[tcache_id];
+ struct block_link *bl = block_links[tcache_id];
int cnt = block_link_counts[tcache_id];
int i;
int literal_addr_count = 0;
int pending_branch_cond = -1;
int pending_branch_pc = 0;
- u8 op_flags[BLOCK_CYCLE_LIMIT];
+ u8 op_flags[BLOCK_INSN_LIMIT];
struct {
u32 delayed_op:2;
u32 test_irq:1;
// PC of current, first, last, last_target_blk SH2 insn
u32 pc, base_pc, end_pc, out_pc;
void *block_entry;
- block_desc *this_block;
+ struct block_desc *this_block;
u16 *dr_pc_base;
int blkid_main = 0;
int skip_op = 0;
}
tcache_ptr = tcache_ptrs[tcache_id];
- this_block = dr_add_block(base_pc, sh2->is_slave, &blkid_main);
- if (this_block == NULL)
- return NULL;
// predict tcache overflow
tmp = tcache_ptr - tcache_bases[tcache_id];
return NULL;
}
+ // 1st pass: scan forward for local branches
+ scan_block(base_pc, sh2->is_slave, op_flags, &end_pc);
+
+ this_block = dr_add_block(base_pc, end_pc + MAX_LITERAL_OFFSET, // XXX
+ sh2->is_slave, &blkid_main);
+ if (this_block == NULL)
+ return NULL;
+
block_entry = tcache_ptr;
- dbg(2, "== %csh2 block #%d,%d %08x -> %p", sh2->is_slave ? 's' : 'm',
- tcache_id, blkid_main, base_pc, block_entry);
+ dbg(2, "== %csh2 block #%d,%d %08x-%08x -> %p", sh2->is_slave ? 's' : 'm',
+ tcache_id, blkid_main, base_pc, end_pc, block_entry);
dr_link_blocks(tcache_ptr, base_pc, tcache_id);
- // 1st pass: scan forward for local branches
- scan_block(base_pc, sh2->is_slave, op_flags, &end_pc);
-
// collect branch_targets that don't land on delay slots
- for (pc = base_pc; pc <= end_pc; pc += 2) {
- if (!(OP_FLAGS(pc) & OF_TARGET))
+ for (pc = base_pc; pc < end_pc; pc += 2) {
+ if (!(OP_FLAGS(pc) & OF_BTARGET))
continue;
if (OP_FLAGS(pc) & OF_DELAY_OP) {
- OP_FLAGS(pc) &= ~OF_TARGET;
+ OP_FLAGS(pc) &= ~OF_BTARGET;
continue;
}
ADD_TO_ARRAY(branch_target_pc, branch_target_count, pc, break);
op = FETCH_OP(pc);
- if ((OP_FLAGS(pc) & OF_TARGET) || pc == base_pc)
+ if ((OP_FLAGS(pc) & OF_BTARGET) || pc == base_pc)
{
i = find_in_array(branch_target_pc, branch_target_count, pc);
if (pc != base_pc)
{
/* make "subblock" - just a mid-block entry */
- block_desc *subblock;
+ struct block_desc *subblock;
sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
FLUSH_CYCLES(sr);
dbg(2, "-- %csh2 subblock #%d,%d %08x -> %p", sh2->is_slave ? 's' : 'm',
tcache_id, branch_target_blkid[i], pc, tcache_ptr);
- subblock = dr_add_block(pc, sh2->is_slave, &branch_target_blkid[i]);
+ subblock = dr_add_block(pc, end_pc + MAX_LITERAL_OFFSET, // XXX
+ sh2->is_slave, &branch_target_blkid[i]);
if (subblock == NULL)
return NULL;
#endif
#if (DRC_DEBUG & 4)
DasmSH2(sh2dasm_buff, pc, op);
- printf("%08x %04x %s\n", pc, op, sh2dasm_buff);
+ printf("%c%08x %04x %s\n", (OP_FLAGS(pc) & OF_BTARGET) ? '*' : ' ',
+ pc, op, sh2dasm_buff);
#endif
#ifdef DRC_CMP
//if (out_pc != 0 && out_pc != (u32)-1)
EMITH_JMP_END(DCOND_EQ);
rcache_free_tmp(tmp);
- cycles += 3;
+ cycles += 2;
goto end_op;
}
goto default_;
emith_clear_msb(tmp2, tmp3, 16);
emith_mul(tmp, tmp, tmp2);
rcache_free_tmp(tmp2);
-// FIXME: causes timing issues in Doom?
-// cycles++;
goto end_op;
}
goto default_;
tmp3 = rcache_get_reg(SHR_MACL, RC_GR_WRITE);
tmp4 = rcache_get_reg(SHR_MACH, RC_GR_WRITE);
emith_mul_u64(tmp3, tmp4, tmp, tmp2);
+ cycles++;
goto end_op;
case 0x08: // SUB Rm,Rn 0011nnnnmmmm1000
case 0x0c: // ADD Rm,Rn 0011nnnnmmmm1100
tmp3 = rcache_get_reg(SHR_MACL, RC_GR_WRITE);
tmp4 = rcache_get_reg(SHR_MACH, RC_GR_WRITE);
emith_mul_s64(tmp3, tmp4, tmp, tmp2);
+ cycles++;
goto end_op;
}
goto default_;
break;
case 0x03: // STC.L SR,@–Rn 0100nnnn00000011
tmp = SHR_SR;
+ cycles++;
break;
case 0x13: // STC.L GBR,@–Rn 0100nnnn00010011
tmp = SHR_GBR;
+ cycles++;
break;
case 0x23: // STC.L VBR,@–Rn 0100nnnn00100011
tmp = SHR_VBR;
+ cycles++;
break;
default:
goto default_;
break;
case 0x07: // LDC.L @Rm+,SR 0100mmmm00000111
tmp = SHR_SR;
+ cycles += 2;
break;
case 0x17: // LDC.L @Rm+,GBR 0100mmmm00010111
tmp = SHR_GBR;
+ cycles += 2;
break;
case 0x27: // LDC.L @Rm+,VBR 0100mmmm00100111
tmp = SHR_VBR;
+ cycles += 2;
break;
default:
goto default_;
case 0x0d00: // BT/S label 10001101dddddddd
case 0x0f00: // BF/S label 10001111dddddddd
DELAYED_OP;
- cycles--;
// fallthrough
case 0x0900: // BT label 10001001dddddddd
case 0x0b00: // BF label 10001011dddddddd
pending_branch_cond = (op & 0x0200) ? DCOND_EQ : DCOND_NE;
i = ((signed int)(op << 24) >> 23);
pending_branch_pc = pc + i + 2;
- cycles += 2;
goto end_op;
}
goto default_;
if (pending_branch_cond != -1 && drcf.delayed_op != 2)
{
u32 target_pc = pending_branch_pc;
+ int ctaken = drcf.delayed_op ? 1 : 2;
void *target;
sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
- // handle cycles
FLUSH_CYCLES(sr);
- rcache_clean();
if (drcf.use_saved_t)
emith_tst_r_imm(sr, T_save);
else
emith_tst_r_imm(sr, T);
+ // handle cycles
+ emith_sub_r_imm_c(pending_branch_cond, sr, ctaken<<12);
+ rcache_clean();
+
#if LINK_BRANCHES
if (find_in_array(branch_target_pc, branch_target_count, target_pc) >= 0) {
// local branch
// override any overlay blocks as they become unreachable anyway
if (tcache_id != 0 || (this_block->addr & 0xc7fc0000) == 0x06000000)
{
- u16 *drc_ram_blk = NULL;
- u32 mask = 0, shift = 0;
+ u16 *p, *drc_ram_blk = NULL;
+ u32 addr, mask = 0, shift = 0;
if (tcache_id != 0) {
// data array, BIOS
mask = 0x3ffff;
}
- drc_ram_blk[(base_pc >> shift) & mask] = (blkid_main << 1) | 1;
- for (pc = base_pc + 2; pc < end_pc; pc += 2)
- drc_ram_blk[(pc >> shift) & mask] = blkid_main << 1;
+ drc_ram_blk[(base_pc & mask) >> shift] = (blkid_main << 1) | 1;
+ for (pc = base_pc + 2; pc < end_pc; pc += 2) {
+ p = &drc_ram_blk[(pc & mask) >> shift];
+ *p = blkid_main << 1;
+ }
- // mark subblocks
+ // mark block entries (used by dr_get_bd())
for (i = 0; i < branch_target_count; i++)
if (branch_target_blkid[i] != 0)
- drc_ram_blk[(branch_target_pc[i] >> shift) & mask] =
+ drc_ram_blk[(branch_target_pc[i] & mask) >> shift] =
(branch_target_blkid[i] << 1) | 1;
// mark literals
for (i = 0; i < literal_addr_count; i++) {
tmp = literal_addr[i];
- drc_ram_blk[(tmp >> shift) & mask] = blkid_main << 1;
- if (!(tmp & 3)) // assume long
- drc_ram_blk[((tmp + 2) >> shift) & mask] = blkid_main << 1;
+ p = &drc_ram_blk[(tmp & mask) >> shift];
+ *p = blkid_main << 1;
+ if (!(tmp & 3) && shift == 1)
+ p[1] = p[0]; // assume long
+ }
+
+ // add to invalidation lookup lists
+ addr = base_pc & ~(ADDR_TO_BLOCK_PAGE - 1);
+ for (; addr < end_pc + MAX_LITERAL_OFFSET; addr += ADDR_TO_BLOCK_PAGE) {
+ i = (addr & mask) / ADDR_TO_BLOCK_PAGE;
+ add_to_block_list(&inval_lookup[tcache_id][i], this_block);
}
}
do_host_disasm(tcache_id);
dbg(2, " block #%d,%d tcache %d/%d, insns %d -> %d %.3f",
- tcache_id, block_counts[tcache_id],
+ tcache_id, blkid_main,
tcache_ptr - tcache_bases[tcache_id], tcache_sizes[tcache_id],
- insns_compiled, host_insn_count, (double)host_insn_count / insns_compiled);
+ insns_compiled, host_insn_count, (float)host_insn_count / insns_compiled);
if ((sh2->pc & 0xc6000000) == 0x02000000) // ROM
dbg(2, " hash collisions %d/%d", hash_collisions, block_counts[tcache_id]);
/*
#endif
}
-static void *sh2_smc_rm_block_entry(block_desc *bd, int tcache_id)
+static void sh2_smc_rm_block_entry(struct block_desc *bd, int tcache_id, u32 ram_mask)
{
void *tmp;
+ u32 i, addr;
// XXX: kill links somehow?
- dbg(2, " killing entry %08x, blkid %d", bd->addr, bd - block_tables[tcache_id]);
+ dbg(2, " killing entry %08x-%08x, blkid %d,%d",
+ bd->addr, bd->end_addr, tcache_id, bd - block_tables[tcache_id]);
if (bd->addr == 0 || bd->tcache_ptr == NULL) {
dbg(1, " killing dead block!? %08x", bd->addr);
- return bd->tcache_ptr;
+ return;
+ }
+
+ // remove from inval_lookup
+ addr = bd->addr & ~(ADDR_TO_BLOCK_PAGE - 1);
+ for (; addr < bd->end_addr; addr += ADDR_TO_BLOCK_PAGE) {
+ i = (addr & ram_mask) / ADDR_TO_BLOCK_PAGE;
+ rm_from_block_list(&inval_lookup[tcache_id][i], bd);
}
// since we never reuse space of dead blocks,
emit_move_r_imm32(SHR_PC, bd->addr);
rcache_flush();
emith_jump(sh2_drc_dispatcher);
+
+ host_instructions_updated(bd->tcache_ptr, tcache_ptr);
tcache_ptr = tmp;
- bd->addr = 0;
- return bd->tcache_ptr;
+ bd->addr = bd->end_addr = 0;
}
static void sh2_smc_rm_block(u32 a, u16 *drc_ram_blk, int tcache_id, u32 shift, u32 mask)
{
- //block_link *bl = block_links[tcache_id];
- //int bl_count = block_link_counts[tcache_id];
- block_desc *btab = block_tables[tcache_id];
- u16 *p = drc_ram_blk + ((a & mask) >> shift);
- u16 *pmax = drc_ram_blk + (mask >> shift);
- void *tcache_min, *tcache_max;
- int zeros;
- u16 *pt;
-
- // Figure out what the main block is, as subblocks also have the flag set.
- // This relies on sub having single entry. It's possible that innocent
- // block might be hit, but that's not such a big deal.
- if ((p[0] >> 1) != (p[1] >> 1)) {
- for (; p > drc_ram_blk; p--)
- if (p[-1] == 0 || (p[-1] >> 1) == (*p >> 1))
- break;
- }
- pt = p;
-
- for (; p > drc_ram_blk; p--)
- if ((*p & 1))
- break;
-
- if (!(*p & 1)) {
- dbg(1, "smc rm: missing block start for %08x?", a);
- p = pt;
- }
-
- if (*p == 0)
- return;
-
- tcache_min = tcache_max = sh2_smc_rm_block_entry(&btab[*p >> 1], tcache_id);
- *p = 0;
-
- for (p++, zeros = 0; p < pmax && zeros < MAX_LITERAL_OFFSET / 2; p++) {
- int id = *p >> 1;
- if (id == 0) {
- // there can be holes because games sometimes keep variables
- // directly in literal pool and we don't inline them to avoid recompile
- // (Star Wars Arcade)
- zeros++;
+ struct block_list **blist = NULL, *entry;
+ u32 from = ~0, to = 0;
+ struct block_desc *block;
+
+ blist = &inval_lookup[tcache_id][(a & mask) / ADDR_TO_BLOCK_PAGE];
+ entry = *blist;
+ while (entry != NULL) {
+ block = entry->block;
+ if (block->addr <= a && a < block->end_addr) {
+ if (block->addr < from)
+ from = block->addr;
+ if (block->end_addr > to)
+ to = block->end_addr;
+
+ sh2_smc_rm_block_entry(block, tcache_id, mask);
+
+ // entry lost, restart search
+ entry = *blist;
continue;
}
- if (*p & 1) {
- if (id == (p[1] >> 1))
- // hit other block
- break;
- tcache_max = sh2_smc_rm_block_entry(&btab[id], tcache_id);
- }
- *p = 0;
+ entry = entry->next;
}
- host_instructions_updated(tcache_min, (void *)((char *)tcache_max + 4*4 + 4));
+ // clear entry points
+ if (from < to) {
+ u16 *p = drc_ram_blk + ((from & mask) >> shift);
+ memset(p, 0, (to - from) >> (shift - 1));
+ }
}
void sh2_drc_wcheck_ram(unsigned int a, int val, int cpuid)
total += block_tables[b][i].refcount;
for (c = 0; c < 10; c++) {
- block_desc *blk, *maxb = NULL;
+ struct block_desc *blk, *maxb = NULL;
int max = 0;
for (b = 0; b < ARRAY_SIZE(block_tables); b++) {
for (i = 0; i < block_counts[b]; i++) {
block_links[i] = calloc(block_max_counts[i] * 2, sizeof(*block_links[0]));
if (block_links[i] == NULL)
goto fail;
+
+ inval_lookup[i] = calloc(ram_sizes[i] / ADDR_TO_BLOCK_PAGE,
+ sizeof(inval_lookup[0]));
+ if (inval_lookup[i] == NULL)
+ goto fail;
}
memset(block_counts, 0, sizeof(block_counts));
memset(block_link_counts, 0, sizeof(block_link_counts));
{
int i;
+ sh2_drc_flush_all();
+
if (block_tables[0] != NULL) {
block_stats();
if (block_links[i] == NULL)
free(block_links[i]);
block_links[i] = NULL;
+
+ if (inval_lookup[i] == NULL)
+ free(inval_lookup[i]);
+ inval_lookup[i] = NULL;
}
drc_cmn_cleanup();
u32 pc, target, op;
int cycles;
- memset(op_flags, 0, BLOCK_CYCLE_LIMIT);
+ memset(op_flags, 0, BLOCK_INSN_LIMIT);
dr_pc_base = dr_get_pc_base(base_pc, is_slave);
- for (cycles = 0, pc = base_pc; cycles < BLOCK_CYCLE_LIMIT-1; cycles++, pc += 2) {
+ for (cycles = 0, pc = base_pc; cycles < BLOCK_INSN_LIMIT-1; cycles++, pc += 2) {
op = FETCH_OP(pc);
if ((op & 0xf000) == 0xa000 || (op & 0xf000) == 0xb000) { // BRA, BSR
signed int offs = ((signed int)(op << 20) >> 19);
pc += 2;
OP_FLAGS(pc) |= OF_DELAY_OP;
target = pc + offs + 2;
- if (base_pc <= target && target < base_pc + BLOCK_CYCLE_LIMIT * 2)
- OP_FLAGS(target) |= OF_TARGET;
+ if (base_pc <= target && target < base_pc + BLOCK_INSN_LIMIT * 2)
+ OP_FLAGS(target) |= OF_BTARGET;
break;
}
if ((op & 0xf000) == 0) {
if (op & 0x0400)
OP_FLAGS(pc + 2) |= OF_DELAY_OP;
target = pc + offs + 4;
- if (base_pc <= target && target < base_pc + BLOCK_CYCLE_LIMIT * 2)
- OP_FLAGS(target) |= OF_TARGET;
+ if (base_pc <= target && target < base_pc + BLOCK_INSN_LIMIT * 2)
+ OP_FLAGS(target) |= OF_BTARGET;
}
if ((op & 0xff00) == 0xc300) // TRAPA
break;
*end_pc = pc;
}
-// vim:shiftwidth=2:expandtab
+// vim:shiftwidth=2:ts=2:expandtab