32x: change irq hadling, make it more drc friendly
[picodrive.git] / cpu / sh2 / mame / sh2pico.c
index 79264ac..0ed1397 100644 (file)
@@ -48,6 +48,18 @@ void sh2_execute(SH2 *sh2_, int cycles)
        {
                UINT32 opcode;
 
+               if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
+               {
+                       if (sh2->pending_irl > sh2->pending_int_irq)
+                               sh2_do_irq(sh2, sh2->pending_irl, 64 + sh2->pending_irl/2);
+                       else {
+                               sh2_do_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
+                               sh2->pending_int_irq = 0; // auto-clear
+                               sh2->pending_level = sh2->pending_irl;
+                       }
+                       sh2->test_irq = 0;
+               }
+
                if (sh2->delay)
                {
                        sh2->ppc = sh2->delay;
@@ -83,14 +95,6 @@ void sh2_execute(SH2 *sh2_, int cycles)
                default: op1111(opcode); break;
                }
 
-               if (sh2->test_irq && !sh2->delay)
-               {
-                       if (sh2->pending_irl > sh2->pending_int_irq)
-                               sh2_irl_irq(sh2, sh2->pending_irl);
-                       else
-                               sh2_internal_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
-                       sh2->test_irq = 0;
-               }
                sh2->icount--;
        }
        while (sh2->icount > 0 || sh2->delay);  /* can't interrupt before delay */