drc: some debug improvements

[picodrive.git] / cpu / sh2 / mame / sh2pico.c

diff --git a/cpu/sh2/mame/sh2pico.c b/cpu/sh2/mame/sh2pico.c
index cc6dce3..37ade45 100644 (file)
--- a/cpu/sh2/mame/sh2pico.c
+++ b/cpu/sh2/mame/sh2pico.c
@@ -1,12 +1,21 @@
 #include "../sh2.h"
 
+#ifdef DRC_CMP
+#include "../compiler.c"
+#define BUSY_LOOP_HACKS 0
+#else
+#define BUSY_LOOP_HACKS 1
+#endif
+
 // MAME types
+#ifndef INT8
 typedef signed char  INT8;
 typedef signed short INT16;
 typedef signed int   INT32;
 typedef unsigned int   UINT32;
 typedef unsigned short UINT16;
 typedef unsigned char  UINT8;
+#endif
 
 #define RB(sh2, a) p32x_sh2_read8(a,sh2)
 #define RW(sh2, a) p32x_sh2_read16(a,sh2)
@@ -63,21 +72,19 @@ static unsigned int op_refs[0x10000];
 #include "sh2.c"
 
 #ifndef DRC_SH2
+#ifndef DRC_CMP
 
 int sh2_execute(SH2 *sh2, int cycles)
 {
-       sh2 = sh2_;
-       sh2->icount = cycles;
+       UINT32 opcode;
 
-       if (sh2->icount <= 0)
-               return cycles;
+       sh2->icount = sh2->cycles_timeslice = cycles;
 
-       sh2->cycles_timeslice = cycles;
+       if (sh2->icount <= 0)
+               goto out;
 
        do
        {
-               UINT32 opcode;
-
                if (sh2->delay)
                {
                        sh2->ppc = sh2->delay;
@@ -126,24 +133,74 @@ int sh2_execute(SH2 *sh2, int cycles)
        }
        while (sh2->icount > 0 || sh2->delay);  /* can't interrupt before delay */
 
+out:
        return sh2->cycles_timeslice - sh2->icount;
 }
 
-#else // DRC_SH2
+#else // if DRC_CMP
 
-#ifdef __i386__
-#define REGPARM(x) __attribute__((regparm(x)))
-#else
-#define REGPARM(x)
-#endif
-
-// drc debug
-void REGPARM(2) sh2_do_op(SH2 *sh2, int opcode)
+int sh2_execute(SH2 *sh2, int cycles)
 {
-       sh2->pc += 2;
+       static unsigned int base_pc_[2] = { 0, 0 };
+       static unsigned int end_pc_[2] = { 0, 0 };
+       static unsigned char op_flags_[2][BLOCK_INSN_LIMIT];
+       unsigned int *base_pc = &base_pc_[sh2->is_slave];
+       unsigned int *end_pc = &end_pc_[sh2->is_slave];
+       unsigned char *op_flags = op_flags_[sh2->is_slave];
+       unsigned int pc_expect;
+       UINT32 opcode;
+
+       sh2->icount = sh2->cycles_timeslice = cycles;
+
+       if (sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
+       {
+               int level = sh2->pending_level;
+               int vector = sh2->irq_callback(sh2, level);
+               sh2_do_irq(sh2, level, vector);
+       }
+       pc_expect = sh2->pc;
 
-       switch (opcode & ( 15 << 12))
+       if (sh2->icount <= 0)
+               goto out;
+
+       do
        {
+               if (!sh2->delay) {
+                       if (sh2->pc < *base_pc || sh2->pc >= *end_pc) {
+                               *base_pc = sh2->pc;
+                               scan_block(*base_pc, sh2->is_slave,
+                                       op_flags, end_pc, NULL);
+                       }
+                       if ((op_flags[(sh2->pc - *base_pc) / 2]
+                               & OF_BTARGET) || sh2->pc == *base_pc
+                               || pc_expect != sh2->pc) // branched
+                       {
+                               pc_expect = sh2->pc;
+                               if (sh2->icount < 0)
+                                       break;
+                       }
+
+                       do_sh2_trace(sh2, sh2->icount);
+               }
+               pc_expect += 2;
+
+               if (sh2->delay)
+               {
+                       sh2->ppc = sh2->delay;
+                       opcode = RW(sh2, sh2->delay);
+                       sh2->pc -= 2;
+               }
+               else
+               {
+                       sh2->ppc = sh2->pc;
+                       opcode = RW(sh2, sh2->pc);
+               }
+
+               sh2->delay = 0;
+               sh2->pc += 2;
+
+               switch (opcode & ( 15 << 12))
+               {
                case  0<<12: op0000(sh2, opcode); break;
                case  1<<12: op0001(sh2, opcode); break;
                case  2<<12: op0010(sh2, opcode); break;
@@ -160,10 +217,27 @@ void REGPARM(2) sh2_do_op(SH2 *sh2, int opcode)
                case 13<<12: op1101(sh2, opcode); break;
                case 14<<12: op1110(sh2, opcode); break;
                default: op1111(sh2, opcode); break;
+               }
+
+               sh2->icount--;
+
+               if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
+               {
+                       int level = sh2->pending_level;
+                       int vector = sh2->irq_callback(sh2, level);
+                       sh2_do_irq(sh2, level, vector);
+                       sh2->test_irq = 0;
+               }
+
        }
+       while (1);
+
+out:
+       return sh2->cycles_timeslice - sh2->icount;
 }
 
-#endif
+#endif // DRC_CMP
+#endif // DRC_SH2
 
 #ifdef SH2_STATS
 #include <stdio.h>