32x and sms savestates. Core-independent z80 state. SS bugfixing/refactoring.

[picodrive.git] / cpu / sh2 / sh2.h

diff --git a/cpu/sh2/sh2.h b/cpu/sh2/sh2.h
index 074b142..e15259d 100644 (file)
--- a/cpu/sh2/sh2.h
+++ b/cpu/sh2/sh2.h
@@ -33,6 +33,11 @@ typedef struct SH2_
        // drc stuff\r
        int             drc_tmp;        // 70\r
        int             irq_cycles;\r
+       void            *p_bios;        // convenience pointers\r
+       void            *p_da;\r
+       void            *p_sdram;       // 80\r
+       void            *p_rom;\r
+       unsigned int    pdb_io_csum[2];\r
 \r
        // interpreter stuff\r
        int             icount;         // cycles left in current timeslice\r
@@ -56,12 +61,17 @@ extern SH2 *sh2; // active sh2. XXX: consider removing
 int  sh2_init(SH2 *sh2, int is_slave);\r
 void sh2_finish(SH2 *sh2);\r
 void sh2_reset(SH2 *sh2);\r
-void sh2_irl_irq(SH2 *sh2, int level);\r
+void sh2_irl_irq(SH2 *sh2, int level, int nested_call);\r
 void sh2_internal_irq(SH2 *sh2, int level, int vector);\r
 void sh2_do_irq(SH2 *sh2, int level, int vector);\r
+void sh2_pack(const SH2 *sh2, unsigned char *buff);\r
+void sh2_unpack(SH2 *sh2, const unsigned char *buff);\r
 \r
 void sh2_execute(SH2 *sh2, int cycles);\r
 \r
+// regs, pending_int*, cycles, reserved\r
+#define SH2_STATE_SIZE ((24 + 2 + 2 + 12) * 4)\r
+\r
 // pico memhandlers\r
 // XXX: move somewhere else\r
 unsigned int REGPARM(2) p32x_sh2_read8(unsigned int a, SH2 *sh2);\r