extern u32 instruction_count;
extern u32 last_instruction;
-u32 function_cc step_debug(u32 pc, u32 cycles);
-u32 execute_arm(u32 cycles);
+void execute_arm(u32 cycles);
void raise_interrupt(irq_type irq_raised);
+void set_cpu_mode(cpu_mode_type new_mode);
+
+void debug_on();
+void debug_off(debug_state new_debug_state);
u32 function_cc execute_load_u8(u32 address);
u32 function_cc execute_load_u16(u32 address);
s32 translate_block_thumb(u32 pc, translation_region_type translation_region,
u32 smc_enable);
-#ifdef GP2X_BUILD
-#define ROM_TRANSLATION_CACHE_SIZE (1024 * 512 * 4 * 5)
-#define RAM_TRANSLATION_CACHE_SIZE (1024 * 384 * 2)
-#define BIOS_TRANSLATION_CACHE_SIZE (1024 * 128 * 2)
-#define TRANSLATION_CACHE_LIMIT_THRESHOLD (1024 * 32)
-
-#else
+#ifdef PSP_BUILD
#define ROM_TRANSLATION_CACHE_SIZE (1024 * 512 * 4)
#define RAM_TRANSLATION_CACHE_SIZE (1024 * 384)
#define BIOS_TRANSLATION_CACHE_SIZE (1024 * 128)
#define TRANSLATION_CACHE_LIMIT_THRESHOLD (1024)
+#else
+
+#define ROM_TRANSLATION_CACHE_SIZE (1024 * 512 * 4 * 5)
+#define RAM_TRANSLATION_CACHE_SIZE (1024 * 384 * 2)
+#define BIOS_TRANSLATION_CACHE_SIZE (1024 * 128 * 2)
+#define TRANSLATION_CACHE_LIMIT_THRESHOLD (1024 * 32)
+
#endif
extern u8 rom_translation_cache[ROM_TRANSLATION_CACHE_SIZE];