# define JIT_RET _A0
# define JIT_FRET _FA0
typedef jit_uint64_t jit_regset_t;
+#elif defined(__loongarch__)
+# define JIT_RA0 _A0
+# define JIT_FA0 _FA0
+# define JIT_SP _SP
+# define JIT_RET _A0
+# define JIT_FRET _FA0
+typedef jit_uint64_t jit_regset_t;
#endif
#define jit_data(u,v,w) _jit_data(_jit,u,v,w)
jit_int32_t breg; /* base register for prolog/epilog */
#endif
#if __mips__ || __ia64__ || __alpha__ || \
- (__sparc__ && __WORDSIZE == 64) || __riscv
+ (__sparc__ && __WORDSIZE == 64) || __riscv || __loongarch__
jit_int32_t carry;
#define jit_carry _jitc->carry
#endif