###############################################################################
#
-# Copyright (c) 2009, Gražvydas Ignotas
+# Copyright (c) 2009,2011 Gražvydas Ignotas
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
-# THIS SOFTWARE IS PROVIDED ''AS IS'' AND ANY
+# THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND ANY
# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-# DISCLAIMED. IN NO EVENT SHALL <copyright holder> BE LIABLE FOR ANY
+# DISCLAIMED. IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# --register-prefix-optional --bitwise-or
#
-.equ USE_VINT, 1
-.equ RELOCATE_TO_RAM, 0
+.equ USE_VINT, 0
+.equ COPY_TO_EXP, 1
+.equ RELOCATE_TO_RAM, 1
.text
.globl main
.globl INT
.globl VBL
+.globl return_to_main
##################################################
# #
.equ MMODE_START_MENU, 4
.equ MMODE_GOTO_PREDEF, 5
.equ MMODE_JMP_ADDR, 6
+.equ MMODE_PC, 7
.equ predef_addr_cnt, ((predef_addrs_end-predef_addrs)/4)
# Set up address in VDP, control port in dst
.macro VRAM_ADDR adr dst
- move.l #(((0x4000 | (\adr & 0x3fff)) << 16) | (\adr >> 14)),\dst
+ move.l #(0x40000000 | ((\adr & 0x3fff) << 16) | (\adr >> 14)),\dst
+.endm
+
+.macro VSRAM_ADDR adr dst
+ move.l #(0x40000010 | ((\adr & 0x3fff) << 16) | (\adr >> 14)),\dst
.endm
or.w #(\mode_back<<11)|(\mode_new<<8),d7
.endm
+# destroys a0,d0-d2
.macro menu_text str x y pal
lea (\str,pc),a0
move.l #\x,d0
predef_addrs:
dc.l 0x000000, 0x200000, 0x400000, 0xa00000, 0xa10000
- dc.l 0xa11100, 0xa12000, 0xa13000, 0xa14000, 0xc00000
+ dc.l 0xa11100, 0xa12000, 0xa13000, 0xa14000, 0xa15100
+ dc.l 0xc00000
predef_addrs_end:
safe_addrs:
dc.l 0xa12000, 0xa120ff
dc.l 0xa13000, 0xa130ff
safe_addrs_end:
+ dc.l 0xa15100, 0xa1513f
+safe_addrs_end_32x:
+ dc.l 0xa15180, 0xa153ff
+safe_addrs_end_32x_vdp:
+
+sizeof_bin:
+ dc.l _edata
txt_edit:
.ascii "- edit -\0"
.ascii "Go to (predef)\0"
txt_jmp_addr:
.ascii "Jump to address\0"
+txt_dump:
+ .ascii "PC Transfer\0"
txt_dtack:
.ascii "DTACK safety\0"
+txt_transfer_ready:
+ .ascii "Transfer Ready\0"
+txt_working:
+ .ascii "PC mode \0"
txt_dtack_err:
.ascii "DTACK err?\0"
txt_exc:
.align 2
main:
- /* mask irqs during init */
+ /* make sure io port 2 is doing inputs */
+ move.b #0,(0xa1000b).l
+ /* make sure irqs are masked */
move.w #0x2700,sr
+ /* take care of TMSS */
+ move.b (0xa10000).l,d0
+ andi.b #0x0f,d0
+ beq no_tmss
+ move.l #0x53454741,(0xa14000).l
+ /* want cart, not OS rom if cart pops in */
+ move.w #1,(0xa14100).l
+ /* touch VDP after TMSS setup? */
+ tst.w (0xc00004).l
+no_tmss:
+
+ /* want to do early PC transfer (with RAM/VRAM intact and such)?
+ * also give time PC to see start condition */
+ move.l #0x2000,d0
+0: dbra d0,0b
+
+ move.l #0xa10005,a0
+ btst.b #5,(a0)
+ bne no_early_transfer
+move.b #1,(0)
+ move.b #0x40,(0xa1000b).l /* port 2 ctrl */
+ move.b #0x00,(a0) /* port 2 data - start with TH low */
+ move.l #0x2000,d0
+0:
+ btst.b #4,(a0)
+ beq do_early_transfer
+ dbra d0,0b
+
+move.b #2,(0)
+ move.b #0,(0xa1000b).l
+ bra no_early_transfer /* timeout */
+
+do_early_transfer:
+move.b #9,(0)
+ bsr do_transfer
+
+no_early_transfer:
+
+.if COPY_TO_EXP
+ /* copy to expansion device if magic number is set */
+ move.l #0x400000,a1
+ cmp.w #0x1234,(a1)
+ bne 0f
+
+ move.l #0,a0
+ move.l (sizeof_bin,pc),d0
+ lsr.l #3,d0
+1:
+ move.l (a0)+,(a1)+
+ move.l (a0)+,(a1)+
+ dbra d0,1b
+0:
+.endif
.if RELOCATE_TO_RAM
- lea (0,pc),a0
+ /* we could be relocated by 32x or something else, adjust start addr */
+ lea (pc),a0
move.l a0,d0
- swap d0
- lsr.b #4,d0
- and.b #0x0f,d0
- cmp.b #0,d0
- bne 0f
+ and.l #0xff0000,d0
+ move.l d0,a0
/* copy, assume 8K size */
- move.w #0x2000/8-1,d0
- move.l #0,a0
move.l #0xFF0100,a1
+ move.l (sizeof_bin,pc),d0
+ lsr.l #3,d0
1:
move.l (a0)+,(a1)+
move.l (a0)+,(a1)+
dbra d0,1b
-0:
+
+ /* copy test code */
+ lea (test_code,pc),a0
+ move.l #0xffc000,a1
+ move.w #(test_code_end - test_code)/2-1,d0
+1:
+ move.w (a0)+,(a1)+
+ dbra d0,1b
+
lea (0f,pc),a0
- add.l #0xFF0100,a0
+ move.l a0,d0
+ and.l #0x00ffff,d0
+ add.l #0xFF0100,d0
+ move.l d0,a0
+
+ /* patch test code */
+ move.l #0xffc000,a1
+ add.w #(test_code_ret_op-test_code+2),a1
+ move.l a0,(a1)
+
jmp (a0)
0:
.endif
/* Initialize VDP */
jsr init_gfx
+ /* Clear h/v scroll */
+ movea.l #GFXDATA,a0
+ VRAM_ADDR 0x8000,(GFXCNTL)
+ move.l #0,(a0)
+ VSRAM_ADDR 0,(GFXCNTL)
+ move.l #0,(a0)
+
/* Load color data */
movea.l #0,a0
lea (colors,pc),a1
addq.b #1,d7
# movem.l d0-d4/a0-a5,-(a7)
+ btst.b #5,(0xa10005).l
+ bne no_auto_transfer
+ change_mode MMODE_PC, MMODE_MAIN
+ write_vdp_r_dst 12,(VDP12_SCREEN_V224 | VDP12_SCREEN_H320 | VDP12_STE),(GFXCNTL)
+
+no_auto_transfer:
moveq.l #0,d0
move.w d7,d0
lsr.w #6,d0
lea (jumptab,pc,d0),a0
jmp (a0)
jumptab:
+ /* branch insns here because we want to be position independent */
bra mode_main
bra mode_val_input
bra mode_edit_val /* edit val in editor */
bra mode_start_menu
bra mode_goto_predef
bra mode_jmp_addr
- bra mode_main
+ bra mode_transfer
##################### main #######################
menu_text txt_goto, 13, 11, 0
menu_text txt_goto_predef, 13, 12, 0
menu_text txt_jmp_addr, 13, 13, 0
- menu_text txt_dtack, 13, 14, 0
- menu_text txt_a_confirm, 13, 16, 2
+ menu_text txt_dump, 13, 14, 0
+ menu_text txt_dtack, 13, 15, 0
+ menu_text txt_a_confirm, 13, 17, 2
/* dtack safety on/off */
- movea.l #0xe000+26*2+14*64*2,a0
+ movea.l #0xe000+26*2+15*64*2,a0
jsr load_prepare
move.w #0x8000|'O',(a0)
btst.l #4,d6
movea.l #0xe000+11*2+11*64*2,a0
moveq.l #0,d0
move.b d5,d0
- and.b #3,d0
+ and.b #7,d0
lsl.w #7,d0
add.w d0,a0
jsr load_prepare
and.w #3,d1
beq msm_no_ud
move.b d5,d1
- and.b #3,d1
+ and.b #7,d1
btst.l #0,d0
sne d2
or.b #1,d2 /* up -1, down 1 */
add.b d2,d1
cmp.b #0,d1
bge 0f
- move.b #3,d1
+ move.b #4,d1
0:
- cmp.b #3,d1
+ cmp.b #4,d1
ble 0f
move.b #0,d1
0:
- and.b #0xfc,d5
+ and.b #0xf8,d5
or.b d1,d5
bra vbl_end
btst.l #4,d0 /* A - confirm */
beq msm_no_a
move.b d5,d1
- and.b #3,d1
+ and.b #7,d1
bne 0f
change_mode MMODE_GOTO, MMODE_MAIN
bsr start_menu_box
0:
cmp.b #3,d1
bne 0f
+ change_mode MMODE_PC, MMODE_MAIN
+ bsr start_menu_box
+ bra vbl_end
+0:
+ cmp.b #4,d1
+ bne 0f
bchg.l #4,d6
bra vbl_end
0:
start_menu_box:
movea.l #0xe000+10*2+8*64*2,a1
- move.w #10-1,d1
+ move.w #11-1,d1
0:
move.w a1,a0
jsr load_prepare
move.l d5,a0
jmp (a0)
+mode_transfer:
+ move.b #0x40,(0xa1000b).l /* port 2 ctrl */
+ move.b #0x00,(0xa10005).l /* port 2 data - start with TH low */
+
+ lea (txt_transfer_ready,pc),a0
+ move.l #13,d0
+ move.l #13,d1
+ move.l #0x8000,d2
+ jsr print
+
+wait_tl_low0:
+ move.b (0xa10005),d0
+ btst.b #4,d0
+ bne wait_tl_low0
+
+ menu_text txt_working, 13, 13, 0
+ bsr do_transfer
+ bra return_to_main
# go back to main mode
return_to_main:
write_vdp_reg 5,(0xfc00 >> 9) /* Sprite address */
write_vdp_reg 6,0
write_vdp_reg 7,0 /* Backdrop color */
- write_vdp_reg 10,1 /* Lines per hblank interrupt */
- write_vdp_reg 11,0 /* 2-cell vertical scrolling */
- write_vdp_reg 12,(VDP12_SCREEN_V224 | VDP12_SCREEN_H320)
- write_vdp_reg 13,(0x8000 >> 10) /* Horizontal scroll address */
- write_vdp_reg 15,2
- write_vdp_reg 16,(VDP16_MAP_V32 | VDP16_MAP_H64) /* layer size */
- write_vdp_reg 17,0
- write_vdp_reg 18,0xff
+ write_vdp_reg 0x0a,1 /* Lines per hblank interrupt */
+ write_vdp_reg 0x0b,0 /* 2-cell vertical scrolling */
+ write_vdp_reg 0x0c,(VDP12_SCREEN_V224 | VDP12_SCREEN_H320)
+ write_vdp_reg 0x0d,(0x8000 >> 10) /* Horizontal scroll address */
+ write_vdp_reg 0x0e,0
+ write_vdp_reg 0x0f,2
+ write_vdp_reg 0x10,(VDP16_MAP_V32 | VDP16_MAP_H64) /* layer size */
+ write_vdp_reg 0x11,0
+ write_vdp_reg 0x12,0
rts
lsr.l #8,d1
lea (safe_addrs,pc),a1
move.w #(safe_addrs_end - safe_addrs)/8-1,d2
+ cmp.l #0x4D415253,(0xa130ec) /* 'MARS' */
+ bne no_32x
+ move.w #(safe_addrs_end_32x - safe_addrs)/8-1,d2
+ move.w (0xa15100),d0
+ and.w #3,d0
+ cmp.w #3,d0 /* ADEN and nRES */
+ bne no_32x_vdp
+ btst.b #7,d0 /* FM */
+ bne no_32x_vdp
+ move.w #(safe_addrs_end_32x_vdp - safe_addrs)/8-1,d2
+no_32x_vdp:
+no_32x:
+
0:
move.l (a1)+,d0
cmp.l d0,d1
rts
+test_code:
+ nop
+
+test_code_ret_op:
+ jmp 0x123456 /* will be patched */
+test_code_end:
+
#################################################
# #
# RAM DATA #