#include <lightrec.h>
+#include <errno.h>
#include <stdbool.h>
#include <stdio.h>
#include <unistd.h>
#include <signal.h>
+#include <assert.h>
+
+#if P_HAVE_MMAP
+#include <sys/mman.h>
+#endif
#include "../cdrom.h"
#include "../gpu.h"
#include "../psxhw.h"
#include "../psxmem.h"
#include "../r3000a.h"
-#include "../new_dynarec/events.h"
+#include "../psxinterpreter.h"
+#include "../psxhle.h"
+#include "../psxevents.h"
#include "../frontend/main.h"
psxRegisters psxRegs;
Rcnt rcnts[4];
+void* code_buffer;
+
static struct lightrec_state *lightrec_state;
static char *name = "retroarch.exe";
static bool use_pcsx_interpreter;
static bool block_stepping;
+extern u32 lightrec_hacks;
+
enum my_cp2_opcodes {
OP_CP2_RTPS = 0x01,
OP_CP2_NCLIP = 0x06,
(regs->cp0[12] & regs->cp0[13] & 0x0300);
}
-static void lightrec_restore_state(struct lightrec_state *state)
+static void lightrec_tansition_to_pcsx(struct lightrec_state *state)
+{
+ psxRegs.cycle += lightrec_current_cycle_count(state) / 1024;
+ lightrec_reset_cycle_count(state, 0);
+}
+
+static void lightrec_tansition_from_pcsx(struct lightrec_state *state)
{
- lightrec_reset_cycle_count(state, psxRegs.cycle);
+ s32 cycles_left = next_interupt - psxRegs.cycle;
- if (block_stepping || has_interrupt())
+ if (block_stepping || cycles_left <= 0 || has_interrupt())
lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
- else
- lightrec_set_target_cycle_count(state, next_interupt);
+ else {
+ lightrec_set_target_cycle_count(state, cycles_left * 1024);
+ }
}
static void hw_write_byte(struct lightrec_state *state,
- u32 op, void *host, u32 mem, u8 val)
+ u32 op, void *host, u32 mem, u32 val)
{
- psxRegs.cycle = lightrec_current_cycle_count(state);
+ lightrec_tansition_to_pcsx(state);
psxHwWrite8(mem, val);
- lightrec_restore_state(state);
+ lightrec_tansition_from_pcsx(state);
}
static void hw_write_half(struct lightrec_state *state,
- u32 op, void *host, u32 mem, u16 val)
+ u32 op, void *host, u32 mem, u32 val)
{
- psxRegs.cycle = lightrec_current_cycle_count(state);
+ lightrec_tansition_to_pcsx(state);
psxHwWrite16(mem, val);
- lightrec_restore_state(state);
+ lightrec_tansition_from_pcsx(state);
}
static void hw_write_word(struct lightrec_state *state,
u32 op, void *host, u32 mem, u32 val)
{
- psxRegs.cycle = lightrec_current_cycle_count(state);
+ lightrec_tansition_to_pcsx(state);
psxHwWrite32(mem, val);
- lightrec_restore_state(state);
+ lightrec_tansition_from_pcsx(state);
}
static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
{
u8 val;
- psxRegs.cycle = lightrec_current_cycle_count(state);
+ lightrec_tansition_to_pcsx(state);
val = psxHwRead8(mem);
- lightrec_restore_state(state);
+ lightrec_tansition_from_pcsx(state);
return val;
}
{
u16 val;
- psxRegs.cycle = lightrec_current_cycle_count(state);
+ lightrec_tansition_to_pcsx(state);
val = psxHwRead16(mem);
- lightrec_restore_state(state);
+ lightrec_tansition_from_pcsx(state);
return val;
}
{
u32 val;
- psxRegs.cycle = lightrec_current_cycle_count(state);
+ lightrec_tansition_to_pcsx(state);
val = psxHwRead32(mem);
- lightrec_restore_state(state);
+ lightrec_tansition_from_pcsx(state);
return val;
}
[PSX_MAP_HW_REGISTERS] = {
/* Hardware registers */
.pc = 0x1f801000,
- .length = 0x2000,
+ .length = 0x8000,
.ops = &hw_regs_ops,
},
[PSX_MAP_CACHE_CONTROL] = {
.length = 0x200000,
.mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
},
+
+ /* Mirror of the parallel port. Only used by the PS2/PS3 BIOS */
+ [PSX_MAP_PPORT_MIRROR] = {
+ .pc = 0x1fa00000,
+ .length = 0x10000,
+ .mirror_of = &lightrec_map[PSX_MAP_PARALLEL_PORT],
+ },
+
+ /* Code buffer */
[PSX_MAP_CODE_BUFFER] = {
.length = CODE_BUFFER_SIZE,
},
}
}
+#if defined(HW_DOL) || defined(HW_RVL)
+static void lightrec_code_inv(void *ptr, uint32_t len)
+{
+ extern void DCFlushRange(void *ptr, u32 len);
+ extern void ICInvalidateRange(void *ptr, u32 len);
+
+ DCFlushRange(ptr, len);
+ ICInvalidateRange(ptr, len);
+}
+#elif defined(HW_WUP)
+static void lightrec_code_inv(void *ptr, uint32_t len)
+{
+ wiiu_clear_cache(ptr, (void *)((uintptr_t)ptr + len));
+}
+#endif
+
static const struct lightrec_ops lightrec_ops = {
.cop2_op = cop2_op,
.enable_ram = lightrec_enable_ram,
.hw_direct = lightrec_can_hw_direct,
+#if defined(HW_DOL) || defined(HW_RVL) || defined(HW_WUP)
+ .code_inv = lightrec_code_inv,
+#endif
};
static int lightrec_plugin_init(void)
lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
+ if (!LIGHTREC_CUSTOM_MAP) {
+#if P_HAVE_MMAP
+ code_buffer = mmap(0, CODE_BUFFER_SIZE,
+ PROT_EXEC | PROT_READ | PROT_WRITE,
+ MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+ if (code_buffer == MAP_FAILED)
+ return -ENOMEM;
+#else
+ code_buffer = malloc(CODE_BUFFER_SIZE);
+ if (!code_buffer)
+ return -ENOMEM;
+#endif
+ }
+
if (LIGHTREC_CUSTOM_MAP) {
lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
- lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
}
+ lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
+
use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
lightrec_state = lightrec_init(name,
return 0;
}
-extern void intExecuteBlock();
+static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2);
+static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2);
static void lightrec_plugin_execute_internal(bool block_only)
{
struct lightrec_registers *regs;
- u32 flags;
+ u32 flags, cycles_pcsx;
regs = lightrec_get_registers(lightrec_state);
gen_interupt((psxCP0Regs *)regs->cp0);
+ if (!block_only && stop)
+ return;
+
+ cycles_pcsx = next_interupt - psxRegs.cycle;
+ assert((s32)cycles_pcsx > 0);
// step during early boot so that 0x80030000 fastboot hack works
block_stepping = block_only;
if (block_only)
- next_interupt = psxRegs.cycle;
+ cycles_pcsx = 0;
if (use_pcsx_interpreter) {
- intExecuteBlock();
+ intExecuteBlock(0);
} else {
- lightrec_reset_cycle_count(lightrec_state, psxRegs.cycle);
-
+ u32 cycles_lightrec = cycles_pcsx * 1024;
if (unlikely(use_lightrec_interpreter)) {
psxRegs.pc = lightrec_run_interpreter(lightrec_state,
psxRegs.pc,
- next_interupt);
+ cycles_lightrec);
} else {
psxRegs.pc = lightrec_execute(lightrec_state,
- psxRegs.pc, next_interupt);
+ psxRegs.pc, cycles_lightrec);
}
- psxRegs.cycle = lightrec_current_cycle_count(lightrec_state);
+ lightrec_tansition_to_pcsx(lightrec_state);
flags = lightrec_exit_flags(lightrec_state);
}
if (flags & LIGHTREC_EXIT_SYSCALL)
- psxException(0x20, 0, (psxCP0Regs *)regs->cp0);
+ psxException(R3000E_Syscall << 2, 0, (psxCP0Regs *)regs->cp0);
+ if (flags & LIGHTREC_EXIT_BREAK)
+ psxException(R3000E_Bp << 2, 0, (psxCP0Regs *)regs->cp0);
+ else if (flags & LIGHTREC_EXIT_UNKNOWN_OP) {
+ u32 op = intFakeFetch(psxRegs.pc);
+ u32 hlec = op & 0x03ffffff;
+ if ((op >> 26) == 0x3b && hlec < ARRAY_SIZE(psxHLEt) && Config.HLE) {
+ lightrec_plugin_sync_regs_to_pcsx(0);
+ psxHLEt[hlec]();
+ lightrec_plugin_sync_regs_from_pcsx(0);
+ }
+ else
+ psxException(R3000E_RI << 2, 0, (psxCP0Regs *)regs->cp0);
+ }
}
if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) {
static void lightrec_plugin_execute(void)
{
- extern int stop;
-
while (!stop)
lightrec_plugin_execute_internal(false);
}
lightrec_invalidate(lightrec_state, addr, size * 4);
}
-static void lightrec_plugin_sync_regs_to_pcsx(void);
-static void lightrec_plugin_sync_regs_from_pcsx(void);
-
static void lightrec_plugin_notify(enum R3000Anote note, void *data)
{
switch (note)
/* not used, lightrec calls lightrec_enable_ram() instead */
break;
case R3000ACPU_NOTIFY_BEFORE_SAVE:
- lightrec_plugin_sync_regs_to_pcsx();
+ /* non-null 'data' means this is HLE related sync */
+ lightrec_plugin_sync_regs_to_pcsx(data == NULL);
break;
case R3000ACPU_NOTIFY_AFTER_LOAD:
- lightrec_plugin_sync_regs_from_pcsx();
+ lightrec_plugin_sync_regs_from_pcsx(data == NULL);
+ if (data == NULL)
+ lightrec_invalidate_all(lightrec_state);
break;
}
}
static void lightrec_plugin_apply_config()
{
+ u32 cycle_mult = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
+ ? Config.cycle_multiplier_override : Config.cycle_multiplier;
+ assert(cycle_mult);
+
+ lightrec_set_cycles_per_opcode(lightrec_state, cycle_mult * 1024 / 100);
}
static void lightrec_plugin_shutdown(void)
{
lightrec_destroy(lightrec_state);
+
+ if (!LIGHTREC_CUSTOM_MAP) {
+#if P_HAVE_MMAP
+ munmap(code_buffer, CODE_BUFFER_SIZE);
+#else
+ free(code_buffer);
+#endif
+ }
}
static void lightrec_plugin_reset(void)
regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
+
+ lightrec_set_unsafe_opt_flags(lightrec_state, lightrec_hacks);
}
-static void lightrec_plugin_sync_regs_from_pcsx(void)
+static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2)
{
struct lightrec_registers *regs;
regs = lightrec_get_registers(lightrec_state);
- memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
- memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
-
- lightrec_invalidate_all(lightrec_state);
+ memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
+ if (need_cp2)
+ memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
}
-static void lightrec_plugin_sync_regs_to_pcsx(void)
+static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2)
{
struct lightrec_registers *regs;
regs = lightrec_get_registers(lightrec_state);
- memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
- memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
+ memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
+ if (need_cp2)
+ memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
}
R3000Acpu psxRec =
notaz.gp2x.de / pcsx_rearmed.git / blobdiff