#if defined(BASE_ADDR_FIXED)
#elif defined(BASE_ADDR_DYNAMIC)
-char *translation_cache;
+u_char *translation_cache;
#else
-char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
+u_char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
#endif
#ifndef __MACH__
// get address that insn one after stub loads (dyna_linker arg1),
// treat it as a pointer to branch insn,
// return addr where that branch jumps to
-static int get_pointer(void *stub)
+static void *get_pointer(void *stub)
{
//printf("get_pointer(%x)\n",(int)stub);
int *i_ptr=find_extjump_insn(stub);
assert((*i_ptr&0x0f000000)==0x0a000000);
- return (int)i_ptr+((*i_ptr<<8)>>6)+8;
+ return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
}
// Find the "clean" entry point from a "dirty" entry point
}
// get source that block at addr was compiled from (host pointers)
-static void get_bounds(int addr,u_int *start,u_int *end)
+static void get_bounds(void *addr,u_int *start,u_int *end)
{
- u_int *ptr=(u_int *)addr;
+ u_int *ptr = addr;
#ifndef HAVE_ARMV7
u_int offset;
// get from literal pool
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
}
-static void emit_shldimm(int rs,int rs2,u_int imm,int rt)
-{
- assem_debug("shld %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
- assert(imm>0);
- assert(imm<32);
- //if(imm==1) ...
- assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
- assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs2],32-imm);
- output_w32(0xe1800020|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
-}
-
-static void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
-{
- assem_debug("shrd %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
- assert(imm>0);
- assert(imm<32);
- //if(imm==1) ...
- assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0xe1a00020|rd_rn_rm(rt,0,rs)|(imm<<7));
- assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs2],32-imm);
- output_w32(0xe1800000|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
-}
-
static void emit_signextend16(int rs,int rt)
{
#ifndef HAVE_ARMV6
output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
}
-static void emit_cmove_reg(int rs,int rt)
-{
- assem_debug("moveq %s,%s\n",regname[rt],regname[rs]);
- output_w32(0x01a00000|rd_rn_rm(rt,0,rs));
-}
-
static void emit_cmovne_reg(int rs,int rt)
{
assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
#define func_name(x) ""
#endif
-static void emit_call(int a)
+static void emit_call(const void *a_)
{
+ int a = (int)a_;
assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a));
u_int offset=genjmp(a);
output_w32(0xeb000000|offset);
output_w32(0xea000000|offset);
}
-static void emit_jne(int a)
+static void emit_jne(const void *a_)
{
+ int a = (int)a_;
assem_debug("bne %x\n",a);
u_int offset=genjmp(a);
output_w32(0x1a000000|offset);
output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
}
-static void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
-{
- if(map<0) emit_readword_indexed(addr, rs, rt);
- else {
- assert(addr==0);
- emit_readword_dualindexedx4(rs, map, rt);
- }
-}
-
-static void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
-{
- if(map<0) {
- if(rh>=0) emit_readword_indexed(addr, rs, rh);
- emit_readword_indexed(addr+4, rs, rl);
- }else{
- assert(rh!=rs);
- if(rh>=0) emit_readword_indexed_tlb(addr, rs, map, rh);
- emit_addimm(map,1,map);
- emit_readword_indexed_tlb(addr, rs, map, rl);
- }
-}
-
static void emit_movsbl_indexed(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
}
}
-static void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
-{
- if(map<0) emit_movsbl_indexed(addr, rs, rt);
- else {
- if(addr==0) {
- emit_shlimm(map,2,map);
- assem_debug("ldrsb %s,%s+%s\n",regname[rt],regname[rs],regname[map]);
- output_w32(0xe19000d0|rd_rn_rm(rt,rs,map));
- }else{
- assert(addr>-256&&addr<256);
- assem_debug("add %s,%s,%s,lsl #2\n",regname[rt],regname[rs],regname[map]);
- output_w32(0xe0800000|rd_rn_rm(rt,rs,map)|(2<<7));
- emit_movsbl_indexed(addr, rt, rt);
- }
- }
-}
-
static void emit_movswl_indexed(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
}
}
-static void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
-{
- assem_debug("ldrb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
- output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-
-static void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
-{
- if(map<0) emit_movzbl_indexed(addr, rs, rt);
- else {
- if(addr==0) {
- emit_movzbl_dualindexedx4(rs, map, rt);
- }else{
- emit_addimm(rs,addr,rt);
- emit_movzbl_dualindexedx4(rt, map, rt);
- }
- }
-}
-
static void emit_movzwl_indexed(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
}
}
-static void emit_readword(int addr, int rt)
+static void emit_readword(void *addr, int rt)
{
- u_int offset = addr-(u_int)&dynarec_local;
+ uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
}
-static unused void emit_movsbl(int addr, int rt)
-{
- u_int offset = addr-(u_int)&dynarec_local;
- assert(offset<256);
- assem_debug("ldrsb %s,fp+%d\n",regname[rt],offset);
- output_w32(0xe1d000d0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-
-static unused void emit_movswl(int addr, int rt)
-{
- u_int offset = addr-(u_int)&dynarec_local;
- assert(offset<256);
- assem_debug("ldrsh %s,fp+%d\n",regname[rt],offset);
- output_w32(0xe1d000f0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-
-static unused void emit_movzbl(int addr, int rt)
-{
- u_int offset = addr-(u_int)&dynarec_local;
- assert(offset<4096);
- assem_debug("ldrb %s,fp+%d\n",regname[rt],offset);
- output_w32(0xe5d00000|rd_rn_rm(rt,FP,0)|offset);
-}
-
-static unused void emit_movzwl(int addr, int rt)
-{
- u_int offset = addr-(u_int)&dynarec_local;
- assert(offset<256);
- assem_debug("ldrh %s,fp+%d\n",regname[rt],offset);
- output_w32(0xe1d000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-
static void emit_writeword_indexed(int rt, int offset, int rs)
{
assert(offset>-4096&&offset<4096);
}
}
-static void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
-{
- assem_debug("str %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
- output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-
-static void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
-{
- if(map<0) emit_writeword_indexed(rt, addr, rs);
- else {
- assert(addr==0);
- emit_writeword_dualindexedx4(rt, rs, map);
- }
-}
-
-static void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
-{
- if(map<0) {
- if(rh>=0) emit_writeword_indexed(rh, addr, rs);
- emit_writeword_indexed(rl, addr+4, rs);
- }else{
- assert(rh>=0);
- if(temp!=rs) emit_addimm(map,1,temp);
- emit_writeword_indexed_tlb(rh, addr, rs, map, temp);
- if(temp!=rs) emit_writeword_indexed_tlb(rl, addr, rs, temp, temp);
- else {
- emit_addimm(rs,4,rs);
- emit_writeword_indexed_tlb(rl, addr, rs, map, temp);
- }
- }
-}
-
static void emit_writehword_indexed(int rt, int offset, int rs)
{
assert(offset>-256&&offset<256);
}
}
-static void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
-{
- assem_debug("strb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
- output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-
-static void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
-{
- if(map<0) emit_writebyte_indexed(rt, addr, rs);
- else {
- if(addr==0) {
- emit_writebyte_dualindexedx4(rt, rs, map);
- }else{
- emit_addimm(rs,addr,temp);
- emit_writebyte_dualindexedx4(rt, temp, map);
- }
- }
-}
-
static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
}
-static void emit_writeword(int rt, int addr)
+static void emit_writeword(int rt, void *addr)
{
- u_int offset = addr-(u_int)&dynarec_local;
+ uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
assem_debug("str %s,fp+%d\n",regname[rt],offset);
output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
}
-static unused void emit_writehword(int rt, int addr)
-{
- u_int offset = addr-(u_int)&dynarec_local;
- assert(offset<256);
- assem_debug("strh %s,fp+%d\n",regname[rt],offset);
- output_w32(0xe1c000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-
-static unused void emit_writebyte(int rt, int addr)
-{
- u_int offset = addr-(u_int)&dynarec_local;
- assert(offset<4096);
- assem_debug("strb %s,fp+%d\n",regname[rt],offset);
- output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
-}
-
static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
{
assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
output_w32(0x42700000|rd_rn_rm(rt,rs,0));
}
-static void emit_orreq(u_int rs1,u_int rs2,u_int rt)
-{
- assem_debug("orreq %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
- output_w32(0x01800000|rd_rn_rm(rt,rs1,rs2));
-}
-
-static void emit_orrne(u_int rs1,u_int rs2,u_int rt)
-{
- assem_debug("orrne %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
- output_w32(0x11800000|rd_rn_rm(rt,rs1,rs2));
-}
-
static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
{
assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
}
-static void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
- assem_debug("biceq %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
- output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
-}
-
-static void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
- assem_debug("bicne %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
- output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
-}
-
static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
{
assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
}
-static void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
- assem_debug("biceq %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
- output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
-}
-
-static void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
- assem_debug("bicne %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
- output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
-}
-
static void emit_teq(int rs, int rt)
{
assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
}
-static unused void emit_bicne_imm(int rs,int imm,int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("bicne %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0x13c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static unused void emit_biccs_imm(int rs,int imm,int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("biccs %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0x23c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static unused void emit_bicvc_imm(int rs,int imm,int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("bicvc %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0x73c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static unused void emit_bichi_imm(int rs,int imm,int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("bichi %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0x83c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static unused void emit_orrvs_imm(int rs,int imm,int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("orrvs %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0x63800000|rd_rn_rm(rt,rs,0)|armval);
-}
-
static void emit_orrne_imm(int rs,int imm,int rt)
{
u_int armval;
set_jump_target(jaddr, out);
}
-static void emit_extjump2(u_int addr, int target, void *linker)
+static void emit_extjump2(u_char *addr, int target, void *linker)
{
u_char *ptr=(u_char *)addr;
assert((ptr[3]&0x0e)==0xa);
(void)ptr;
emit_loadlp(target,0);
- emit_loadlp(addr,1);
- assert(addr>=BASE_ADDR&&addr<(BASE_ADDR+(1<<TARGET_SIZE_2)));
+ emit_loadlp((u_int)addr,1);
+ assert(addr>=translation_cache&&addr<(translation_cache+(1<<TARGET_SIZE_2)));
//assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
//DEBUG >
#ifdef DEBUG_CYCLE_COUNT
- emit_readword((int)&last_count,ECX);
+ emit_readword(&last_count,ECX);
emit_add(HOST_CCREG,ECX,HOST_CCREG);
- emit_readword((int)&next_interupt,ECX);
- emit_writeword(HOST_CCREG,(int)&Count);
+ emit_readword(&next_interupt,ECX);
+ emit_writeword(HOST_CCREG,&Count);
emit_sub(HOST_CCREG,ECX,HOST_CCREG);
- emit_writeword(ECX,(int)&last_count);
+ emit_writeword(ECX,&last_count);
#endif
//DEBUG <
emit_jmp(linker);
}
-static void emit_extjump(int addr, int target)
+static void emit_extjump(void *addr, int target)
{
emit_extjump2(addr, target, dyna_linker);
}
-static void emit_extjump_ds(int addr, int target)
+static void emit_extjump_ds(void *addr, int target)
{
emit_extjump2(addr, target, dyna_linker_ds);
}
}
if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
temp2=1;
- emit_readword((int)&mem_rtab,temp);
+ emit_readword(&mem_rtab,temp);
emit_shrimm(rs,12,temp2);
emit_readword_dualindexedx4(temp,temp2,temp2);
emit_lsls_imm(temp2,1,temp2);
if(!regs_saved)
save_regs(reglist);
- int handler=0;
+ void *handler=NULL;
if(type==LOADB_STUB||type==LOADBU_STUB)
- handler=(int)jump_handler_read8;
+ handler=jump_handler_read8;
if(type==LOADH_STUB||type==LOADHU_STUB)
- handler=(int)jump_handler_read16;
+ handler=jump_handler_read16;
if(type==LOADW_STUB)
- handler=(int)jump_handler_read32;
- assert(handler!=0);
+ handler=jump_handler_read32;
+ assert(handler);
pass_args(rs,temp2);
int cc=get_reg(i_regmap,CCREG);
if(cc<0)
}
// return memhandler, or get directly accessable address and return 0
-static u_int get_direct_memhandler(void *table,u_int addr,enum stub_type type,u_int *addr_host)
+static void *get_direct_memhandler(void *table,u_int addr,enum stub_type type,u_int *addr_host)
{
u_int l1,l2=0;
l1=((u_int *)table)[addr>>12];
if((l1&(1<<31))==0) {
u_int v=l1<<1;
*addr_host=v+addr;
- return 0;
+ return NULL;
}
else {
l1<<=1;
if((l2&(1<<31))==0) {
u_int v=l2<<1;
*addr_host=v+(addr&0xfff);
- return 0;
+ return NULL;
}
- return l2<<1;
+ return (void *)(l2<<1);
}
}
int rt=get_reg(regmap,target);
if(rs<0) rs=get_reg(regmap,-1);
assert(rs>=0);
- u_int handler,host_addr=0,is_dynamic,far_call=0;
+ u_int host_addr=0,is_dynamic,far_call=0;
+ void *handler;
int cc=get_reg(regmap,CCREG);
if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt))
return;
- handler=get_direct_memhandler(mem_rtab,addr,type,&host_addr);
- if (handler==0) {
+ handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
+ if (handler == NULL) {
if(rt<0||rt1[i]==0)
return;
if(addr!=host_addr)
is_dynamic=pcsxmem_is_handler_dynamic(addr);
if(is_dynamic) {
if(type==LOADB_STUB||type==LOADBU_STUB)
- handler=(int)jump_handler_read8;
+ handler=jump_handler_read8;
if(type==LOADH_STUB||type==LOADHU_STUB)
- handler=(int)jump_handler_read16;
+ handler=jump_handler_read16;
if(type==LOADW_STUB)
- handler=(int)jump_handler_read32;
+ handler=jump_handler_read32;
}
// call a memhandler
emit_movimm(addr,0);
else if(rs!=0)
emit_mov(rs,0);
- int offset=(int)handler-(int)out-8;
+ int offset=(u_char *)handler-out-8;
if(offset<-33554432||offset>=33554432) {
// unreachable memhandler, a plugin func perhaps
- emit_movimm(handler,12);
+ emit_movimm((u_int)handler,12);
far_call=1;
}
if(cc<0)
emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
}
else {
- emit_readword((int)&last_count,3);
+ emit_readword(&last_count,3);
emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
emit_add(2,3,2);
- emit_writeword(2,(int)&Count);
+ emit_writeword(2,&Count);
}
if(far_call)
}
if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
temp2=3;
- emit_readword((int)&mem_wtab,temp);
+ emit_readword(&mem_wtab,temp);
emit_shrimm(rs,12,temp2);
emit_readword_dualindexedx4(temp,temp2,temp2);
emit_lsls_imm(temp2,1,temp2);
if(!regs_saved)
save_regs(reglist);
- int handler=0;
+ void *handler=NULL;
switch(type) {
- case STOREB_STUB: handler=(int)jump_handler_write8; break;
- case STOREH_STUB: handler=(int)jump_handler_write16; break;
- case STOREW_STUB: handler=(int)jump_handler_write32; break;
+ case STOREB_STUB: handler=jump_handler_write8; break;
+ case STOREH_STUB: handler=jump_handler_write16; break;
+ case STOREW_STUB: handler=jump_handler_write32; break;
default: assert(0);
}
- assert(handler!=0);
+ assert(handler);
pass_args(rs,rt);
if(temp2!=3)
emit_mov(temp2,3);
int rt=get_reg(regmap,target);
assert(rs>=0);
assert(rt>=0);
- u_int handler,host_addr=0;
- handler=get_direct_memhandler(mem_wtab,addr,type,&host_addr);
- if (handler==0) {
+ u_int host_addr=0;
+ void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
+ if (handler == NULL) {
if(addr!=host_addr)
emit_movimm_from(addr,rs,host_addr,rs);
switch(type) {
if(cc<0)
emit_loadreg(CCREG,2);
emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
- emit_movimm(handler,3);
+ emit_movimm((u_int)handler,3);
// returns new cycle_count
- emit_call((int)jump_handler_write_h);
+ emit_call(jump_handler_write_h);
emit_addimm(0,-CLOCK_ADJUST(adj+1),cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
if(cc<0)
emit_loadreg(CCREG,2);
emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
- emit_call((int)(opcode[i]==0x2a?jump_handle_swl:jump_handle_swr));
+ emit_call((opcode[i]==0x2a?jump_handle_swl:jump_handle_swr));
emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d+1),cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
emit_jmp(stubs[n].retaddr); // return address
#else
emit_andimm(addr,0xfffffffc,temp2);
- emit_writeword(temp2,(int)&address);
+ emit_writeword(temp2,&address);
save_regs(reglist);
emit_shrimm(addr,16,1);
emit_call((int)&indirect_jump_indexed);
restore_regs(reglist);
- emit_readword((int)&readmem_dword,temp2);
+ emit_readword(&readmem_dword,temp2);
int temp=addr; //hmh
emit_shlimm(addr,3,temp);
emit_andimm(temp,24,temp);
emit_bic_lsl(temp2,HOST_TEMPREG,temp,temp2);
emit_orrshl(rt,temp,temp2);
}
- emit_readword((int)&address,addr);
- emit_writeword(temp2,(int)&word);
+ emit_readword(&address,addr);
+ emit_writeword(temp2,&word);
//save_regs(reglist); // don't need to, no state changes
emit_shrimm(addr,16,1);
emit_movimm((u_int)writemem,0);
//emit_call((int)&indirect_jump_indexed);
emit_mov(15,14);
emit_readword_dualindexedx4(0,1,15);
- emit_readword((int)&Count,HOST_TEMPREG);
- emit_readword((int)&next_interupt,2);
+ emit_readword(&Count,HOST_TEMPREG);
+ emit_readword(&next_interupt,2);
emit_addimm(HOST_TEMPREG,-2*stubs[n].d-2,HOST_TEMPREG);
- emit_writeword(2,(int)&last_count);
+ emit_writeword(2,&last_count);
emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
if(cc<0) {
emit_storereg(CCREG,HOST_TEMPREG);
set_jump_target(stubs[n].addr, out);
save_regs(reglist);
if(stubs[n].b!=0) emit_mov(stubs[n].b,0);
- emit_call((int)&invalidate_addr);
+ emit_call(&invalidate_addr);
restore_regs(reglist);
emit_jmp(stubs[n].retaddr); // return address
}
emit_movw(slen*4,3);
#endif
emit_movimm(start+i*4,0);
- emit_call((int)start<(int)0xC0000000?(int)&verify_code:(int)&verify_code_vm);
+ emit_call((int)start<(int)0xC0000000?&verify_code:&verify_code_vm);
void *entry = out;
load_regs_entry(i);
if (entry == out)
emit_movw(slen*4,3);
#endif
emit_movimm(start+1,0);
- emit_call((int)&verify_code_ds);
+ emit_call(&verify_code_ds);
}
static void do_cop1stub(int n)
static void loadlr_assemble_arm(int i,struct regstat *i_regs)
{
- int s,th,tl,temp,temp2,addr,map=-1;
+ int s,tl,temp,temp2,addr;
int offset;
void *jaddr=0;
int memtarget=0,c=0;
int fastload_reg_override=0;
u_int hr,reglist=0;
- th=get_reg(i_regs->regmap,rt1[i]|64);
tl=get_reg(i_regs->regmap,rt1[i]);
s=get_reg(i_regs->regmap,rs1[i]);
temp=get_reg(i_regs->regmap,-1);
}
}
if(!c) {
- #ifdef RAM_OFFSET
- map=get_reg(i_regs->regmap,ROREG);
- if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG);
- #endif
emit_shlimm(addr,3,temp);
if (opcode[i]==0x22||opcode[i]==0x26) {
emit_andimm(addr,0xFFFFFFFC,temp2); // LWL/LWR
if(!c||memtarget) {
int a=temp2;
if(fastload_reg_override) a=fastload_reg_override;
- //emit_readword_indexed((int)rdram-0x80000000,temp2,temp2);
- emit_readword_indexed_tlb(0,a,map,temp2);
+ emit_readword_indexed(0,a,temp2);
if(jaddr) add_stub_r(LOADW_STUB,jaddr,out,i,temp2,i_regs,ccadj[i],reglist);
}
else
//emit_storereg(rt1[i],tl); // DEBUG
}
if (opcode[i]==0x1A||opcode[i]==0x1B) { // LDL/LDR
- // FIXME: little endian, fastload_reg_override
- int temp2h=get_reg(i_regs->regmap,FTEMP|64);
- if(!c||memtarget) {
- //if(th>=0) emit_readword_indexed((int)rdram-0x80000000,temp2,temp2h);
- //emit_readword_indexed((int)rdram-0x7FFFFFFC,temp2,temp2);
- emit_readdword_indexed_tlb(0,temp2,map,temp2h,temp2);
- if(jaddr) add_stub_r(LOADD_STUB,jaddr,out,i,temp2,i_regs,ccadj[i],reglist);
- }
- else
- inline_readstub(LOADD_STUB,i,(constmap[i][s]+offset)&0xFFFFFFF8,i_regs->regmap,FTEMP,ccadj[i],reglist);
- if(rt1[i]) {
- assert(th>=0);
- assert(tl>=0);
- emit_testimm(temp,32);
- emit_andimm(temp,24,temp);
- if (opcode[i]==0x1A) { // LDL
- emit_rsbimm(temp,32,HOST_TEMPREG);
- emit_shl(temp2h,temp,temp2h);
- emit_orrshr(temp2,HOST_TEMPREG,temp2h);
- emit_movimm(-1,HOST_TEMPREG);
- emit_shl(temp2,temp,temp2);
- emit_cmove_reg(temp2h,th);
- emit_biceq_lsl(tl,HOST_TEMPREG,temp,tl);
- emit_bicne_lsl(th,HOST_TEMPREG,temp,th);
- emit_orreq(temp2,tl,tl);
- emit_orrne(temp2,th,th);
- }
- if (opcode[i]==0x1B) { // LDR
- emit_xorimm(temp,24,temp);
- emit_rsbimm(temp,32,HOST_TEMPREG);
- emit_shr(temp2,temp,temp2);
- emit_orrshl(temp2h,HOST_TEMPREG,temp2);
- emit_movimm(-1,HOST_TEMPREG);
- emit_shr(temp2h,temp,temp2h);
- emit_cmovne_reg(temp2,tl);
- emit_bicne_lsr(th,HOST_TEMPREG,temp,th);
- emit_biceq_lsr(tl,HOST_TEMPREG,temp,tl);
- emit_orrne(temp2h,th,th);
- emit_orreq(temp2h,tl,tl);
- }
- }
+ assert(0);
}
}
#define loadlr_assemble loadlr_assemble_arm
if(opcode2[i]==0) // MFC0
{
signed char t=get_reg(i_regs->regmap,rt1[i]);
- char copr=(source[i]>>11)&0x1f;
+ u_int copr=(source[i]>>11)&0x1f;
//assert(t>=0); // Why does this happen? OOT is weird
if(t>=0&&rt1[i]!=0) {
- emit_readword((int)®_cop0+copr*4,t);
+ emit_readword(®_cop0[copr],t);
}
}
else if(opcode2[i]==4) // MTC0
assert(s>=0);
wb_register(rs1[i],i_regs->regmap,i_regs->dirty,i_regs->is32);
if(copr==9||copr==11||copr==12||copr==13) {
- emit_readword((int)&last_count,HOST_TEMPREG);
+ emit_readword(&last_count,HOST_TEMPREG);
emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
emit_add(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
- emit_writeword(HOST_CCREG,(int)&Count);
+ emit_writeword(HOST_CCREG,&Count);
}
// What a mess. The status register (12) can enable interrupts,
// so needs a special case to handle a pending interrupt.
// burn cycles to cause cc_interrupt, which will
// reschedule next_interupt. Relies on CCREG from above.
assem_debug("MTC0 DS %d\n", copr);
- emit_writeword(HOST_CCREG,(int)&last_count);
+ emit_writeword(HOST_CCREG,&last_count);
emit_movimm(0,HOST_CCREG);
emit_storereg(CCREG,HOST_CCREG);
emit_loadreg(rs1[i],1);
emit_movimm(copr,0);
- emit_call((int)pcsx_mtc0_ds);
+ emit_call(pcsx_mtc0_ds);
emit_loadreg(rs1[i],s);
return;
}
emit_movimm(start+i*4+4,HOST_TEMPREG);
- emit_writeword(HOST_TEMPREG,(int)&pcaddr);
+ emit_writeword(HOST_TEMPREG,&pcaddr);
emit_movimm(0,HOST_TEMPREG);
- emit_writeword(HOST_TEMPREG,(int)&pending_exception);
+ emit_writeword(HOST_TEMPREG,&pending_exception);
}
//else if(copr==12&&is_delayslot) emit_call((int)MTC0_R12);
//else
else if(s!=1)
emit_mov(s,1);
emit_movimm(copr,0);
- emit_call((int)pcsx_mtc0);
+ emit_call(pcsx_mtc0);
if(copr==9||copr==11||copr==12||copr==13) {
- emit_readword((int)&Count,HOST_CCREG);
- emit_readword((int)&next_interupt,HOST_TEMPREG);
+ emit_readword(&Count,HOST_CCREG);
+ emit_readword(&next_interupt,HOST_TEMPREG);
emit_addimm(HOST_CCREG,-CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
emit_sub(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
- emit_writeword(HOST_TEMPREG,(int)&last_count);
+ emit_writeword(HOST_TEMPREG,&last_count);
emit_storereg(CCREG,HOST_CCREG);
}
if(copr==12||copr==13) {
assert(!is_delayslot);
- emit_readword((int)&pending_exception,14);
+ emit_readword(&pending_exception,14);
emit_test(14,14);
- emit_jne((int)&do_interrupt);
+ emit_jne(&do_interrupt);
}
emit_loadreg(rs1[i],s);
if(get_reg(i_regs->regmap,rs1[i]|64)>=0)
assert(opcode2[i]==0x10);
if((source[i]&0x3f)==0x10) // RFE
{
- emit_readword((int)&Status,0);
+ emit_readword(&Status,0);
emit_andimm(0,0x3c,1);
emit_andimm(0,~0xf,0);
emit_orrshr_imm(1,2,0);
- emit_writeword(0,(int)&Status);
+ emit_writeword(0,&Status);
}
}
}
case 9:
case 10:
case 11:
- emit_readword((int)®_cop2d[copr],tl);
+ emit_readword(®_cop2d[copr],tl);
emit_signextend16(tl,tl);
- emit_writeword(tl,(int)®_cop2d[copr]); // hmh
+ emit_writeword(tl,®_cop2d[copr]); // hmh
break;
case 7:
case 16:
case 17:
case 18:
case 19:
- emit_readword((int)®_cop2d[copr],tl);
+ emit_readword(®_cop2d[copr],tl);
emit_andimm(tl,0xffff,tl);
- emit_writeword(tl,(int)®_cop2d[copr]);
+ emit_writeword(tl,®_cop2d[copr]);
break;
case 15:
- emit_readword((int)®_cop2d[14],tl); // SXY2
- emit_writeword(tl,(int)®_cop2d[copr]);
+ emit_readword(®_cop2d[14],tl); // SXY2
+ emit_writeword(tl,®_cop2d[copr]);
break;
case 28:
case 29:
- emit_readword((int)®_cop2d[9],temp);
+ emit_readword(®_cop2d[9],temp);
emit_testimm(temp,0x8000); // do we need this?
emit_andimm(temp,0xf80,temp);
emit_andne_imm(temp,0,temp);
emit_shrimm(temp,7,tl);
- emit_readword((int)®_cop2d[10],temp);
+ emit_readword(®_cop2d[10],temp);
emit_testimm(temp,0x8000);
emit_andimm(temp,0xf80,temp);
emit_andne_imm(temp,0,temp);
emit_orrshr_imm(temp,2,tl);
- emit_readword((int)®_cop2d[11],temp);
+ emit_readword(®_cop2d[11],temp);
emit_testimm(temp,0x8000);
emit_andimm(temp,0xf80,temp);
emit_andne_imm(temp,0,temp);
emit_orrshl_imm(temp,3,tl);
- emit_writeword(tl,(int)®_cop2d[copr]);
+ emit_writeword(tl,®_cop2d[copr]);
break;
default:
- emit_readword((int)®_cop2d[copr],tl);
+ emit_readword(®_cop2d[copr],tl);
break;
}
}
{
switch (copr) {
case 15:
- emit_readword((int)®_cop2d[13],temp); // SXY1
- emit_writeword(sl,(int)®_cop2d[copr]);
- emit_writeword(temp,(int)®_cop2d[12]); // SXY0
- emit_readword((int)®_cop2d[14],temp); // SXY2
- emit_writeword(sl,(int)®_cop2d[14]);
- emit_writeword(temp,(int)®_cop2d[13]); // SXY1
+ emit_readword(®_cop2d[13],temp); // SXY1
+ emit_writeword(sl,®_cop2d[copr]);
+ emit_writeword(temp,®_cop2d[12]); // SXY0
+ emit_readword(®_cop2d[14],temp); // SXY2
+ emit_writeword(sl,®_cop2d[14]);
+ emit_writeword(temp,®_cop2d[13]); // SXY1
break;
case 28:
emit_andimm(sl,0x001f,temp);
emit_shlimm(temp,7,temp);
- emit_writeword(temp,(int)®_cop2d[9]);
+ emit_writeword(temp,®_cop2d[9]);
emit_andimm(sl,0x03e0,temp);
emit_shlimm(temp,2,temp);
- emit_writeword(temp,(int)®_cop2d[10]);
+ emit_writeword(temp,®_cop2d[10]);
emit_andimm(sl,0x7c00,temp);
emit_shrimm(temp,3,temp);
- emit_writeword(temp,(int)®_cop2d[11]);
- emit_writeword(sl,(int)®_cop2d[28]);
+ emit_writeword(temp,®_cop2d[11]);
+ emit_writeword(sl,®_cop2d[28]);
break;
case 30:
emit_movs(sl,temp);
emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
emit_jns((int)out-2*4);
#endif
- emit_writeword(sl,(int)®_cop2d[30]);
- emit_writeword(temp,(int)®_cop2d[31]);
+ emit_writeword(sl,®_cop2d[30]);
+ emit_writeword(temp,®_cop2d[31]);
break;
case 31:
break;
default:
- emit_writeword(sl,(int)®_cop2d[copr]);
+ emit_writeword(sl,®_cop2d[copr]);
break;
}
}
{
signed char tl=get_reg(i_regs->regmap,rt1[i]);
if(tl>=0&&rt1[i]!=0)
- emit_readword((int)®_cop2c[copr],tl);
+ emit_readword(®_cop2c[copr],tl);
}
else if (opcode2[i]==6) // CTC2
{
temp=sl;
break;
}
- emit_writeword(temp,(int)®_cop2c[copr]);
+ emit_writeword(temp,®_cop2c[copr]);
assert(sl>=0);
}
}
static void c2op_call_MACtoIR(int lm,int need_flags)
{
if(need_flags)
- emit_call((int)(lm?gteMACtoIR_lm1:gteMACtoIR_lm0));
+ emit_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
else
- emit_call((int)(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf));
+ emit_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
}
static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
{
- emit_call((int)func);
+ emit_call(func);
// func is C code and trashes r0
emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
if(need_flags||need_ir)
c2op_call_MACtoIR(lm,need_flags);
- emit_call((int)(need_flags?gteMACtoRGB:gteMACtoRGB_nf));
+ emit_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
}
static void c2op_assemble(int i,struct regstat *i_regs)
if(mx<3)
emit_addimm(0,32*4+mx*8*4,6);
else
- emit_readword((int)&zeromem_ptr,6);
+ emit_readword(&zeromem_ptr,6);
if(cv<3)
emit_addimm(0,32*4+(cv*8+5)*4,7);
else
- emit_readword((int)&zeromem_ptr,7);
+ emit_readword(&zeromem_ptr,7);
#ifdef __ARM_NEON__
emit_movimm(source[i],1); // opcode
- emit_call((int)gteMVMVA_part_neon);
+ emit_call(gteMVMVA_part_neon);
if(need_flags) {
emit_movimm(lm,1);
- emit_call((int)gteMACtoIR_flags_neon);
+ emit_call(gteMACtoIR_flags_neon);
}
#else
if(cv==3&&shift)
#else /* if not HAVE_ARMV5 */
c2op_prologue(c2op,reglist);
emit_movimm(source[i],1); // opcode
- emit_writeword(1,(int)&psxRegs.code);
+ emit_writeword(1,&psxRegs.code);
emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
#endif
break;
}
case GTE_OP:
c2op_prologue(c2op,reglist);
- emit_call((int)(shift?gteOP_part_shift:gteOP_part_noshift));
+ emit_call(shift?gteOP_part_shift:gteOP_part_noshift);
if(need_flags||need_ir) {
emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
c2op_call_MACtoIR(lm,need_flags);
break;
case GTE_SQR:
c2op_prologue(c2op,reglist);
- emit_call((int)(shift?gteSQR_part_shift:gteSQR_part_noshift));
+ emit_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
if(need_flags||need_ir) {
emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
c2op_call_MACtoIR(lm,need_flags);
c2op_prologue(c2op,reglist);
#ifdef DRC_DBG
emit_movimm(source[i],1); // opcode
- emit_writeword(1,(int)&psxRegs.code);
+ emit_writeword(1,&psxRegs.code);
#endif
- emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
+ emit_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
break;
}
c2op_epilogue(c2op,reglist);
static void do_miniht_insert(u_int return_address,int rt,int temp) {
#ifndef HAVE_ARMV7
emit_movimm(return_address,rt); // PC into link register
- add_to_linker((int)out,return_address,1);
+ add_to_linker(out,return_address,1);
emit_pcreladdr(temp);
- emit_writeword(rt,(int)&mini_ht[(return_address&0xFF)>>3][0]);
- emit_writeword(temp,(int)&mini_ht[(return_address&0xFF)>>3][1]);
+ emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
+ emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
#else
emit_movw(return_address&0x0000FFFF,rt);
- add_to_linker((int)out,return_address,1);
+ add_to_linker(out,return_address,1);
emit_pcreladdr(temp);
- emit_writeword(temp,(int)&mini_ht[(return_address&0xFF)>>3][1]);
+ emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
emit_movt(return_address&0xFFFF0000,rt);
- emit_writeword(rt,(int)&mini_ht[(return_address&0xFF)>>3][0]);
+ emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
#endif
}
}
}
-
-/* using strd could possibly help but you'd have to allocate registers in pairs
-static void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)
-{
- int hr;
- int wrote=-1;
- for(hr=HOST_REGS-1;hr>=0;hr--) {
- if(hr!=EXCLUDE_REG) {
- if(pre[hr]!=entry[hr]) {
- if(pre[hr]>=0) {
- if((dirty>>hr)&1) {
- if(get_reg(entry,pre[hr])<0) {
- if(pre[hr]<64) {
- if(!((u>>pre[hr])&1)) {
- if(hr<10&&(~hr&1)&&(pre[hr+1]<0||wrote==hr+1)) {
- if( ((is32>>pre[hr])&1) && !((uu>>pre[hr])&1) ) {
- emit_sarimm(hr,31,hr+1);
- emit_strdreg(pre[hr],hr);
- }
- else
- emit_storereg(pre[hr],hr);
- }else{
- emit_storereg(pre[hr],hr);
- if( ((is32>>pre[hr])&1) && !((uu>>pre[hr])&1) ) {
- emit_sarimm(hr,31,hr);
- emit_storereg(pre[hr]|64,hr);
- }
- }
- }
- }else{
- if(!((uu>>(pre[hr]&63))&1) && !((is32>>(pre[hr]&63))&1)) {
- emit_storereg(pre[hr],hr);
- }
- }
- wrote=hr;
- }
- }
- }
- }
- }
- }
- for(hr=0;hr<HOST_REGS;hr++) {
- if(hr!=EXCLUDE_REG) {
- if(pre[hr]!=entry[hr]) {
- if(pre[hr]>=0) {
- int nr;
- if((nr=get_reg(entry,pre[hr]))>=0) {
- emit_mov(hr,nr);
- }
- }
- }
- }
- }
-}
-#define wb_invalidate wb_invalidate_arm
-*/
-
static void mark_clear_cache(void *target)
{
- u_long offset = (char *)target - (char *)BASE_ADDR;
+ u_long offset = (u_char *)target - translation_cache;
u_int mask = 1u << ((offset >> 12) & 31);
if (!(needs_clear_cache[offset >> 17] & mask)) {
char *start = (char *)((u_long)target & ~4095ul);
{
u_int bitmap=needs_clear_cache[i];
if(bitmap) {
- u_int start,end;
+ u_char *start, *end;
for(j=0;j<32;j++)
{
if(bitmap&(1<<j)) {
- start=(u_int)BASE_ADDR+i*131072+j*4096;
+ start=translation_cache+i*131072+j*4096;
end=start+4095;
j++;
while(j<32) {
end+=4096;
j++;
}else{
- end_tcache_write((void *)start,(void *)end);
+ end_tcache_write(start, end);
break;
}
}