#include "pcnt.h"
#include "arm_features.h"
-#ifndef __MACH__
-#define CALLER_SAVE_REGS 0x100f
-#else
-#define CALLER_SAVE_REGS 0x120f
-#endif
-
#define unused __attribute__((unused))
#ifdef DRC_DBG
0,
0};
-static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
-
/* Linker */
static void set_jump_target(void *addr, void *target_)
output_w32(0xe5900000|rd_rn_rm(rt,15,0));
}
+#ifdef HAVE_ARMV7
static void emit_movw(u_int imm,u_int rt)
{
assert(imm<65536);
assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
}
+#endif
static void emit_movimm(u_int imm,u_int rt)
{
static void emit_loadreg(int r, int hr)
{
- if(r&64) {
- SysPrintf("64bit load in 32bit mode!\n");
- assert(0);
- return;
- }
- if((r&63)==0)
+ assert(hr != EXCLUDE_REG);
+ if (r == 0)
emit_zeroreg(hr);
else {
- int addr = (int)&psxRegs.GPR.r[r];
+ void *addr;
switch (r) {
//case HIREG: addr = &hi; break;
//case LOREG: addr = &lo; break;
- case CCREG: addr = (int)&cycle_count; break;
- case CSREG: addr = (int)&Status; break;
- case INVCP: addr = (int)&invc_ptr; break;
- case ROREG: addr = (int)&ram_offset; break;
- default: assert(r < 34); break;
+ case CCREG: addr = &cycle_count; break;
+ case CSREG: addr = &Status; break;
+ case INVCP: addr = &invc_ptr; break;
+ case ROREG: addr = &ram_offset; break;
+ default:
+ assert(r < 34);
+ addr = &psxRegs.GPR.r[r];
+ break;
}
- u_int offset = addr-(u_int)&dynarec_local;
+ u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
assert(offset<4096);
- assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
+ assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
}
}
static void emit_storereg(int r, int hr)
{
- if(r&64) {
- SysPrintf("64bit store in 32bit mode!\n");
- assert(0);
- return;
- }
+ assert(hr != EXCLUDE_REG);
int addr = (int)&psxRegs.GPR.r[r];
switch (r) {
//case HIREG: addr = &hi; break;
}
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<4096);
- assem_debug("str %s,fp+%d\n",regname[hr],offset);
+ assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
}
output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
}
+static void emit_cmovs_imm(int imm,int rt)
+{
+ assem_debug("movmi %s,#%d\n",regname[rt],imm);
+ u_int armval;
+ genimm_checked(imm,&armval);
+ output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
+}
+
static void emit_cmovne_reg(int rs,int rt)
{
assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
}
-static void emit_andne_imm(int rs,int imm,int rt)
-{
- u_int armval;
- genimm_checked(imm,&armval);
- assem_debug("andne %s,%s,#%d\n",regname[rt],regname[rs],imm);
- output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
-}
-
static unused void emit_addpl_imm(int rs,int imm,int rt)
{
u_int armval;
emit_loadlp(target,0);
emit_loadlp((u_int)addr,1);
- assert(addr>=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<<TARGET_SIZE_2)));
+ assert(ndrc->translation_cache <= addr &&
+ addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
//assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
//DEBUG >
#ifdef DEBUG_CYCLE_COUNT
int cc=get_reg(i_regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2);
+ emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
emit_far_call(handler);
if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
mov_loadtype_adj(type,0,rt);
{
int rs=get_reg(regmap,target);
int rt=get_reg(regmap,target);
- if(rs<0) rs=get_reg(regmap,-1);
+ if(rs<0) rs=get_reg_temp(regmap);
assert(rs>=0);
u_int is_dynamic;
uintptr_t host_addr = 0;
void *handler;
int cc=get_reg(regmap,CCREG);
- if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj),cc,target?rs:-1,rt))
+ if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
return;
handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
if (handler == NULL) {
emit_loadreg(CCREG,2);
if(is_dynamic) {
emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
+ emit_addimm(cc<0?2:cc,adj,2);
}
else {
emit_readword(&last_count,3);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
+ emit_addimm(cc<0?2:cc,adj,2);
emit_add(2,3,2);
emit_writeword(2,&Count);
}
int cc=get_reg(i_regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2);
+ emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
// returns new cycle_count
emit_far_call(handler);
- emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d),cc<0?2:cc);
+ emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
if(restore_jump)
static void inline_writestub(enum stub_type type, int i, u_int addr,
const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs=get_reg(regmap,-1);
+ int rs=get_reg_temp(regmap);
int rt=get_reg(regmap,target);
assert(rs>=0);
assert(rt>=0);
int cc=get_reg(regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
+ emit_addimm(cc<0?2:cc,adj,2);
emit_movimm((u_int)handler,3);
// returns new cycle_count
emit_far_call(jump_handler_write_h);
- emit_addimm(0,-CLOCK_ADJUST(adj),cc<0?2:cc);
+ emit_addimm(0,-adj,cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
restore_regs(reglist);
}
#else
if(cv==3&&shift)
- emit_far_call((int)gteMVMVA_part_cv3sh12_arm);
+ emit_far_call(gteMVMVA_part_cv3sh12_arm);
else {
emit_movimm(shift,1);
- emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
+ emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
}
if(need_flags||need_ir)
c2op_call_MACtoIR(lm,need_flags);
static void do_mfc2_31_one(u_int copr,signed char temp)
{
emit_readword(®_cop2d[copr],temp);
- emit_testimm(temp,0x8000); // do we need this?
- emit_andne_imm(temp,0,temp);
- emit_cmpimm(temp,0xf80);
- emit_andimm(temp,0xf80,temp);
- emit_cmovae_imm(0xf80,temp);
+ emit_lsls_imm(temp,16,temp);
+ emit_cmovs_imm(0,temp);
+ emit_cmpimm(temp,0xf80<<16);
+ emit_andimm(temp,0xf80<<16,temp);
+ emit_cmovae_imm(0xf80<<16,temp);
}
static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
temp = HOST_TEMPREG;
}
do_mfc2_31_one(9,temp);
- emit_shrimm(temp,7,tl);
+ emit_shrimm(temp,7+16,tl);
do_mfc2_31_one(10,temp);
- emit_orrshr_imm(temp,2,tl);
+ emit_orrshr_imm(temp,2+16,tl);
do_mfc2_31_one(11,temp);
- emit_orrshl_imm(temp,3,tl);
+ emit_orrshr_imm(temp,-3+16,tl);
emit_writeword(tl,®_cop2d[29]);
if (temp == HOST_TEMPREG)
host_tempreg_release();
}
-static void multdiv_assemble_arm(int i,struct regstat *i_regs)
+static void multdiv_assemble_arm(int i, const struct regstat *i_regs)
{
// case 0x18: MULT
// case 0x19: MULTU